[Armadeus-commitlog] armadeus branch, master, updated. release-3.2-53-g0bd645c
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[Armadeus-commitlog] armadeus branch, master, updated. release-3.2-53-g0bd645c
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From: Fabien M <fa...@us...> - 2009-12-16 14:11:11
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The branch, master has been updated
via 0bd645c82759005f1222b4544439b049212e4f0a (commit)
from c2b4d29431a6142edec3e848fe3b4baee86eb4c5 (commit)
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- Log -----------------------------------------------------------------
commit 0bd645c82759005f1222b4544439b049212e4f0a
Author: Fabien Marteau <fab...@ar...>
Date: Wed Dec 16 15:10:37 2009 +0100
[LINUX] Adding spi3 in apf27-dev and manage spi with menuconfig
-----------------------------------------------------------------------
Summary of changes:
.../2.6.29/344-apf27-spi_configuration.patch | 143 ++++++++++++++++++++
1 files changed, 143 insertions(+), 0 deletions(-)
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/344-apf27-spi_configuration.patch
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/344-apf27-spi_configuration.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/344-apf27-spi_configuration.patch
new file mode 100644
index 0000000..34eebf0
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/344-apf27-spi_configuration.patch
@@ -0,0 +1,143 @@
+Index: linux-2.6.29.6/arch/arm/mach-mx2/apf27-dev.c
+===================================================================
+--- linux-2.6.29.6.orig/arch/arm/mach-mx2/apf27-dev.c 2009-12-16 14:43:11.000000000 +0100
++++ linux-2.6.29.6/arch/arm/mach-mx2/apf27-dev.c 2009-12-16 15:07:25.000000000 +0100
+@@ -316,15 +316,17 @@
+ #endif /* CONFIG_SERIAL_IMX_UART5 */
+
+
+-/* Both APF27 SPI ports are used on APF27Dev */
+-#ifdef CONFIG_SPI
++/* SPI ports declarations */
++#ifdef CONFIG_SPI_MXC_SELECT1
+ static int mxc_cspi0_pins[] = {
+ /* PD28_PF_CSPI1_SS0, Preferably use CS pin as GPIO */
+ PD29_PF_CSPI1_SCLK,
+ PD30_PF_CSPI1_MISO,
+ PD31_PF_CSPI1_MOSI
+ };
++#endif /* CONFIG_SPI_MXC_SELECT1 */
+
++#ifdef CONFIG_SPI_MXC_SELECT2
+ static int mxc_cspi1_pins[] = {
+ /* PD19_PF_CSPI2_SS2,
+ PD20_PF_CSPI2_SS1, Preferably use CS pin as GPIO
+@@ -333,11 +335,25 @@
+ PD23_PF_CSPI2_MISO,
+ PD24_PF_CSPI2_MOSI
+ };
++#endif /* CONFIG_SPI_MXC_SELECT2 */
+
++#ifdef CONFIG_SPI_MXC_SELECT3
++static int mxc_cspi2_pins[] = {
++ /*
++ PE21_AF_CSPI3_SS,
++ Preferably use CS pin as GPIO
++ */
++ PE23_AF_CSPI3_SCLK,
++ PE18_AF_CSPI3_MISO,
++ PE22_AF_CSPI3_MOSI
++};
++#endif /* CONFIG_SPI_MXC_SELECT3 */
++
++#ifdef CONFIG_SPI_MXC_SELECT1
+ static int gpio_spi0_active(struct platform_device *pdev)
+ {
+ return mxc_gpio_setup_multiple_pins(mxc_cspi0_pins,
+- ARRAY_SIZE(mxc_cspi0_pins), "CSPI0");
++ ARRAY_SIZE(mxc_cspi0_pins), "CSPI1");
+ }
+
+ static int gpio_spi0_inactive(struct platform_device *pdev)
+@@ -345,11 +361,13 @@
+ mxc_gpio_release_multiple_pins(mxc_cspi0_pins, ARRAY_SIZE(mxc_cspi0_pins));
+ return 0;
+ }
++#endif /* CONFIG_SPI_MXC_SELECT1 */
+
++#ifdef CONFIG_SPI_MXC_SELECT2
+ static int gpio_spi1_active(struct platform_device *pdev)
+ {
+ return mxc_gpio_setup_multiple_pins(mxc_cspi1_pins,
+- ARRAY_SIZE(mxc_cspi1_pins), "CSPI1");
++ ARRAY_SIZE(mxc_cspi1_pins), "CSPI2");
+ }
+
+ static int gpio_spi1_inactive(struct platform_device *pdev)
+@@ -357,21 +375,48 @@
+ mxc_gpio_release_multiple_pins(mxc_cspi1_pins, ARRAY_SIZE(mxc_cspi1_pins));
+ return 0;
+ }
++#endif /* CONFIG_SPI_MXC_SELECT2 */
++
++#ifdef CONFIG_SPI_MXC_SELECT3
++static int gpio_spi2_active(struct platform_device *pdev)
++{
++ return mxc_gpio_setup_multiple_pins(mxc_cspi2_pins, ARRAY_SIZE(mxc_cspi2_pins), "CSPI3");
++}
++
++static int gpio_spi2_inactive(struct platform_device *pdev)
++{
++ mxc_gpio_release_multiple_pins(mxc_cspi2_pins, ARRAY_SIZE(mxc_cspi2_pins));
++ return 0;
++}
++#endif /* CONFIG_SPI_MXC_SELECT3 */
+
++#ifdef CONFIG_SPI_MXC_SELECT1
+ static struct spi_imx_master imx_spi0_master_info = {
+ .num_chipselect = 1,
+ .enable_dma = 0,
+ .init = gpio_spi0_active,
+ .exit = gpio_spi0_inactive,
+ };
++#endif /* CONFIG_SPI_MXC_SELECT1 */
+
++#ifdef CONFIG_SPI_MXC_SELECT2
+ static struct spi_imx_master imx_spi1_master_info = {
+ .num_chipselect = 3,
+ .enable_dma = 0,
+ .init = gpio_spi1_active,
+ .exit = gpio_spi1_inactive,
+ };
+-#endif /* CONFIG_SPI */
++#endif /* CONFIG_SPI_MXC_SELECT2 */
++
++#ifdef CONFIG_SPI_MXC_SELECT3
++static struct spi_imx_master imx_spi2_master_info = {
++ .num_chipselect = 1,
++ .enable_dma = 0,
++ .init = gpio_spi2_active,
++ .exit = gpio_spi2_inactive,
++};
++#endif /* CONFIG_SPI_MXC_SELECT3 */
++
+
+
+ /* APF27Dev has an optionnal 7 channels 10 bits ADC (SPI) */
+@@ -420,7 +465,6 @@
+ };
+ #endif /* CONFIG_ARMADEUS_MAX1027 */
+
+-
+ /* APF27Dev has a SPI Touchscreen controller */
+ #define TSC2101_INT 17
+ #define TSC2101_CS (GPIO_PORTD | 21) /* SPI2_SS0 used as GPIO */
+@@ -984,10 +1028,17 @@
+ i2c_register_board_info(1, apf27dev_i2c_devices_bus1,
+ ARRAY_SIZE(apf27dev_i2c_devices_bus1));
+ #endif
+-#ifdef CONFIG_SPI
++#ifdef CONFIG_SPI_MXC_SELECT1
+ mxc_register_device(&mxc_spi_device0, &imx_spi0_master_info);
++#endif
++#ifdef CONFIG_SPI_MXC_SELECT2
+ mxc_register_device(&mxc_spi_device1, &imx_spi1_master_info);
+ #endif
++#ifdef CONFIG_SPI_MXC_SELECT3
++ mxc_register_device(&mxc_spi_device2, &imx_spi2_master_info);
++#endif
++
++
+ platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+
+ #ifdef CONFIG_SPI_TSC2102
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