[Armadeus-commitlog] SF.net SVN: armadeus:[1195] trunk/buildroot/target

[<Fa...@us...>]

Revision: 1195
          http://armadeus.svn.sourceforge.net/armadeus/?rev=1195&view=rev
Author:   FabM
Date:     2009-04-01 12:15:33 +0000 (Wed, 01 Apr 2009)

Log Message:
-----------
[LINUX][APF27] toggling fpga_reset pin to '1' when fpga is configured. Changing default firmware lenght in uboot variables

Modified Paths:
--------------
    trunk/buildroot/target/device/armadeus/apf27/apf27.h
    trunk/buildroot/target/u-boot/u-boot-1.3.4-310-apf27.patch

Modified: trunk/buildroot/target/device/armadeus/apf27/apf27.h
===================================================================
--- trunk/buildroot/target/device/armadeus/apf27/apf27.h	2009-03-31 10:25:07 UTC (rev 1194)
+++ trunk/buildroot/target/device/armadeus/apf27/apf27.h	2009-04-01 12:15:33 UTC (rev 1195)
@@ -545,7 +545,8 @@
 #define CFG_ENV_RANGE       0X00060000  /* 384kB ( 3 flash blocks )  */
 #define	CONFIG_ENV_OVERWRITE	1		/* env is writable now   */
 #define	CONFIG_FIRMWARE_OFFSET	0x00100000
-#define	CONFIG_FIRMWARE_LEN	0x00080000	/* 512kB ( 4 flash blocks )  */
+//#define	CONFIG_FIRMWARE_LEN	0x00080000	/* 512kB ( 4 flash blocks )  */
+#define	CONFIG_FIRMWARE_LEN	0x000249F0	/* 150kB  for 200k*/
 #define	CONFIG_KERNEL_OFFSET	0x00180000
 #define	CONFIG_KERNEL_LEN	0x00500000	/* 5.0MB */
 #define	CONFIG_ROOTFS_OFFSET	0x00680000

Modified: trunk/buildroot/target/u-boot/u-boot-1.3.4-310-apf27.patch
===================================================================
--- trunk/buildroot/target/u-boot/u-boot-1.3.4-310-apf27.patch	2009-03-31 10:25:07 UTC (rev 1194)
+++ trunk/buildroot/target/u-boot/u-boot-1.3.4-310-apf27.patch	2009-04-01 12:15:33 UTC (rev 1195)
@@ -200,7 +200,7 @@
 +CONFIG_NAND_U_BOOT = y
 --- ref/u-boot-1.3.4/board/armadeus/apf27/fpga.c	1970-01-01 01:00:00.000000000 +0100
 +++ u-boot-1.3.4/board/armadeus/apf27/fpga.c	2008-12-29 16:27:49.000000000 +0100
-@@ -0,0 +1,255 @@
+@@ -0,0 +1,257 @@
 + /*
 +  * (C) Copyright 2002-2008
 +  * Eric Jarrige <eri...@ar...>
@@ -243,7 +243,6 @@
 + #define GPIO_WRITE(x,y) ( y ? GPIO_SET(x) : GPIO_CLEAR(x) )
 + #define GPIO_READ(x)  ((SSR (GPIO_PORT(x)) & (1<<(x & GPIO_PIN_MASK)))>> \
 +                         (x & GPIO_PIN_MASK)) 
-+ 
 + #ifdef FPGA_DEBUG
 + #define	PRINTF(fmt,args...)	printf (fmt ,##args)
 + #else
@@ -294,6 +293,7 @@
 + 	imx_gpio_mode (CFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
 + 	imx_gpio_mode (CFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
 + 	imx_gpio_mode (CFG_FPGA_SUSPEND | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
++ 	GPIO_SET(CFG_FPGA_RESET);	
 + 	imx_gpio_mode (CFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
 + 	imx_gpio_mode (CFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
 + 	GPIO_SET(CFG_FPGA_PRG);	
@@ -301,7 +301,7 @@
 + 	GPIO_SET(CFG_FPGA_RW);	
 + 	GPIO_SET(CFG_FPGA_CS);	
 + 	GPIO_CLEAR(CFG_FPGA_SUSPEND);	
-+ 	GPIO_CLEAR(CFG_FPGA_RESET);	
++// 	GPIO_CLEAR(CFG_FPGA_RESET);	
 + 	GPIO_CLEAR(CFG_FPGA_PWR);
 + 
 + 	return cookie;
@@ -417,10 +417,12 @@
 + {
 + 	PRINTF ("%s:%d: FPGA POST ", __FUNCTION__, __LINE__);
 + 
++ 	GPIO_CLEAR(CFG_FPGA_RESET);	
 + 	imx_gpio_mode (CFG_FPGA_RW | GPIO_PF | GPIO_PUEN);
 + 	imx_gpio_mode (CFG_FPGA_CS | GPIO_PF | GPIO_PUEN);
 + 	imx_gpio_mode (CFG_FPGA_CLK | GPIO_PF | GPIO_PUEN);
 + 	GPIO_SET(CFG_FPGA_PRG);	
++ 	imx_gpio_mode (CFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
 + 	return cookie;
 + }
 + 


This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.