[Armadeus-commitlog] SF.net SVN: armadeus:[1186] trunk/target/linux/debug/imxregs/imx27regs.h

[<ar...@us...>]

Revision: 1186
          http://armadeus.svn.sourceforge.net/armadeus/?rev=1186&view=rev
Author:   artemys
Date:     2009-03-23 22:24:07 +0000 (Mon, 23 Mar 2009)

Log Message:
-----------
[DEBUG] Corrects some CSI and PrP register names in imxregs

Modified Paths:
--------------
    trunk/target/linux/debug/imxregs/imx27regs.h

Modified: trunk/target/linux/debug/imxregs/imx27regs.h
===================================================================
--- trunk/target/linux/debug/imxregs/imx27regs.h	2009-03-22 21:32:37 UTC (rev 1185)
+++ trunk/target/linux/debug/imxregs/imx27regs.h	2009-03-23 22:24:07 UTC (rev 1186)
@@ -916,13 +916,13 @@
 { "PRP_DEST_Y_PTR",            0x10026420, 0, 0xffffffff, 'x', "PrP Destination Y Frame Start Address" },
 { "PRP_DEST_CB_PTR",           0x10026424, 0, 0xffffffff, 'x', "PrP Destination CB Frame Start Address" },
 { "PRP_DEST_CR_PTR",           0x10026428, 0, 0xffffffff, 'x', "PrP Destination CR Frame Start Address" },
-{ "PRP_SOURCE_FRAME_SIZE",     0x1002642C, 0, 0xffffffff, 'x', "PrP Source Frame Size Register" },
+{ "PRP_SRC_FRAME_SIZE",        0x1002642C, 0, 0xffffffff, 'x', "PrP Source Frame Size Register" },
 { "PRP_CH1_LINE_STRIDE",       0x10026430, 0, 0xffffffff, 'x', "PrP Channel-1 Line stride Register" },
 { "PRP_SRC_PIXEL_FORMAT_CNTL", 0x10026434, 0, 0xffffffff, 'x', "PrP Source Pixel Format Control Register" },
 { "PRP_CH1_PIXEL_FORMAT_CNTL", 0x10026438, 0, 0xffffffff, 'x', "PrP CH1 Pixel Format Control Register" },
 { "PRP_CH1_OUT_IMAGE_SIZE",    0x1002643C, 0, 0xffffffff, 'x', "PrP CH1 Output Image Size Register" },
 { "PRP_CH2_OUT_IMAGE_SIZE",    0x10026440, 0, 0xffffffff, 'x', "PrP CH2 Output Image Size Register" },
-{ "PRP_SOURCE_LINE_STRIDE",    0x10026444, 0, 0xffffffff, 'x', "PrP Source Line Stride Register" },
+{ "PRP_SRC_LINE_STRIDE",       0x10026444, 0, 0xffffffff, 'x', "PrP Source Line Stride Register" },
 { "PRP_CSC_COEFF_012",         0x10026448, 0, 0xffffffff, 'x', "PrP CSC Coefficients 0, 1, and" },
 { "PRP_CSC_COEFF_345",         0x1002644C, 0, 0xffffffff, 'x', "PrP CSC Coefficients 3, 4, and" },
 { "PRP_CSC_COEFF_678",         0x10026450, 0, 0xffffffff, 'x', "PrP CSC Coefficients 6, 7, and" },
@@ -1212,14 +1212,14 @@
 { "FIPNDH",      0x10040060, 0, 0xffffffff, 'x', "Fast Interrupt Pending Register High" },
 { "FIPNDL",      0x10040064, 0, 0xffffffff, 'x', "Fast Interrupt Pending Register Low" },
 // CSI
-{ "CSICR1",   0x80000000, 0, 0xffffffff, 'x', "CSI Control Register 1" },
-{ "CSICR2",   0x80000004, 0, 0xffffffff, 'x', "CSI Control Register 2" },
-{ "CSISR",    0x80000008, 0, 0xffffffff, 'x', "CSI Status Register" },
-{ "CSISTATR", 0x8000000C, 0, 0xffffffff, 'x', "CSI Statistic FIFO Register" },
-{ "CSIRXR",   0x80000010, 0, 0xffffffff, 'x', "CSI RxFIFO Register" },
-{ "CSIRXCNT", 0x80000014, 0, 0xffffffff, 'x', "CSI RX Count Register" },
-{ "CSIDEBUG", 0x80000018, 0, 0xffffffff, 'x', "CSI Debug Register" },
-{ "CSICR3",   0x8000001C, 0, 0xffffffff, 'x', "CSI Control Register 3" },
+{ "CSICR1",      0x80000000, 0, 0xffffffff, 'x', "CSI Control Register 1" },
+{ "CSICR2",      0x80000004, 0, 0xffffffff, 'x', "CSI Control Register 2" },
+{ "CSISR",       0x80000008, 0, 0xffffffff, 'x', "CSI Status Register" },
+{ "CSISTATFIFO", 0x8000000C, 0, 0xffffffff, 'x', "CSI Statistic FIFO Register" },
+{ "CSIRFIFO",    0x80000010, 0, 0xffffffff, 'x', "CSI RxFIFO Register" },
+{ "CSIRXCNT",    0x80000014, 0, 0xffffffff, 'x', "CSI RX Count Register" },
+{ "CSIDEBUG",    0x80000018, 0, 0xffffffff, 'x', "CSI Debug Register" },
+{ "CSICR3",      0x8000001C, 0, 0xffffffff, 'x', "CSI Control Register 3" },
 // ATA
 { "TIME_CONFIG0", 0x80001000, 0, 0xffffffff, 'x', "ATA timing parameter 0." },
 { "TIME_CONFIG1", 0x80001004, 0, 0xffffffff, 'x', "ATA timing parameter 1." },


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