[Armadeus-commitlog] SF.net SVN: armadeus:[1117] trunk/target/linux/modules/fpga/dev_tools/ fpga_de
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[Armadeus-commitlog] SF.net SVN: armadeus:[1117] trunk/target/linux/modules/fpga/dev_tools/ fpga_devtools
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From: <ar...@us...> - 2009-03-06 17:48:33
|
Revision: 1117
http://armadeus.svn.sourceforge.net/armadeus/?rev=1117&view=rev
Author: artemys
Date: 2009-03-06 17:48:16 +0000 (Fri, 06 Mar 2009)
Log Message:
-----------
[LINUX] Add APF27 support to fpgaloader (part2)
Modified Paths:
--------------
trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/Makefile
trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/apf27-fpga-loader.c
trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/apf9328-fpga-loader.c
trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/fpga-loader.c
trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/xilinx-fpga-loader.c
trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/xilinx-fpga-loader.h
Modified: trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/Makefile
===================================================================
--- trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/Makefile 2009-03-05 11:22:39 UTC (rev 1116)
+++ trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/Makefile 2009-03-06 17:48:16 UTC (rev 1117)
@@ -6,10 +6,12 @@
obj-$(CONFIG_ARMADEUS_FPGA_TOOL_DRIVER) += fpgaloader.o
ifneq ($(CONFIG_MACH_APF27),)
-fpgaloader-objs := apf27-fpga-loader.o xilinx-fpga-loader.o fpga-loader.o
+fpgaloader-objs := xilinx-fpga-loader.o fpga-loader.o
+obj-y += apf27-fpga-loader.o
endif
ifneq ($(CONFIG_MACH_APF9328),)
-fpgaloader-objs := apf9328-fpga-loader.o xilinx-fpga-loader.o fpga-loader.o
+fpgaloader-objs := xilinx-fpga-loader.o fpga-loader.o
+obj-y += apf9328-fpga-loader.o
endif
else
Modified: trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/apf27-fpga-loader.c
===================================================================
--- trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/apf27-fpga-loader.c 2009-03-05 11:22:39 UTC (rev 1116)
+++ trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/apf27-fpga-loader.c 2009-03-06 17:48:16 UTC (rev 1117)
@@ -19,23 +19,21 @@
*
*/
-#include <linux/version.h>
#include <mach/iomux-mx1-mx2.h>
#include <mach/gpio.h>
-#include <asm/io.h>
-#include <linux/kernel.h>
-#include <mach/hardware.h>
+#include <linux/platform_device.h>
#include "xilinx-fpga-loader.h"
+
#define FPGA_BASE_ADDR CS5_BASE_ADDR
#define FPGA_VIRT_ADDR (IO_ADDRESS(FPGA_BASE_ADDR) + 0x0)
#define CFG_FPGA_PWR (GPIO_PORTF | 19) /* FPGA prog pin */
#define CFG_FPGA_PRG (GPIO_PORTF | 11) /* FPGA prog pin */
#define CFG_FPGA_CLK (GPIO_PORTF | 15) /* FPGA clk pin */
-#define CFG_FPGA_RDATA 0xD6000000 /* FPGA data addr */
-#define CFG_FPGA_WDATA 0xD6000000 /* FPGA data addr */
+#define CFG_FPGA_RDATA 0xD6000000 /* FPGA data addr */
+#define CFG_FPGA_WDATA 0xD6000000 /* FPGA data addr */
#define CFG_FPGA_INIT (GPIO_PORTF | 12) /* FPGA init pin */
#define CFG_FPGA_DONE (GPIO_PORTF | 9) /* FPGA done pin */
#define CFG_FPGA_RW (GPIO_PORTF | 21) /* FPGA done pin */
@@ -43,11 +41,9 @@
#define CFG_FPGA_SUSPEND (GPIO_PORTF | 10) /* FPGA done pin */
#define CFG_FPGA_RESET (GPIO_PORTF | 7) /* FPGA done pin */
-#define NB_TARGET_DESC 2
-
/* Initialize GPIO port before download */
-int fpga_pre_fn (void)
+int apf27_fpga_pre(void)
{
gpio_set_value(CFG_FPGA_PWR, 1);
gpio_set_value(CFG_FPGA_PRG, 1);
@@ -75,7 +71,7 @@
/*
* Set the FPGA's active-low program line to the specified level
*/
-int fpga_pgm_fn (int assert)
+int apf27_fpga_pgm(int assert)
{
gpio_set_value( CFG_FPGA_PRG, !assert);
return assert;
@@ -84,7 +80,7 @@
/*
* Set the FPGA's active-high clock line to the specified level
*/
-int fpga_clk_fn (int assert_clk)
+int apf27_fpga_clk(int assert_clk)
{
gpio_set_value( CFG_FPGA_CLK, !assert_clk);
return assert_clk;
@@ -94,7 +90,7 @@
* Test the state of the active-low FPGA INIT line. Return 1 on INIT
* asserted (low).
*/
-int fpga_init_fn (void)
+int apf27_fpga_init(void)
{
int value;
value = gpio_get_value(CFG_FPGA_INIT);
@@ -104,7 +100,7 @@
/*
* Test the state of the active-high FPGA DONE pin
*/
-int fpga_done_fn (void)
+int apf27_fpga_done(void)
{
return(gpio_get_value(CFG_FPGA_DONE));
}
@@ -112,30 +108,30 @@
/*
* Set the FPGA's wr line to the specified level
*/
-int fpga_wr_fn (int assert_write)
+int apf27_fpga_wr(int assert_write)
{
gpio_set_value( CFG_FPGA_RW, !assert_write);
return assert_write;
}
-int fpga_cs_fn (int assert_cs)
+int apf27_fpga_cs(int assert_cs)
{
gpio_set_value( CFG_FPGA_CS, !assert_cs);
return assert_cs;
}
-int fpga_wdata_fn ( unsigned char data )
+int apf27_fpga_wdata( unsigned char data )
{
__raw_writew(data, FPGA_VIRT_ADDR);
return data;
}
-int fpga_busy_fn (void)
+int apf27_fpga_busy(void)
{
return 0;
}
-
-int fpga_post_fn (void)
+
+int apf27_fpga_post(void)
{
mxc_gpio_mode (CFG_FPGA_RW | GPIO_PF | GPIO_PUEN);
mxc_gpio_mode (CFG_FPGA_CS | GPIO_PF | GPIO_PUEN);
@@ -144,9 +140,9 @@
return 1;
}
-int fpga_abort_fn (void)
+int apf27_fpga_abort(void)
{
- fpga_post_fn();
+ apf27_fpga_post();
gpio_set_value(CFG_FPGA_PWR, 1);
return 1;
}
@@ -157,30 +153,41 @@
* Just take care about the file size
*/
Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
- fpga_pre_fn,
- fpga_pgm_fn,
- fpga_clk_fn,
- fpga_init_fn,
- fpga_done_fn,
- fpga_wr_fn,
- fpga_cs_fn,
- fpga_wdata_fn,
- fpga_busy_fn,
- fpga_abort_fn,
- fpga_post_fn,
+ .pre = apf27_fpga_pre,
+ .pgm = apf27_fpga_pgm,
+ .clk = apf27_fpga_clk,
+ .init = apf27_fpga_init,
+ .done = apf27_fpga_done,
+ .wr = apf27_fpga_wr,
+ .cs = apf27_fpga_cs,
+ .wdata = apf27_fpga_wdata,
+ .busy = apf27_fpga_busy,
+ .abort = apf27_fpga_abort,
+ .post = apf27_fpga_post,
};
-Xilinx_desc target_fpga_desc[NB_TARGET_DESC] = {
- {
- Xilinx_Spartan,
- slave_parallel,
- 1196128l/8,
- (void *) &fpga_fns
+struct fpga_desc apf27_fpga_desc = {
+ .family = Xilinx_Spartan,
+ .iface = slave_parallel,
+ .iface_fns = (void *) &fpga_fns
+};
+
+static struct platform_device fpga_device = {
+ .name = "fpgaloader",
+ .id = 0,
+ .dev = {
+ .platform_data = &apf27_fpga_desc,
},
- {
- Xilinx_Spartan,
- slave_parallel,
- 1887216l/8,
- (void *) &fpga_fns
- },
};
+
+static struct platform_device *devices[] __initdata = {
+ &fpga_device,
+};
+
+static int __init apf27_fpga_initialize(void)
+{
+ platform_add_devices(devices, ARRAY_SIZE(devices));
+ return 0;
+}
+
+device_initcall(apf27_fpga_initialize);
Modified: trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/apf9328-fpga-loader.c
===================================================================
--- trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/apf9328-fpga-loader.c 2009-03-05 11:22:39 UTC (rev 1116)
+++ trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/apf9328-fpga-loader.c 2009-03-06 17:48:16 UTC (rev 1117)
@@ -20,16 +20,12 @@
*
*/
-#include <linux/version.h>
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
-#include <asm/arch/hardware.h>
-#else
-#include <mach/hardware.h>
-#endif
#include <asm/io.h>
+#include <linux/platform_device.h>
#include "xilinx-fpga-loader.h"
+
#define FPGA_INIT (GPIO_PORTB | 15) /* FPGA init pin (SSI input) */
#define FPGA_DONE (GPIO_PORTB | 16) /* FPGA done pin (SSI input) */
#define FPGA_DIN (GPIO_PORTB | 17) /* FPGA data pin (SSI output) */
@@ -45,7 +41,7 @@
/*
* Set the FPGA's active-low program line to the specified level
*/
-int fpga_pgm_fn( int assert )
+static int apf9328_fpga_pgm( int assert )
{
GPIO_WRITE( FPGA_PROGRAM, !assert);
return assert;
@@ -54,7 +50,7 @@
/*
* Set the FPGA's active-high clock line to the specified level
*/
-int fpga_clk_fn( int assert_clk )
+static int apf9328_fpga_clk( int assert_clk )
{
GPIO_WRITE( FPGA_CLOCK, assert_clk);
return assert_clk;
@@ -64,7 +60,7 @@
* Test the state of the active-low FPGA INIT line. Return 1 on INIT
* asserted (low).
*/
-int fpga_init_fn( void )
+static int apf9328_fpga_init( void )
{
return(!GPIO_READ(FPGA_INIT));
}
@@ -72,7 +68,7 @@
/*
* Test the state of the active-high FPGA DONE pin
*/
-int fpga_done_fn( void )
+static int apf9328_fpga_done( void )
{
return(GPIO_READ(FPGA_DONE));
}
@@ -80,13 +76,13 @@
/*
* Set the FPGA's data line to the specified level
*/
-int fpga_wr_fn( int assert_write )
+static int apf9328_fpga_wr( int assert_write )
{
GPIO_WRITE( FPGA_DIN, assert_write);
return assert_write;
}
-int fpga_pre_fn( void )
+static int apf9328_fpga_pre( void )
{
/* Initialize GPIO pins */
imx_gpio_mode (FPGA_INIT | GPIO_GIUS | GPIO_DR | GPIO_IN );
@@ -99,26 +95,36 @@
Xilinx_Spartan_Slave_Serial_fns fpga_fns = {
- fpga_pre_fn,
- fpga_pgm_fn,
- fpga_clk_fn,
- fpga_init_fn,
- fpga_done_fn,
- fpga_wr_fn,
+ .pre = apf9328_fpga_pre,
+ .pgm = apf9328_fpga_pgm,
+ .clk = apf9328_fpga_clk,
+ .init = apf9328_fpga_init,
+ .done = apf9328_fpga_done,
+ .wr = apf9328_fpga_wr,
};
-Xilinx_desc target_fpga_desc[/*NB_TARGET_DESC*/] = {
-
- { /* first supported configuration (default) */
- Xilinx_Spartan,
- slave_serial,
- XILINX_XC3S200_SIZE,
- (void *) &fpga_fns
+struct fpga_desc apf9328_fpga_desc = {
+ .family = Xilinx_Spartan,
+ .iface = slave_serial,
+ .iface_fns = (void *) &fpga_fns
+};
+
+static struct platform_device fpga_device = {
+ .name = "fpgaloader",
+ .id = 0,
+ .dev = {
+ .platform_data = &apf9328_fpga_desc,
},
- { /* second one */
- Xilinx_Spartan,
- slave_serial,
- XILINX_XC3S400_SIZE,
- (void *) &fpga_fns
- },
};
+
+static struct platform_device *devices[] __initdata = {
+ &fpga_device,
+};
+
+static int __init apf9328_fpga_initialize(void)
+{
+ platform_add_devices(devices, ARRAY_SIZE(devices));
+ return 0;
+}
+
+device_initcall(apf9328_fpga_initialize);
Modified: trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/fpga-loader.c
===================================================================
--- trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/fpga-loader.c 2009-03-05 11:22:39 UTC (rev 1116)
+++ trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/fpga-loader.c 2009-03-06 17:48:16 UTC (rev 1117)
@@ -26,18 +26,19 @@
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/fcntl.h>
+#include <linux/platform_device.h>
+#include <linux/miscdevice.h>
#include <asm/uaccess.h>
#include "fpga-loader.h"
#include "xilinx-fpga-loader.h"
-#define DRIVER_VERSION "0.8"
+
+#define DRIVER_VERSION "0.9"
#define DRIVER_NAME "fpgaloader"
-
/* global variables */
-static int fpga_major = FPGA_MAJOR;
-Xilinx_desc* g_current_desc = NULL;
+struct fpga_desc *g_current_desc = NULL;
struct semaphore fpga_sema;
static unsigned char fpga_descriptor = 0; /* use default target_fpga_desc */
@@ -121,7 +122,7 @@
static int procfile_fpga_read( char *buffer, __attribute__ ((unused)) char **start, off_t offset, int buffer_length, int *eof, __attribute__ ((unused)) void* data)
{
int ret;
-
+
/* We give all of our information in one go, so if the user asks us if
we have more information the answer should always be no.
This is important because the standard read function from the
@@ -132,11 +133,7 @@
/* we have finished to read, return 0 */
ret = 0;
} else {
- if ( data == NULL ) {
- ret = xilinx_get_descriptor_info( -1, buffer );
- } else {
- ret = xilinx_get_descriptor_info( *((unsigned char*)data), buffer );
- }
+ ret = fpga_get_infos( g_current_desc, buffer );
}
return ret;
@@ -194,10 +191,10 @@
static int create_proc_entries( void )
{
static struct proc_dir_entry *fpga_Proc_File;
-
+
/* Create main directory */
proc_mkdir(FPGA_PROC_DIRNAME, NULL);
-
+
/* Create proc file */
fpga_Proc_File = create_proc_entry( FPGA_PROC_FILENAME, S_IWUSR |S_IRUSR | S_IRGRP | S_IROTH, NULL );
if( fpga_Proc_File == NULL ) {
@@ -207,7 +204,7 @@
fpga_Proc_File->read_proc = procfile_fpga_read;
fpga_Proc_File->write_proc = procfile_fpga_write;
}
-
+
return 0;
error:
remove_proc_entry(FPGA_PROC_DIRNAME, NULL);
@@ -223,43 +220,102 @@
.ioctl = armadeus_fpga_ioctl,
};
-int __init armadeus_fpga_init(void)
+#ifdef CONFIG_PM
+static int armadeus_fpga_suspend(struct platform_device *pdev, pm_message_t state)
{
- static int result;
-
- /* Register the driver by getting a major number */
- result = register_chrdev(fpga_major, DRIVER_NAME, &fpga_fops);
- if (result < 0) {
- printk(KERN_WARNING DRIVER_NAME ": can't get major %d\n", fpga_major);
- return result;
+ return 0;
+}
+
+static int armadeus_fpga_resume(struct platform_device *pdev)
+{
+ return 0;
+}
+#else
+#define armadeus_fpga_suspend NULL
+#define armadeus_fpga_resume NULL
+#endif
+
+static struct miscdevice fpgaloader_misc = {
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = DRIVER_NAME,
+ .fops = &fpga_fops,
+};
+
+
+static int armadeus_fpga_probe(struct platform_device *pdev)
+{
+ int result;
+ struct device *dev = &pdev->dev;
+ struct fpga_desc *platform_info;
+
+ platform_info = dev->platform_data;
+ if (platform_info == NULL) {
+ dev_err(&pdev->dev, "probe - no platform data supplied\n");
+ result = -ENODEV;
+ goto err_no_pdata;
}
- if( fpga_major == 0 ) fpga_major = result; /* dynamic MAJOR allocation */
+ /* Register the driver through misc layer to get MAJOR/MINOR */
+ result = misc_register(&fpgaloader_misc);
+ if (result) {
+ printk(KERN_ERR "%s:%u: misc_register failed %d\n",
+ __func__, __LINE__, result);
+ goto err_no_pdata;
+ }
+
+ dev_dbg(&pdev->dev, "%s:%u: registered misc device %d\n",
+ __func__, __LINE__, fpgaloader_misc.minor);
+
result = create_proc_entries();
if( result < 0 )
- return result;
+ goto err_misc;
sema_init(&fpga_sema, 1);
/* initialize the current fpga descriptor with the one by default */
- g_current_desc = xilinx_get_descriptor(fpga_descriptor);
- if( g_current_desc == NULL ){
- return -EINVAL;
- }
+ g_current_desc = platform_info;
- printk(DRIVER_NAME " v" DRIVER_VERSION " successfully loaded !\n");
return 0;
+
+err_misc:
+ misc_deregister(&fpgaloader_misc);
+err_no_pdata:
+ return result;
}
-void __exit armadeus_fpga_cleanup(void)
+static int armadeus_fpga_remove(struct platform_device *pdev)
{
remove_proc_entry(FPGA_PROC_FILENAME, NULL);
remove_proc_entry(FPGA_PROC_DIRNAME, NULL);
- unregister_chrdev(fpga_major, DRIVER_NAME);
+ misc_deregister(&fpgaloader_misc);
+
+ return 0;
}
+static struct platform_driver armadeus_fpga_driver = {
+ .probe = armadeus_fpga_probe,
+ .remove = armadeus_fpga_remove,
+ .suspend = armadeus_fpga_suspend,
+ .resume = armadeus_fpga_resume,
+ .driver = {
+ .name = DRIVER_NAME,
+ },
+};
+
+static int __init armadeus_fpga_init(void)
+{
+ printk(DRIVER_NAME " v" DRIVER_VERSION "\n");
+
+ return platform_driver_register(&armadeus_fpga_driver);
+}
+
+static void __exit armadeus_fpga_exit(void)
+{
+ platform_driver_unregister(&armadeus_fpga_driver);
+}
+
module_init(armadeus_fpga_init);
-module_exit(armadeus_fpga_cleanup);
+module_exit(armadeus_fpga_exit);
MODULE_AUTHOR("Julien Boibessot / Nicolas Colombain");
MODULE_DESCRIPTION("Armadeus FPGA loading driver");
Modified: trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/xilinx-fpga-loader.c
===================================================================
--- trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/xilinx-fpga-loader.c 2009-03-05 11:22:39 UTC (rev 1116)
+++ trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/xilinx-fpga-loader.c 2009-03-06 17:48:16 UTC (rev 1117)
@@ -3,7 +3,7 @@
* Copyright (C) 2006-2009 Nicolas Colombain <nic...@ar...>
* Armadeus Project / Armadeus systems
*
- * Based on the implementation (U-Boot) of:
+ * Based on the (U-Boot) implementation of:
* Rich Ireland, Enterasys Networks, rir...@en....
* Keith Outwater, kei...@mv...
*
@@ -27,14 +27,10 @@
*
*/
-#include <linux/version.h>
#include <asm/io.h>
#include <linux/time.h>
#include <linux/delay.h>
-#include <linux/kernel.h>
#include <linux/errno.h>
-#include <asm/irqflags.h>
-#include <asm/delay.h>
#include "xilinx-fpga-loader.h"
@@ -42,7 +38,6 @@
#define CFG_FPGA_WAIT 20000 // uS
size_t bytecount = 0; // total bytes received
-extern Xilinx_desc target_fpga_desc[]; // target descriptor table
/*
* Timeout function
@@ -60,55 +55,57 @@
/*
* dump the given descriptor infos
*/
-static int xilinx_dump_descriptor_info( Xilinx_desc *desc, char* buffer )
+static int xilinx_dump_descriptor_info( struct fpga_desc *desc, char* buffer )
{
- int len;
- len = sprintf( buffer, "%s %s %u\n",
- (desc->family == Xilinx_Spartan) ? "spartan":"unknown",
- (desc->iface == slave_serial) ? "slave serial":"slave parallel",
- desc->size );
- return len;
+ int len;
+ len = sprintf( buffer, "%s %s\n",
+ (desc->family == Xilinx_Spartan) ? "spartan":"unknown",
+ (desc->iface == slave_serial) ? "slave serial":"slave parallel"
+ );
+ return len;
}
/**
* program the FPGA (serial mode).
* return 0 if success, >0 while programming, <0 if error detected
*/
-static size_t spartan_serial_load (Xilinx_desc *desc, const char* buf, size_t bsize)
+static size_t spartan_serial_load (struct fpga_desc *desc, const char* buf, size_t bsize)
{
Xilinx_Spartan_Slave_Serial_fns *fn = desc->iface_fns;
if (fn) {
- int i;
- unsigned char val;
- size_t nbbyte = 0; // init local counter
+ int i;
+ unsigned char val;
+ size_t nbbyte = 0; /* init local counter */
- while (nbbyte < bsize) {
- /* Spartan signals an error if INIT goes low (active)
- while DONE is low (inactive) */
- if ((*fn->done)() == 0 && (*fn->init)()) {
- printk("** CRC error during FPGA load.\n");
- return -ETIMEDOUT;
- }
- val = buf[nbbyte ++];
+ while (nbbyte < bsize) {
+ /* Spartan signals an error if INIT goes low (active)
+ while DONE is low (inactive) */
+ if ((*fn->done)() == 0 && (*fn->init)()) {
+ printk("** CRC error during FPGA load.\n");
+ return -ETIMEDOUT;
+ }
+ val = buf[nbbyte ++];
bytecount++;
- i = 8;
+ i = 8;
do {
- /* Deassert the clock */
- (*fn->clk)(0);
- CONFIG_FPGA_DELAY ();
- /* Write data */
- (*fn->wr)(val & 0x80);
- CONFIG_FPGA_DELAY ();
- /* Assert the clock */
- (*fn->clk)(1);
- CONFIG_FPGA_DELAY ();
- val <<= 1;
- i --;
+ /* Deassert the clock */
+ (*fn->clk)(0);
+ CONFIG_FPGA_DELAY();
+ /* Write data */
+ (*fn->wr)(val & 0x80);
+ CONFIG_FPGA_DELAY();
+ /* Assert the clock */
+ (*fn->clk)(1);
+ CONFIG_FPGA_DELAY();
+ val <<= 1;
+ i --;
} while (i > 0);
}
- if(bytecount%4096 == 0) printk(".");
+ if(bytecount%4096 == 0)
+ printk(".");
+
return bsize;
}
return -EINVAL;
@@ -118,22 +115,22 @@
* initialize the FPGA programming interface.
* return 0 if success, <0 if error detected
*/
-static int spartan_serial_init (Xilinx_desc *desc)
+static int spartan_serial_init (struct fpga_desc *desc)
{
Xilinx_Spartan_Slave_Serial_fns *fn = desc->iface_fns;
if (fn) {
unsigned long ts; /* timestamp */
- if(*fn->pre){
- (*fn->pre)(); //Run the pre configuration function if there is one.
- }
+ if(*fn->pre){
+ (*fn->pre)(); //Run the pre configuration function if there is one.
+ }
- /* Establish the initial state */
+ /* Establish the initial state */
(*fn->pgm)(1); /* Assert the program, commit */
- /* Wait for INIT state (init low) */
+ /* Wait for INIT state (init low) */
ts = get_timer(0); /* get current time */
- do {
+ do {
CONFIG_FPGA_DELAY ();
if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */
PRINTF ("** Timeout waiting for INIT to start.\n");
@@ -146,8 +143,8 @@
(*fn->pgm)(0); /* Deassert the program, commit */
ts = get_timer(0); /* get current time */
- /* Now wait for INIT to go high */
- do {
+ /* Now wait for INIT to go high */
+ do {
CONFIG_FPGA_DELAY ();
if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */
PRINTF ("** Timeout waiting for INIT to clear.\n");
@@ -155,14 +152,14 @@
}
} while ((*fn->init)());
- bytecount = 0; // reset byte count
- return 0; // success
- }
- return -EINVAL;
+ bytecount = 0; /* reset byte count */
+ return 0; /* success */
+ }
+ return -EINVAL;
}
/* terminate the FPGA load (serial mode) */
-static int spartan_serial_finish(Xilinx_desc *desc)
+static int spartan_serial_finish(struct fpga_desc *desc)
{
unsigned long timestamp;
Xilinx_Spartan_Slave_Serial_fns *fn = desc->iface_fns;
@@ -194,7 +191,7 @@
* initialize the FPGA programming interface.
* return 0 if success, <0 if error detected
*/
-static int spartan_parallel_init (Xilinx_desc *desc)
+static int spartan_parallel_init (struct fpga_desc *desc)
{
Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
if (fn) {
@@ -247,7 +244,7 @@
* program the FPGA (parallel mode).
* return 0 if success, >0 while programming, <0 if error detected
*/
-static size_t spartan_parallel_load (Xilinx_desc *desc, const char* buf, size_t bsize)
+static size_t spartan_parallel_load (struct fpga_desc *desc, const char* buf, size_t bsize)
{
unsigned long flags;
Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
@@ -274,7 +271,7 @@
}
/* terminate the FPGA load (parallel mode) */
-static int spartan_parallel_finish(Xilinx_desc *desc)
+static int spartan_parallel_finish(struct fpga_desc *desc)
{
Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
unsigned long timestamp;
@@ -312,7 +309,7 @@
* program the FPGA.
* return 0 if success, >0 while programming, <0 if error detected
*/
-size_t xilinx_load( Xilinx_desc *desc, const char *buf, size_t bsize )
+size_t xilinx_load( struct fpga_desc *desc, const char *buf, size_t bsize )
{
int ret = 0;
@@ -343,7 +340,7 @@
* initialize the FPGA programming interface.
* return 0 if success, <0 if error detected
*/
-int xilinx_init_load( Xilinx_desc *desc )
+int xilinx_init_load( struct fpga_desc *desc )
{
int ret = 0;
@@ -370,7 +367,7 @@
return ret;
}
-int xilinx_finish_load( Xilinx_desc *desc )
+int xilinx_finish_load( struct fpga_desc *desc )
{
int ret = 0;
@@ -408,35 +405,15 @@
}
/**
- * get the descriptor corresponding to desc_id
- * return NULL if error
+ * get some infos about FPGA download
*/
-#define NB_TARGET_DESC 2
-
-Xilinx_desc * xilinx_get_descriptor( unsigned char desc_id )
+int fpga_get_infos( struct fpga_desc *desc, char* buffer )
{
- if( desc_id < NB_TARGET_DESC ){
- return &(target_fpga_desc[desc_id]);
- }
- return NULL;
-}
+ int len = 0;
-/**
- * get the descriptor infos
- */
-int xilinx_get_descriptor_info( int desc_id, char* buffer )
-{
- int len = 0;
+ if( desc ) {
+ len = xilinx_dump_descriptor_info( desc, buffer );
+ }
- if( desc_id >= 0 ) {
- len = xilinx_dump_descriptor_info( &target_fpga_desc[desc_id], buffer );
- }
- else { // all desc requested
- unsigned char i;
- for( i=0; i<NB_TARGET_DESC; i++ ) {
- len += xilinx_dump_descriptor_info( &target_fpga_desc[i], buffer+len );
- }
- }
-
- return len;
+ return len;
}
Modified: trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/xilinx-fpga-loader.h
===================================================================
--- trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/xilinx-fpga-loader.h 2009-03-05 11:22:39 UTC (rev 1116)
+++ trunk/target/linux/modules/fpga/dev_tools/fpga_devtools/xilinx-fpga-loader.h 2009-03-06 17:48:16 UTC (rev 1117)
@@ -31,17 +31,16 @@
#include <linux/types.h>
+
#define FPGA_DEBUG
//#undef FPGA_DEBUG
#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printk (fmt ,##args)
+#define PRINTF(fmt,args...) printk (fmt ,##args)
#else
-#define PRINTF(fmt,args...)
+#define PRINTF(fmt,args...)
#endif
-
-
/* Spartan-III */
#define XILINX_XC3S50_SIZE 439264/8
#define XILINX_XC3S200_SIZE 1047616/8
@@ -53,25 +52,25 @@
#define XILINX_XC3S5000_SIZE 13271936/8
-typedef enum { /* typedef Xilinx_iface */
+typedef enum {
min_xilinx_iface_type, /* low range check value */
- slave_serial, /* serial data and external clock */
- slave_parallel, /* parallel data and external clock */
- max_xilinx_iface_type /* insert all new types before this */
-} Xilinx_iface; /* end, typedef Xilinx_iface */
+ slave_serial, /* serial data and external clock */
+ slave_parallel, /* parallel data and external clock */
+ max_xilinx_iface_type /* insert all new types before this */
+} Xilinx_iface;
-typedef enum { /* typedef Xilinx_Family */
- min_xilinx_type, /* low range check value */
- Xilinx_Spartan, /* Spartan-II Family */
- max_xilinx_type /* insert all new types before this */
-} Xilinx_Family; /* end, typedef Xilinx_Family */
+typedef enum {
+ min_xilinx_type, /* low range check value */
+ Xilinx_Spartan, /* Spartan-II Family */
+ max_xilinx_type /* insert all new types before this */
+} Xilinx_Family;
-typedef struct { /* typedef Xilinx_desc */
- Xilinx_Family family; /* part type */
- Xilinx_iface iface; /* interface type */
- size_t size; /* bytes of data part can accept */
+struct fpga_desc {
+ Xilinx_Family family; /* part type */
+ Xilinx_iface iface; /* interface type */
+ size_t size; /* bytes of data part can accept */
void * iface_fns; /* interface function table */
-} Xilinx_desc; /* end, typedef Xilinx_desc */
+};
/** pointer to target specific low level function */
@@ -115,29 +114,23 @@
/**
- * program the FPGA.
+ * program the FPGA.
* return 0 if success, >0 while programming, <0 if error detected
- */
-size_t xilinx_load( Xilinx_desc *desc, const char *buf, size_t bsize );
+ */
+size_t xilinx_load( struct fpga_desc *desc, const char *buf, size_t bsize );
/**
- * initialize the FPGA programming interface.
+ * initialize the FPGA programming interface
* return 0 if success, <0 if error detected
- */
-int xilinx_init_load( Xilinx_desc *desc );
+ */
+int xilinx_init_load( struct fpga_desc *desc );
/* terminate FGPA loading */
-int xilinx_finish_load( Xilinx_desc *desc );
+int xilinx_finish_load( struct fpga_desc *desc );
-/**
+/**
* get the descriptor infos, return the number of char placed in the buffer
*/
-int xilinx_get_descriptor_info( int desc_id, char* buffer);
+int fpga_get_infos( struct fpga_desc *desc, char* buffer);
-/**
- * get the descriptor corresponding to desc_id
- * return NULL if error
- */
-Xilinx_desc * xilinx_get_descriptor( unsigned char desc_id );
-
#endif // __XILINX_FPGA_H__
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