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[Armadeus-commitlog] SF.net SVN: armadeus:[1115] trunk/firmware
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From: <Fa...@us...> - 2009-03-05 09:49:46
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Revision: 1115
http://armadeus.svn.sourceforge.net/armadeus/?rev=1115&view=rev
Author: FabM
Date: 2009-03-05 09:49:29 +0000 (Thu, 05 Mar 2009)
Log Message:
-----------
[FIRMWARE] Adding sub-directory for leds blinking_led and button_led
Added Paths:
-----------
trunk/firmware/leds/
trunk/firmware/leds/blinking_led/
trunk/firmware/leds/button_led/
trunk/firmware/leds/led.ucf
trunk/firmware/leds/led_top.dia
trunk/firmware/leds/led_top.vhd
trunk/firmware/leds/led_top_200k.bit
trunk/firmware/leds/led_top_400k.bit
Removed Paths:
-------------
trunk/firmware/led/
trunk/firmware/leds/led.ucf
trunk/firmware/leds/led_top.bit
trunk/firmware/leds/led_top.dia
trunk/firmware/leds/led_top.vhd
Deleted: trunk/firmware/leds/led.ucf
===================================================================
--- trunk/firmware/led/led.ucf 2009-03-02 16:14:50 UTC (rev 1105)
+++ trunk/firmware/leds/led.ucf 2009-03-05 09:49:29 UTC (rev 1115)
@@ -1,44 +0,0 @@
-#PACE: Start of Constraints generated by PACE
-
-#PACE: Start of PACE I/O Pin Assignments
-NET "AddrxDI<0>" LOC = "P21" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<10>" LOC = "P33" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<11>" LOC = "P35" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<12>" LOC = "P36" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<1>" LOC = "P23" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<2>" LOC = "P24" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<3>" LOC = "P25" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<4>" LOC = "P26" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<5>" LOC = "P27" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<6>" LOC = "P28" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<7>" LOC = "P30" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<8>" LOC = "P31" | IOSTANDARD = LVCMOS33 ;
-NET "AddrxDI<9>" LOC = "P32" | IOSTANDARD = LVCMOS33 ;
-NET "button" LOC = "P119" | IOSTANDARD = LVCMOS33 ;
-NET "clk" LOC = "P55" | IOSTANDARD = LVCMOS33 ;
-NET "CSxBI" LOC = "P59" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<0>" LOC = "P1" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<10>" LOC = "P13" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<11>" LOC = "P14" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<12>" LOC = "P15" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<13>" LOC = "P17" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<14>" LOC = "P18" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<15>" LOC = "P20" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<1>" LOC = "P2" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<2>" LOC = "P4" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<3>" LOC = "P5" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<4>" LOC = "P6" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<5>" LOC = "P7" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<6>" LOC = "P8" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<7>" LOC = "P10" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<8>" LOC = "P11" | IOSTANDARD = LVCMOS33 ;
-NET "DataxD<9>" LOC = "P12" | IOSTANDARD = LVCMOS33 ;
-NET "led" LOC = "P118" | IOSTANDARD = LVCMOS33 ;
-NET "RDxBI" LOC = "P63" | IOSTANDARD = LVCMOS33 ;
-NET "WRxBI" LOC = "P60" | IOSTANDARD = LVCMOS33 ;
-
-#PACE: Start of PACE Area Constraints
-
-#PACE: Start of PACE Prohibit Constraints
-
-#PACE: End of Constraints generated by PACE
Copied: trunk/firmware/leds/led.ucf (from rev 1111, trunk/firmware/led/led.ucf)
===================================================================
--- trunk/firmware/leds/led.ucf (rev 0)
+++ trunk/firmware/leds/led.ucf 2009-03-05 09:49:29 UTC (rev 1115)
@@ -0,0 +1,4 @@
+# pinout
+NET "button" LOC = "P141" | IOSTANDARD = LVCMOS33 ;
+NET "clk" LOC = "P55" | IOSTANDARD = LVCMOS33 ;
+NET "led" LOC = "P116" | IOSTANDARD = LVCMOS33 ;
Deleted: trunk/firmware/leds/led_top.bit
===================================================================
(Binary files differ)
Deleted: trunk/firmware/leds/led_top.dia
===================================================================
(Binary files differ)
Copied: trunk/firmware/leds/led_top.dia (from rev 1111, trunk/firmware/led/led_top.dia)
===================================================================
(Binary files differ)
Deleted: trunk/firmware/leds/led_top.vhd
===================================================================
--- trunk/firmware/led/led_top.vhd 2009-03-02 16:14:50 UTC (rev 1105)
+++ trunk/firmware/leds/led_top.vhd 2009-03-05 09:49:29 UTC (rev 1115)
@@ -1,90 +0,0 @@
-----------------------------------------------------------------------------------
--- Company: Armadeus Project
--- Engineer: Benoit Canet
---
--- Create Date: 22:37:46 04/12/2007
--- Design Name:
--- Module Name: led_top - structural
--- Project Name:
--- Target Devices:
--- Tool versions:
--- Description:
---
--- Dependencies:
---
--- Revision:
--- Revision 0.01 - File Created
--- Additional Comments:
---
-----------------------------------------------------------------------------------
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
-use IEEE.STD_LOGIC_ARITH.ALL;
-use IEEE.STD_LOGIC_UNSIGNED.ALL;
-
-entity led_top is
- port ( -- Imx pins
- DataxD : inout std_logic_vector(15 downto 0);
- AddrxDI : in std_logic_vector(12 downto 0);
- WRxBI : in std_logic;
- RDxBI : in std_logic;
- CSxBI : in std_logic;
-
- --Our pins
- clk : in STD_LOGIC;
- button : in STD_LOGIC;
- led : out STD_LOGIC);
-end led_top;
-
-architecture structural of led_top is
-
- -- We declare the component we we'll use
- component clock_divider
- generic (ratio: integer);
- port (clk_in : in STD_LOGIC;
- clk_out : out STD_LOGIC);
- end component;
-
- component debouncer
- port (clk_100hz : in STD_LOGIC;
- button_in : in STD_LOGIC;
- button_debounced_out : out STD_LOGIC);
- end component;
-
- component flip_flop
- port (clk_100hz : in STD_LOGIC;
- switch_in_n : in STD_LOGIC;
- led_out : out STD_LOGIC);
- end component;
-
- -- internal signals
- signal clk_100hz : STD_LOGIC;
- signal button_debounced_n : STD_LOGIC;
-
- begin
-
- -- instantiate and connect the clock divider
- -- here we use a 96MHz/100Hz=960000 ratio
- i_clock_divider_identifier : clock_divider
- generic map(ratio => 960000)
- -- for simulation purpose use the following line
- -- instead of the previous
- -- generic map(ratio => 2)
-
- port map (clk_in => clk,
- clk_out => clk_100hz);
-
- --instantiate and connect the debouncer
- i_debouncer_identifier : debouncer
- port map (button_in => button,
- clk_100hz => clk_100hz,
- button_debounced_out => button_debounced_n);
-
- --instantiate and connect the flip flop
- i_flip_flop_identifier : flip_flop
- port map (clk_100hz => clk_100hz,
- switch_in_n => button_debounced_n,
- led_out => led);
-
-end structural;
-
Copied: trunk/firmware/leds/led_top.vhd (from rev 1110, trunk/firmware/led/led_top.vhd)
===================================================================
--- trunk/firmware/leds/led_top.vhd (rev 0)
+++ trunk/firmware/leds/led_top.vhd 2009-03-05 09:49:29 UTC (rev 1115)
@@ -0,0 +1,83 @@
+----------------------------------------------------------------------------------
+-- Company: Armadeus Project
+-- Engineer: Benoit Canet
+--
+-- Create Date: 22:37:46 04/12/2007
+-- Design Name:
+-- Module Name: led_top - structural
+-- Project Name:
+-- Target Devices:
+-- Tool versions:
+-- Description:
+--
+-- Dependencies:
+--
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+--
+----------------------------------------------------------------------------------
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+use IEEE.STD_LOGIC_ARITH.ALL;
+use IEEE.STD_LOGIC_UNSIGNED.ALL;
+
+entity led_top is
+ port (
+ clk : in STD_LOGIC;
+ button : in STD_LOGIC;
+ led : out STD_LOGIC);
+end led_top;
+
+architecture structural of led_top is
+
+ -- We declare the component we we'll use
+ component clock_divider
+ generic (ratio: integer);
+ port (clk_in : in STD_LOGIC;
+ clk_out : out STD_LOGIC);
+ end component;
+
+ component debouncer
+ port (clk_100hz : in STD_LOGIC;
+ button_in : in STD_LOGIC;
+ button_debounced_out : out STD_LOGIC);
+ end component;
+
+ component flip_flop
+ port (clk_100hz : in STD_LOGIC;
+ switch_in_n : in STD_LOGIC;
+ led_out : out STD_LOGIC);
+ end component;
+
+ -- internal signals
+ signal clk_100hz : STD_LOGIC;
+ signal button_debounced_n : STD_LOGIC;
+
+ begin
+
+ -- instantiate and connect the clock divider
+ -- here we use a 96MHz/100Hz=960000 ratio
+ i_clock_divider_identifier : clock_divider
+ generic map(ratio => 960000)
+ -- for simulation purpose use the following line
+ -- instead of the previous
+ -- generic map(ratio => 2)
+
+ port map (clk_in => clk,
+ clk_out => clk_100hz);
+
+ --instantiate and connect the debouncer
+ i_debouncer_identifier : debouncer
+ port map (button_in => button,
+ clk_100hz => clk_100hz,
+ button_debounced_out => button_debounced_n);
+
+ --instantiate and connect the flip flop
+ i_flip_flop_identifier : flip_flop
+ port map (clk_100hz => clk_100hz,
+ switch_in_n => button_debounced_n,
+ led_out => led);
+
+end structural;
+
Copied: trunk/firmware/leds/led_top_200k.bit (from rev 1111, trunk/firmware/led/led_top_200k.bit)
===================================================================
(Binary files differ)
Copied: trunk/firmware/leds/led_top_400k.bit (from rev 1111, trunk/firmware/led/led_top_400k.bit)
===================================================================
(Binary files differ)
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