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From: <Fa...@us...> - 2009-03-03 09:56:57
|
Revision: 1106
http://armadeus.svn.sourceforge.net/armadeus/?rev=1106&view=rev
Author: FabM
Date: 2009-03-03 09:56:47 +0000 (Tue, 03 Mar 2009)
Log Message:
-----------
[FIRMWARE] Cleanup wishbone_example directory
Modified Paths:
--------------
trunk/firmware/wishbone_example/README
trunk/firmware/wishbone_example/src/intercon.vhd
trunk/firmware/wishbone_example/src/wishbone/imx_wrapper.vhd
trunk/firmware/wishbone_example/src/wishbone/irq_mngr.vhd
trunk/firmware/wishbone_example/src/wishbone/syscon.vhd
Added Paths:
-----------
trunk/firmware/wishbone_example/src/wb_button.vhd
trunk/firmware/wishbone_example/src/wb_led.ucf
trunk/firmware/wishbone_example/src/wb_led.vhd
trunk/firmware/wishbone_example/src/wb_top.vhd
trunk/firmware/wishbone_example/testbench/wb_top_tb.vhd
Removed Paths:
-------------
trunk/firmware/wishbone_example/src/Wb_button.vhd
trunk/firmware/wishbone_example/src/Wb_led.ucf
trunk/firmware/wishbone_example/src/Wb_led.vhd
trunk/firmware/wishbone_example/src/Wb_top.vhd
trunk/firmware/wishbone_example/testbench/Wb_top_tb.vhd
Modified: trunk/firmware/wishbone_example/README
===================================================================
--- trunk/firmware/wishbone_example/README 2009-03-02 16:14:50 UTC (rev 1105)
+++ trunk/firmware/wishbone_example/README 2009-03-03 09:56:47 UTC (rev 1106)
@@ -1,22 +1,22 @@
This project is an exemple for wishbone interface . There are three Wb slaves :
* irq_mngr : this slave joins irq from others wishbone IP and
- send it to i.mx processor.To manage these irq
- two registers are available :
- irq_mask ( addr : 0x0000) : enable irq writing 1
- irq_pend/irq_ack (addr : 0x0002) : writing 1 acknowledge irq
- and reading 1 inform that an irq pending.
- This design use one irq for button push and release.
+ send it to i.mx processor.To manage these irq
+ two registers are available :
+ irq_mask ( addr : 0x0000) : enable irq writing 1
+ irq_pend/irq_ack (addr : 0x0002) : writing 1 acknowledge irq
+ and reading 1 inform that an irq pending.
+ This design use one irq for button push and release.
-* Wb_led : a simple led register, one led is branched on register LSB.
- To switch on led write '0' on led register. Address register
- is :
- LED (addr : 0x0004)
-* Wb_button: Simple button register, when button is pressed, register LSB
- is '0', and when it's release LSB is '1'. On each switching
- an interuption is send to irq_mngr.
- button (addr : 0x0008)
+* wb_led : a simple led register, one led is branched on register LSB.
+ To switch on led write '0' on led register. Address register
+ is :
+ LED (addr : 0x0004) : on/off led
+* wb_button: Simple button register, when button is pressed, register LSB
+ is '0', and when it's release LSB is '1'. On each switching
+ an interuption is send to irq_mngr. Address register is :
+ button (addr : 0x0008) : read pressed value
see
-http://www.armadeus.com/wiki/index.php?title=FpgaArchitecture#La_composition_du_syst.C3.A8me_Wishbone
-(french) for more information about designing wishbone IP.
+http://www.armadeus.com/wiki/index.php?title=A_simple_design_with_Wishbone_bus
+for more informations about this design.
Deleted: trunk/firmware/wishbone_example/src/Wb_button.vhd
===================================================================
--- trunk/firmware/wishbone_example/src/Wb_button.vhd 2009-03-02 16:14:50 UTC (rev 1105)
+++ trunk/firmware/wishbone_example/src/Wb_button.vhd 2009-03-03 09:56:47 UTC (rev 1106)
@@ -1,102 +0,0 @@
----------------------------------------------------------------------------
--- Company : ARMades Systems
--- Author(s) : Fabien Marteau <fab...@ar...>
---
--- Creation Date : 10/03/2008
--- File : Wb_button.vhd
---
--- Abstract :
---
------------------------------------------------------------------------------------
--- This program is free software; you can redistribute it and/or modify
--- it under the terms of the GNU General Public License as published by
--- the Free Software Foundation; either version 2, or (at your option)
--- any later version.
---
--- This program is distributed in the hope that it will be useful,
--- but WITHOUT ANY WARRANTY; without even the implied warranty of
--- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
--- GNU General Public License for more details.
---
--- You should have received a copy of the GNU General Public License
--- along with this program; if not, write to the Free Software
--- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-----------------------------------------------------------------------------------
-
-
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
-use IEEE.numeric_std.all;
-
----------------------------------------------------------------------------
-Entity Wb_button is
----------------------------------------------------------------------------
- port
- (
- -- global signals
- gls_reset : in std_logic ;
- gls_clk : in std_logic ;
- -- Wishbone signals
--- wbs_writedata : in std_logic_vector( 15 downto 0);
- wbs_readdata : out std_logic_vector( 15 downto 0);
- wbs_strobe : in std_logic ;
- wbs_write : in std_logic ;
- wbs_ack : out std_logic;
- -- irq
- wbs_irq_s : out std_logic ;
- -- fpga input
- button : in std_logic
- );
-end entity;
-
-
----------------------------------------------------------------------------
-Architecture Wb_button_1 of Wb_button is
- ---------------------------------------------------------------------------
- signal button_r : std_logic ;
- signal reg : std_logic_vector( 15 downto 0);
-begin
-
- -- connect button
- cbutton : process(gls_clk,gls_reset)
- begin
- if gls_reset = '1' then
- reg <= (others => '0');
- elsif rising_edge(gls_clk) then
- reg <= "000000000000000"&button;
- end if;
- end process cbutton;
-
-
- -- rise interruption
- pbutton : process(gls_clk,gls_reset)
- begin
- if gls_reset = '1' then
- wbs_irq_s <= '0';
- button_r <= '0';
- elsif rising_edge(gls_clk) then
- if button_r /= button then
- wbs_irq_s <= '1';
- else
- wbs_irq_s <= '0';
- end if;
- button_r <= button;
- end if;
- end process pbutton;
-
- -- register reading process
- pread : process(gls_clk,gls_reset)
- begin
- if(gls_reset = '1') then
- wbs_ack <= '0';
- wbs_readdata <= (others => '0');
- elsif(falling_edge(gls_clk)) then
- wbs_ack <= '1';
- if(wbs_strobe = '1' and wbs_write = '0')then
- wbs_readdata <= reg;
- end if;
- end if;
- end process pread;
-
-end architecture Wb_button_1;
-
Deleted: trunk/firmware/wishbone_example/src/Wb_led.ucf
===================================================================
--- trunk/firmware/wishbone_example/src/Wb_led.ucf 2009-03-02 16:14:50 UTC (rev 1105)
+++ trunk/firmware/wishbone_example/src/Wb_led.ucf 2009-03-03 09:56:47 UTC (rev 1106)
@@ -1,60 +0,0 @@
-
-
-# Clock at 96MHzi
-NET "clk" LOC = "P55" | IOSTANDARD = LVCMOS33 ;
-NET "clk" TNM_NET = "clk";
-TIMESPEC "TS_clk" = PERIOD "clk" 10.42 ns HIGH 50 %;
-
-# IMX controls
-NET "imx_cs_n" LOC = "P59" | IOSTANDARD = LVCMOS33;
-NET "imx_eb3_n" LOC = "P60" | IOSTANDARD = LVCMOS33;
-NET "imx_oe_n" LOC = "P63" | IOSTANDARD = LVCMOS33;
-
-# IMX interruption
-NET "imx_irq" LOC = "P68" | IOSTANDARD = LVCMOS33;
-
-# IMX address bus
-NET "imx_addr<1>" LOC = "P23" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<2>" LOC = "P24" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<3>" LOC = "P25" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<4>" LOC = "P26" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<5>" LOC = "P27" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<6>" LOC = "P28" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<7>" LOC = "P30" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<8>" LOC = "P31" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<9>" LOC = "P32" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<10>" LOC = "P33" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<11>" LOC = "P35" | IOSTANDARD = LVCMOS33;
-NET "imx_addr<12>" LOC = "P36" | IOSTANDARD = LVCMOS33;
-
-# IMX data bus
-NET "imx_data<0>" LOC = "P1" | IOSTANDARD = LVCMOS33;
-NET "imx_data<1>" LOC = "P2" | IOSTANDARD = LVCMOS33;
-NET "imx_data<2>" LOC = "P4" | IOSTANDARD = LVCMOS33;
-NET "imx_data<3>" LOC = "P5" | IOSTANDARD = LVCMOS33;
-NET "imx_data<4>" LOC = "P6" | IOSTANDARD = LVCMOS33;
-NET "imx_data<5>" LOC = "P7" | IOSTANDARD = LVCMOS33;
-NET "imx_data<6>" LOC = "P8" | IOSTANDARD = LVCMOS33;
-NET "imx_data<7>" LOC = "P10" | IOSTANDARD = LVCMOS33;
-NET "imx_data<8>" LOC = "P11" | IOSTANDARD = LVCMOS33;
-NET "imx_data<9>" LOC = "P12" | IOSTANDARD = LVCMOS33;
-NET "imx_data<10>" LOC = "P13" | IOSTANDARD = LVCMOS33;
-NET "imx_data<11>" LOC = "P14" | IOSTANDARD = LVCMOS33;
-NET "imx_data<12>" LOC = "P15" | IOSTANDARD = LVCMOS33;
-NET "imx_data<13>" LOC = "P17" | IOSTANDARD = LVCMOS33;
-NET "imx_data<14>" LOC = "P18" | IOSTANDARD = LVCMOS33;
-NET "imx_data<15>" LOC = "P20" | IOSTANDARD = LVCMOS33;
-
-###############################################
-# fpga specific
-###############################################
-
-# led output
-NET "LED" LOC = "P116" | IOSTANDARD = LVCMOS33 ;
-# Button input
-NET "button" LOC = "P141" | IOSTANDARD = LVCMOS33 ;
-
-# Test (X10 on devfull) connection
-#NET "imx_data0_test" LOC = "P102" | IOSTANDARD = LVCMOS33 ;
-#NET "imx_addr1_test" LOC = "P97" | IOSTANDARD = LVCMOS33 ;
-
Deleted: trunk/firmware/wishbone_example/src/Wb_led.vhd
===================================================================
--- trunk/firmware/wishbone_example/src/Wb_led.vhd 2009-03-02 16:14:50 UTC (rev 1105)
+++ trunk/firmware/wishbone_example/src/Wb_led.vhd 2009-03-03 09:56:47 UTC (rev 1106)
@@ -1,78 +0,0 @@
----------------------------------------------------------------------------
--- Company : ARMadeus Systems
--- Author(s) : Fabien Marteau
---
--- Creation Date : 05/03/2008
--- File : Wb_led.vhd
---
--- Abstract : drive one led with Wishbone bus
---
-------------------------------------------------------------------------------------
--- This program is free software; you can redistribute it and/or modify
--- it under the terms of the GNU General Public License as published by
--- the Free Software Foundation; either version 2, or (at your option)
--- any later version.
---
--- This program is distributed in the hope that it will be useful,
--- but WITHOUT ANY WARRANTY; without even the implied warranty of
--- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
--- GNU General Public License for more details.
---
--- You should have received a copy of the GNU General Public License
--- along with this program; if not, write to the Free Software
--- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-----------------------------------------------------------------------------------
-
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
-use IEEE.numeric_std.all;
-
------------------------------------------------------------------------
- Entity Wb_led is
------------------------------------------------------------------------
- port
- (
- -- Syscon signals
- gls_reset : in std_logic ;
- gls_clk : in std_logic ;
- -- Wishbone signals
- wbs_writedata : in std_logic_vector( 15 downto 0);
- wbs_readdata : out std_logic_vector( 15 downto 0);
- wbs_strobe : in std_logic ;
- wbs_write : in std_logic ;
- wbs_ack : out std_logic;
- -- out signals
- LED : out std_logic
- );
-end entity;
-
-
------------------------------------------------------------------------
-Architecture Wb_led_1 of Wb_led is
------------------------------------------------------------------------
- signal reg : std_logic_vector( 15 downto 0);
-begin
-
--- connect led
-LED <= reg(0);
-
--- manage register
-reg_bloc : process(gls_clk,gls_reset)
-begin
- if gls_reset = '1' then
- reg <= (others => '0');
- elsif rising_edge(gls_clk) then
- if ((wbs_strobe and wbs_write) = '1' ) then
- reg <= wbs_writedata;
- else
- reg <= reg;
- end if;
- end if;
-
-end process reg_bloc;
-
-wbs_ack <= wbs_strobe;
-wbs_readdata <= reg;
-
-end architecture Wb_led_1;
-
Deleted: trunk/firmware/wishbone_example/src/Wb_top.vhd
===================================================================
--- trunk/firmware/wishbone_example/src/Wb_top.vhd 2009-03-02 16:14:50 UTC (rev 1105)
+++ trunk/firmware/wishbone_example/src/Wb_top.vhd 2009-03-03 09:56:47 UTC (rev 1106)
@@ -1,386 +0,0 @@
----------------------------------------------------------------------------
--- Company : ARMadeus Systems
--- Author(s) : Fabien Marteau (fab...@ar...)
---
--- Creation Date : 05/03/2008
--- File : Wb_top.vhd
---
--- Abstract :
---
------------------------------------------------------------------------------------
--- This program is free software; you can redistribute it and/or modify
--- it under the terms of the GNU General Public License as published by
--- the Free Software Foundation; either version 2, or (at your option)
--- any later version.
---
--- This program is distributed in the hope that it will be useful,
--- but WITHOUT ANY WARRANTY; without even the implied warranty of
--- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
--- GNU General Public License for more details.
---
--- You should have received a copy of the GNU General Public License
--- along with this program; if not, write to the Free Software
--- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-----------------------------------------------------------------------------------
-
-
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
-use IEEE.numeric_std.all;
-
----------------------------------------------------------------------------
-Entity Wb_top is
----------------------------------------------------------------------------
-port
-(
- -- imx EIM connexion
- imx_addr : in std_logic_vector( 12 downto 0);
- imx_data : inout std_logic_vector( 15 downto 0);
- imx_cs_n : in std_logic;
- imx_eb3_n : in std_logic ;
- imx_oe_n : in std_logic ;
- -- clock
- clk : in std_logic ;
- -- fpga specific
- LED : out std_logic;
- button : in std_logic ;
-
- -- irq
- imx_irq : out std_logic
-
-);
-end entity;
-
-
----------------------------------------------------------------------------
-Architecture Wb_top_1 of Wb_top is
----------------------------------------------------------------------------
- component imx_wrapper
- port (
- -- i.MX Signals
- imx_address : in std_logic_vector(12 downto 1);
- imx_data : inout std_logic_vector(15 downto 0);
- imx_cs_n : in std_logic;
- imx_oe_n : in std_logic;
- imx_eb3_n : in std_logic;
-
- -- Global Signals
- gls_reset : in std_logic;
- gls_clk : in std_logic;
-
- -- Wishbone interface signals
- wbm_address : out std_logic_vector(12 downto 0); -- Address bus
- wbm_readdata : in std_logic_vector(15 downto 0); -- Data bus for read access
- wbm_writedata : out std_logic_vector(15 downto 0); -- Data bus for write access
- wbm_strobe : out std_logic; -- Data Strobe
- wbm_write : out std_logic; -- Write access
- wbm_sel : out std_logic_vector(1 downto 0); -- select LSB or/and MSB byte
- wbm_ack : in std_logic ;
- wbm_cycle : out std_logic -- bus cycle in progress
- );
- end component;
-
- component syscon
- port(
- -- external signals
- ext_clk : in std_logic ;
- ext_reset : in std_logic ;
- --internal signals
- gls_clk : out std_logic ;
- gls_reset : out std_logic
- );
- end component;
-
- component intercon
- port (
- -- imx wishbone master connexion
- gls_reset_m1 : out std_logic ;
- gls_clk_m1 : out std_logic ;
-
- wbm_address_m1 : in std_logic_vector( 12 downto 0);
- wbm_readdata_m1 : out std_logic_vector( 15 downto 0);
- wbm_writedata_m1 : in std_logic_vector( 15 downto 0);
- wbm_strobe_m1 : in std_logic ;
- wbm_write_m1 : in std_logic ;
- wbm_sel_m1 : in std_logic_vector( 1 downto 0);
- wbm_ack_m1 : out std_logic ;
- wbm_cycle_m1 : in std_logic ;
-
- -- led wishbone slave connexion
- gls_reset_s1 : out std_logic ;
- gls_clk_s1 : out std_logic ;
- wbs_writedata_s1 : out std_logic_vector( 15 downto 0);
- wbs_readdata_s1 : in std_logic_vector( 15 downto 0);
- wbs_strobe_s1 : out std_logic ;
- wbs_write_s1 : out std_logic ;
- wbs_ack_s1 : in std_logic ;
-
- -- button slave connexion
- gls_reset_s2 : out std_logic ;
- gls_clk_s2 : out std_logic ;
--- wbs_writedata_s2 : out std_logic_vector( 15 downto 0);
- wbs_readdata_s2 : in std_logic_vector( 15 downto 0);
- wbs_strobe_s2 : out std_logic ;
- wbs_write_s2 : out std_logic ;
- wbs_ack_s2 : in std_logic ;
-
- wbs_irq_s2 : in std_logic ;
-
- -- irq slave connexion
- gls_reset_s3 : out std_logic ;
- gls_clk_s3 : out std_logic ;
- wbs_address_s3 : out std_logic ;
- wbs_writedata_s3 : out std_logic_vector( 15 downto 0);
- wbs_readdata_s3 : in std_logic_vector( 15 downto 0);
- wbs_strobe_s3 : out std_logic ;
- wbs_write_s3 : out std_logic ;
- wbs_ack_s3 : in std_logic ;
- wbs_irq_s3 : out std_logic;
-
- -- syscon connection
- gls_reset_sys : in std_logic ;
- gls_clk_sys : in std_logic
- );
- end component intercon;
-
- component Wb_led
- port(
- -- Syscon signals
- gls_reset : in std_logic ;
- gls_clk : in std_logic ;
- -- Wishbone signals
- wbs_writedata : in std_logic_vector( 15 downto 0);
- wbs_readdata : out std_logic_vector( 15 downto 0);
- wbs_strobe : in std_logic ;
- wbs_write : in std_logic ;
- wbs_ack : out std_logic;
- -- out signals
- LED : out std_logic
- );
- end component;
-
- component Wb_button
- port (
- -- global signals
- gls_reset : in std_logic ;
- gls_clk : in std_logic ;
--- wbs_writedata : in std_logic_vector( 15 downto 0);
- wbs_readdata : out std_logic_vector( 15 downto 0);
- wbs_strobe : in std_logic ;
- wbs_write : in std_logic ;
- wbs_ack : out std_logic ;
-
- -- irq
- wbs_irq_s : out std_logic ;
-
- -- fpga input
- button : in std_logic
- );
- end component;
-
- component irq_mngr
- generic
- (
- irq_count : integer := 1;
- irq_level : std_logic := '1'
- );
- port (
- -- Global Signals
- gls_clk : in std_logic;
- gls_reset : in std_logic;
-
- -- Wishbone interface signals
- wbs_s1_address : in std_logic; -- Address bus
- wbs_s1_readdata : out std_logic_vector(15 downto 0); -- Data bus for read access
- wbs_s1_writedata : in std_logic_vector(15 downto 0); -- Data bus for write access
- wbs_s1_ack : out std_logic; -- Access acknowledge
- wbs_s1_strobe : in std_logic; -- Data Strobe
- wbs_s1_write : in std_logic; -- Write access
- -- irq from other IP
- wbs_s1_irq : in std_logic_vector(irq_count-1 downto 0);
-
- -- Component external signals
- gls_irq : out std_logic -- IRQ request
- );
- end component irq_mngr;
-
- -- irq_mngr connection signal
- signal gls_clk_s3 : std_logic ;
- signal gls_reset_s3 : std_logic ;
- signal wbs_address_s3 : std_logic ;
- signal wbs_readdata_s3 : std_logic_vector(15 downto 0);
- signal wbs_writedata_s3: std_logic_vector( 15 downto 0);
- signal wbs_ack_s3 : std_logic ;
- signal wbs_strobe_s3 : std_logic ;
- signal wbs_write_s3 : std_logic ;
- signal wbs_irq_s3 : std_logic;
-
- -- button connection signal
- signal gls_reset_s2 : std_logic ;
- signal gls_clk_s2 : std_logic ;
- signal wbs_readdata_s2 : std_logic_vector(15 downto 0);
---signal wbs_writedata_s2: std_logic_vector( 15 downto 0);
- signal wbs_ack_s2 : std_logic ;
- signal wbs_strobe_s2 : std_logic ;
- signal wbs_write_s2 : std_logic ;
-
- signal wbs_irq_s2 : std_logic ;
-
- -- imx_wrapper connection signals
- signal gls_reset_m1 : std_logic ;
- Signal gls_clk_m1 : std_logic ;
- signal wbm_address_m1 : std_logic_vector( 12 downto 0);
- Signal wbm_readdata_m1 : std_logic_vector( 15 downto 0);
- Signal wbm_writedata_m1 : std_logic_vector( 15 downto 0);
- Signal wbm_strobe_m1 : std_logic ;
- signal wbm_write_m1 : std_logic ;
- Signal wbm_sel_m1 : std_logic_vector( 1 downto 0);
- signal wbm_ack_m1 : std_logic ;
- Signal wbm_cycle_m1 : std_logic ;
-
- -- led connection signals
- Signal gls_reset_s1 : std_logic ;
- Signal gls_clk_s1 : std_logic ;
- Signal wbs_writedata_s1 : std_logic_vector( 15 downto 0);
- Signal wbs_readdata_s1 : std_logic_vector( 15 downto 0);
- Signal wbs_strobe_s1 : std_logic ;
- Signal wbs_write_s1 : std_logic ;
- Signal wbs_ack_s1 : std_logic ;
-
- -- syscon connection signals
- Signal gls_reset_sys : std_logic ;
- Signal gls_clk_sys : std_logic ;
-
-
-begin
-
- connect_imx_wrapper : imx_wrapper
- port map (
- imx_address => imx_addr(12 downto 1),
- imx_data => imx_data,
- imx_cs_n => imx_cs_n,
- imx_oe_n => imx_oe_n,
- imx_eb3_n => imx_eb3_n,
-
- gls_reset => gls_reset_m1,
- gls_clk => gls_clk_m1,
-
- wbm_address => wbm_address_m1,
- wbm_readdata => wbm_readdata_m1,
- wbm_writedata => wbm_writedata_m1,
- wbm_strobe => wbm_strobe_m1,
- wbm_write => wbm_write_m1,
- wbm_sel => wbm_sel_m1,
- wbm_ack => wbm_ack_m1,
- wbm_cycle => wbm_cycle_m1
- );
-
- connect_Wb_led : Wb_led
- port map (
- gls_reset => gls_reset_s1,
- gls_clk => gls_clk_s1,
-
- wbs_writedata => wbs_writedata_s1,
- wbs_readdata => wbs_readdata_s1,
- wbs_strobe => wbs_strobe_s1,
- wbs_write => wbs_write_s1,
- wbs_ack => wbs_ack_s1,
-
- LED => LED
- );
-
- connect_syscon : syscon
- port map (
- ext_clk => clk,
- ext_reset => '0',
-
- gls_clk => gls_clk_sys,
- gls_reset => gls_reset_sys
- );
-
- connect_intercon : intercon
- port map (
- -- imx_wrapper connexion
- gls_reset_m1 => gls_reset_m1,
- gls_clk_m1 => gls_clk_m1,
- wbm_address_m1 => wbm_address_m1,
- wbm_readdata_m1 => wbm_readdata_m1,
- wbm_writedata_m1 => wbm_writedata_m1,
- wbm_strobe_m1 => wbm_strobe_m1,
- wbm_write_m1 => wbm_write_m1,
- wbm_sel_m1 => wbm_sel_m1,
- wbm_ack_m1 => wbm_ack_m1,
- wbm_cycle_m1 => wbm_cycle_m1,
- -- led connexion
- gls_reset_s1 => gls_reset_s1,
- gls_clk_s1 => gls_clk_s1,
- wbs_writedata_s1 => wbs_writedata_s1,
- wbs_readdata_s1 => wbs_readdata_s1,
- wbs_strobe_s1 => wbs_strobe_s1,
- wbs_write_s1 => wbs_write_s1,
- wbs_ack_s1 => wbs_ack_s1,
- -- button connexion
- gls_reset_s2 => gls_reset_s2,
- gls_clk_s2 => gls_clk_s2,
--- wbs_writedata_s2 => wbs_writedata_s2,
- wbs_readdata_s2 => wbs_readdata_s2,
- wbs_strobe_s2 => wbs_strobe_s2,
- wbs_write_s2 => wbs_write_s2,
- wbs_ack_s2 => wbs_ack_s2,
-
- wbs_irq_s2 => wbs_irq_s2,
- -- irq connexion
- gls_reset_s3 => gls_reset_s3,
- gls_clk_s3 => gls_clk_s3,
- wbs_address_s3 => wbs_address_s3,
- wbs_writedata_s3 => wbs_writedata_s3,
- wbs_readdata_s3 => wbs_readdata_s3,
- wbs_strobe_s3 => wbs_strobe_s3,
- wbs_write_s3 => wbs_write_s3,
- wbs_ack_s3 => wbs_ack_s3,
- wbs_irq_s3 => wbs_irq_s3,
- -- global signals
- gls_reset_sys => gls_reset_sys,
- gls_clk_sys => gls_clk_sys
- );
-
- connect_button : Wb_button
- port map (
- -- global signals
- gls_reset => gls_reset_s2,
- gls_clk => gls_clk_s2,
--- wbs_writedata => wbs_writedata_s2,
- wbs_readdata => wbs_readdata_s2,
- wbs_strobe => wbs_strobe_s2,
- wbs_write => wbs_write_s2,
- wbs_ack => wbs_ack_s2,
-
- -- irq
- wbs_irq_s => wbs_irq_s2,
-
- -- fpga input
- button => button
- );
-
- connect_irq_mngr : irq_mngr
- port map (
- -- Global Signals
- gls_clk => gls_clk_s3,
- gls_reset => gls_reset_s3,
-
- -- Wishbone interface signals
- wbs_s1_address => wbs_address_s3, -- Address bus
- wbs_s1_readdata => wbs_readdata_s3, -- Data bus for read access
- wbs_s1_writedata => wbs_writedata_s3, -- Data bus for write access
- wbs_s1_ack => wbs_ack_s3, -- Access acknowledge
- wbs_s1_strobe => wbs_strobe_s3, -- Data Strobe
- wbs_s1_write => wbs_write_s3, -- Write access
- -- irq from other IP
- wbs_s1_irq(0) => wbs_irq_s3,
-
- -- Component external signals
- gls_irq => imx_irq
- );
-
-end architecture Wb_top_1;
-
Modified: trunk/firmware/wishbone_example/src/intercon.vhd
===================================================================
--- trunk/firmware/wishbone_example/src/intercon.vhd 2009-03-02 16:14:50 UTC (rev 1105)
+++ trunk/firmware/wishbone_example/src/intercon.vhd 2009-03-03 09:56:47 UTC (rev 1106)
@@ -32,134 +32,126 @@
---------------------------------------------------------------------------
Entity intercon is
---------------------------------------------------------------------------
- port
- (
- -- imx wishbone master connexion
- gls_reset_m1 : out std_logic ;
- gls_clk_m1 : out std_logic ;
+ port
+ (
+ -- imx wishbone master connexion
+ gls_reset_m1 : out std_logic ;
+ gls_clk_m1 : out std_logic ;
- wbm_address_m1 : in std_logic_vector( 12 downto 0);
- wbm_readdata_m1 : out std_logic_vector( 15 downto 0);
- wbm_writedata_m1 : in std_logic_vector( 15 downto 0);
- wbm_strobe_m1 : in std_logic ;
- wbm_write_m1 : in std_logic ;
- wbm_sel_m1 : in std_logic_vector( 1 downto 0);
- wbm_ack_m1 : out std_logic ;
- wbm_cycle_m1 : in std_logic ;
+ wbm_address_m1 : in std_logic_vector( 12 downto 0);
+ wbm_readdata_m1 : out std_logic_vector( 15 downto 0);
+ wbm_writedata_m1 : in std_logic_vector( 15 downto 0);
+ wbm_strobe_m1 : in std_logic ;
+ wbm_write_m1 : in std_logic ;
+ wbm_sel_m1 : in std_logic_vector( 1 downto 0);
+ wbm_ack_m1 : out std_logic ;
+ wbm_cycle_m1 : in std_logic ;
- -- led wishbone slave connexion
- gls_reset_s1 : out std_logic ;
- gls_clk_s1 : out std_logic ;
- wbs_writedata_s1 : out std_logic_vector( 15 downto 0);
- wbs_readdata_s1 : in std_logic_vector( 15 downto 0);
- wbs_strobe_s1 : out std_logic ;
- wbs_write_s1 : out std_logic ;
- wbs_ack_s1 : in std_logic ;
+ -- led wishbone slave connexion
+ gls_reset_s1 : out std_logic ;
+ gls_clk_s1 : out std_logic ;
+ wbs_writedata_s1 : out std_logic_vector( 15 downto 0);
+ wbs_readdata_s1 : in std_logic_vector( 15 downto 0);
+ wbs_strobe_s1 : out std_logic ;
+ wbs_write_s1 : out std_logic ;
+ wbs_ack_s1 : in std_logic ;
- -- button slave connexion
- gls_reset_s2 : out std_logic ;
- gls_clk_s2 : out std_logic ;
- wbs_readdata_s2 : in std_logic_vector( 15 downto 0);
- wbs_strobe_s2 : out std_logic ;
- wbs_write_s2 : out std_logic ;
- wbs_ack_s2 : in std_logic ;
+ -- button slave connexion
+ gls_reset_s2 : out std_logic ;
+ gls_clk_s2 : out std_logic ;
+ wbs_readdata_s2 : in std_logic_vector( 15 downto 0);
+ wbs_strobe_s2 : out std_logic ;
+ wbs_write_s2 : out std_logic ;
+ wbs_ack_s2 : in std_logic ;
+ wbs_irq_s2 : in std_logic ;
- wbs_irq_s2 : in std_logic ;
+ -- irq slave connexion
+ gls_reset_s3 : out std_logic ;
+ gls_clk_s3 : out std_logic ;
+ wbs_address_s3 : out std_logic ;
+ wbs_writedata_s3 : out std_logic_vector( 15 downto 0);
+ wbs_readdata_s3 : in std_logic_vector( 15 downto 0);
+ wbs_strobe_s3 : out std_logic ;
+ wbs_write_s3 : out std_logic ;
+ wbs_ack_s3 : in std_logic ;
+ wbs_irq_s3 : out std_logic ;
- -- irq slave connexion
- gls_reset_s3 : out std_logic ;
- gls_clk_s3 : out std_logic ;
- wbs_address_s3 : out std_logic ;
- wbs_writedata_s3 : out std_logic_vector( 15 downto 0);
- wbs_readdata_s3 : in std_logic_vector( 15 downto 0);
- wbs_strobe_s3 : out std_logic ;
- wbs_write_s3 : out std_logic ;
- wbs_ack_s3 : in std_logic ;
- wbs_irq_s3 : out std_logic ;
-
- -- syscon connection
- gls_reset_sys : in std_logic ;
- gls_clk_sys : in std_logic
- );
+ -- syscon connection
+ gls_reset_sys : in std_logic ;
+ gls_clk_sys : in std_logic
+ );
end entity;
---------------------------------------------------------------------------
Architecture intercon_1 of intercon is
---------------------------------------------------------------------------
- signal led_cs : std_logic ;
- signal button_cs : std_logic ;
- signal irq_cs : std_logic ;
- signal cs :std_logic_vector( 2 downto 0);
+ signal led_cs : std_logic ;
+ signal button_cs : std_logic ;
+ signal irq_cs : std_logic ;
+ signal cs :std_logic_vector( 2 downto 0);
begin
- -- clock and reset management
- gls_reset_s1 <= gls_reset_sys;
- gls_clk_s1 <= gls_clk_sys;
+ -- clock and reset management
+ gls_reset_s1 <= gls_reset_sys;
+ gls_clk_s1 <= gls_clk_sys;
- gls_reset_s2 <= gls_reset_sys;
- gls_clk_s2 <= gls_clk_sys;
+ gls_reset_s2 <= gls_reset_sys;
+ gls_clk_s2 <= gls_clk_sys;
- gls_reset_s3 <= gls_reset_sys;
- gls_clk_s3 <= gls_clk_sys;
+ gls_reset_s3 <= gls_reset_sys;
+ gls_clk_s3 <= gls_clk_sys;
- gls_reset_m1 <= gls_reset_sys;
- gls_clk_m1 <= gls_clk_sys;
+ gls_reset_m1 <= gls_reset_sys;
+ gls_clk_m1 <= gls_clk_sys;
- -----------------------------
- -- master => slave connexions
- -----------------------------
- -- address decode
- irq_cs <= '1' when wbm_address_m1 = "0000000000000" or wbm_address_m1 = "0000000000010"
- else '0';
- led_cs <= '1' when wbm_address_m1 = "0000000000100"
- else '0';
- button_cs <= '1' when wbm_address_m1 = "0000000001000"
- else '0';
+ -----------------------------
+ -- master => slave connexions
+ -----------------------------
+ -- address decode
+ irq_cs <= '1' when wbm_address_m1 = "0000000000000" or wbm_address_m1 = "0000000000010"
+ else '0';
+ led_cs <= '1' when wbm_address_m1 = "0000000000100"
+ else '0';
+ button_cs <= '1' when wbm_address_m1 = "0000000001000"
+ else '0';
- wbs_address_s3 <= wbm_address_m1(1);
+ wbs_address_s3 <= wbm_address_m1(1);
- -- control signals
- -- for led (s1)
- wbs_writedata_s1 <= wbm_writedata_m1 when (wbm_write_m1 and led_cs)='1'
- else (others => '0');
- wbs_strobe_s1 <= (wbm_strobe_m1 and led_cs);
- wbs_write_s1 <= (wbm_write_m1 and led_cs);
- -- for button(s2) read only
- wbs_strobe_s2 <= (wbm_strobe_m1 and button_cs);
- wbs_write_s2 <= '0';
+ -- control signals
+ -- for led (s1)
+ wbs_writedata_s1 <= wbm_writedata_m1 when (wbm_write_m1 and led_cs)='1'
+ else (others => '0');
+ wbs_strobe_s1 <= (wbm_strobe_m1 and led_cs);
+ wbs_write_s1 <= (wbm_write_m1 and led_cs);
+ -- for button(s2) read only
+ wbs_strobe_s2 <= (wbm_strobe_m1 and button_cs);
+ wbs_write_s2 <= '0';
- -- for irq (s3)
- wbs_writedata_s3 <= wbm_writedata_m1 when (wbm_write_m1 and irq_cs)='1'
- else (others => '0');
- wbs_strobe_s3 <= (wbm_strobe_m1 and irq_cs);
- wbs_write_s3 <= (wbm_write_m1 and irq_cs);
+ -- for irq (s3)
+ wbs_writedata_s3 <= wbm_writedata_m1 when (wbm_write_m1 and irq_cs)='1'
+ else (others => '0');
+ wbs_strobe_s3 <= (wbm_strobe_m1 and irq_cs);
+ wbs_write_s3 <= (wbm_write_m1 and irq_cs);
- -----------------------------
- -- slave => master connexions
- -----------------------------
- cs(0) <= led_cs;
- cs(1) <= button_cs;
- cs(2) <= irq_cs;
+ -----------------------------
+ -- slave => master connexions
+ -----------------------------
+ cs(0) <= led_cs;
+ cs(1) <= button_cs;
+ cs(2) <= irq_cs;
- with cs select
- wbm_readdata_m1 <= wbs_readdata_s1 when "001",
- wbs_readdata_s2 when "010",
- wbs_readdata_s3 when "100",
- (others => '0') when others;
- with cs select
- wbm_ack_m1 <= wbs_ack_s1 when "001",
- wbs_ack_s2 when "010",
- wbs_ack_s3 when "100",
- '0' when others;
+ with cs select
+ wbm_readdata_m1 <= wbs_readdata_s1 when "001",
+ wbs_readdata_s2 when "010",
+ wbs_readdata_s3 when "100",
+ (others => '0') when others;
+ with cs select
+ wbm_ack_m1 <= wbs_ack_s1 when "001",
+ wbs_ack_s2 when "010",
+ wbs_ack_s3 when "100",
+ '0' when others;
+ -- irq management
+ wbs_irq_s3 <= wbs_irq_s2;
- -- irq management
- wbs_irq_s3 <= wbs_irq_s2;
-
- -- open connexion
--- wbm_sel_m1 => open;
--- wbm_cycle_m1 => open;
--- wbs_ack_s1 => open;
-
end architecture intercon_1;
-
Copied: trunk/firmware/wishbone_example/src/wb_button.vhd (from rev 1105, trunk/firmware/wishbone_example/src/Wb_button.vhd)
===================================================================
--- trunk/firmware/wishbone_example/src/wb_button.vhd (rev 0)
+++ trunk/firmware/wishbone_example/src/wb_button.vhd 2009-03-03 09:56:47 UTC (rev 1106)
@@ -0,0 +1,101 @@
+---------------------------------------------------------------------------
+-- Company : ARMades Systems
+-- Author(s) : Fabien Marteau <fab...@ar...>
+--
+-- Creation Date : 10/03/2008
+-- File : wb_button.vhd
+--
+-- Abstract :
+--
+-----------------------------------------------------------------------------------
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2, or (at your option)
+-- any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+----------------------------------------------------------------------------------
+
+
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+use IEEE.numeric_std.all;
+
+---------------------------------------------------------------------------
+Entity wb_button is
+---------------------------------------------------------------------------
+ port
+ (
+ -- global signals
+ gls_reset : in std_logic ;
+ gls_clk : in std_logic ;
+ -- Wishbone signals
+ wbs_readdata : out std_logic_vector( 15 downto 0);
+ wbs_strobe : in std_logic ;
+ wbs_write : in std_logic ;
+ wbs_ack : out std_logic;
+ -- irq
+ wbs_irq_s : out std_logic ;
+ -- fpga input
+ button : in std_logic
+ );
+end entity;
+
+
+---------------------------------------------------------------------------
+Architecture wb_button_1 of wb_button is
+ ---------------------------------------------------------------------------
+ signal button_r : std_logic ;
+ signal reg : std_logic_vector( 15 downto 0);
+begin
+
+ -- connect button
+ cbutton : process(gls_clk,gls_reset)
+ begin
+ if gls_reset = '1' then
+ reg <= (others => '0');
+ elsif rising_edge(gls_clk) then
+ reg <= "000000000000000"&button;
+ end if;
+ end process cbutton;
+
+
+ -- rise interruption
+ pbutton : process(gls_clk,gls_reset)
+ begin
+ if gls_reset = '1' then
+ wbs_irq_s <= '0';
+ button_r <= '0';
+ elsif rising_edge(gls_clk) then
+ if button_r /= button then
+ wbs_irq_s <= '1';
+ else
+ wbs_irq_s <= '0';
+ end if;
+ button_r <= button;
+ end if;
+ end process pbutton;
+
+ -- register reading process
+ pread : process(gls_clk,gls_reset)
+ begin
+ if(gls_reset = '1') then
+ wbs_ack <= '0';
+ wbs_readdata <= (others => '0');
+ elsif(falling_edge(gls_clk)) then
+ wbs_ack <= '1';
+ if(wbs_strobe = '1' and wbs_write = '0')then
+ wbs_readdata <= reg;
+ end if;
+ end if;
+ end process pread;
+
+end architecture wb_button_1;
+
Copied: trunk/firmware/wishbone_example/src/wb_led.ucf (from rev 1105, trunk/firmware/wishbone_example/src/Wb_led.ucf)
===================================================================
--- trunk/firmware/wishbone_example/src/wb_led.ucf (rev 0)
+++ trunk/firmware/wishbone_example/src/wb_led.ucf 2009-03-03 09:56:47 UTC (rev 1106)
@@ -0,0 +1,59 @@
+
+# Clock at 96MHzi
+NET "clk" LOC = "P55" | IOSTANDARD = LVCMOS33 ;
+NET "clk" TNM_NET = "clk";
+TIMESPEC "TS_clk" = PERIOD "clk" 10.42 ns HIGH 50 %;
+
+# IMX controls
+NET "imx_cs_n" LOC = "P59" | IOSTANDARD = LVCMOS33;
+NET "imx_eb3_n" LOC = "P60" | IOSTANDARD = LVCMOS33;
+NET "imx_oe_n" LOC = "P63" | IOSTANDARD = LVCMOS33;
+
+# IMX interruption
+NET "imx_irq" LOC = "P68" | IOSTANDARD = LVCMOS33;
+
+# IMX address bus
+NET "imx_addr<1>" LOC = "P23" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<2>" LOC = "P24" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<3>" LOC = "P25" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<4>" LOC = "P26" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<5>" LOC = "P27" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<6>" LOC = "P28" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<7>" LOC = "P30" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<8>" LOC = "P31" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<9>" LOC = "P32" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<10>" LOC = "P33" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<11>" LOC = "P35" | IOSTANDARD = LVCMOS33;
+NET "imx_addr<12>" LOC = "P36" | IOSTANDARD = LVCMOS33;
+
+# IMX data bus
+NET "imx_data<0>" LOC = "P1" | IOSTANDARD = LVCMOS33;
+NET "imx_data<1>" LOC = "P2" | IOSTANDARD = LVCMOS33;
+NET "imx_data<2>" LOC = "P4" | IOSTANDARD = LVCMOS33;
+NET "imx_data<3>" LOC = "P5" | IOSTANDARD = LVCMOS33;
+NET "imx_data<4>" LOC = "P6" | IOSTANDARD = LVCMOS33;
+NET "imx_data<5>" LOC = "P7" | IOSTANDARD = LVCMOS33;
+NET "imx_data<6>" LOC = "P8" | IOSTANDARD = LVCMOS33;
+NET "imx_data<7>" LOC = "P10" | IOSTANDARD = LVCMOS33;
+NET "imx_data<8>" LOC = "P11" | IOSTANDARD = LVCMOS33;
+NET "imx_data<9>" LOC = "P12" | IOSTANDARD = LVCMOS33;
+NET "imx_data<10>" LOC = "P13" | IOSTANDARD = LVCMOS33;
+NET "imx_data<11>" LOC = "P14" | IOSTANDARD = LVCMOS33;
+NET "imx_data<12>" LOC = "P15" | IOSTANDARD = LVCMOS33;
+NET "imx_data<13>" LOC = "P17" | IOSTANDARD = LVCMOS33;
+NET "imx_data<14>" LOC = "P18" | IOSTANDARD = LVCMOS33;
+NET "imx_data<15>" LOC = "P20" | IOSTANDARD = LVCMOS33;
+
+###############################################
+# fpga specific
+###############################################
+
+# led output
+NET "LED" LOC = "P116" | IOSTANDARD = LVCMOS33 ;
+# Button input
+NET "button" LOC = "P141" | IOSTANDARD = LVCMOS33 ;
+
+# Test (X10 on devfull) connection
+#NET "imx_data0_test" LOC = "P102" | IOSTANDARD = LVCMOS33 ;
+#NET "imx_addr1_test" LOC = "P97" | IOSTANDARD = LVCMOS33 ;
+
Copied: trunk/firmware/wishbone_example/src/wb_led.vhd (from rev 1105, trunk/firmware/wishbone_example/src/Wb_led.vhd)
===================================================================
--- trunk/firmware/wishbone_example/src/wb_led.vhd (rev 0)
+++ trunk/firmware/wishbone_example/src/wb_led.vhd 2009-03-03 09:56:47 UTC (rev 1106)
@@ -0,0 +1,78 @@
+---------------------------------------------------------------------------
+-- Company : ARMadeus Systems
+-- Author(s) : Fabien Marteau
+--
+-- Creation Date : 05/03/2008
+-- File : wb_led.vhd
+--
+-- Abstract : drive one led with Wishbone bus
+--
+------------------------------------------------------------------------------------
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2, or (at your option)
+-- any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+----------------------------------------------------------------------------------
+
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+use IEEE.numeric_std.all;
+
+-----------------------------------------------------------------------
+ Entity wb_led is
+-----------------------------------------------------------------------
+ port
+ (
+ -- Syscon signals
+ gls_reset : in std_logic ;
+ gls_clk : in std_logic ;
+ -- Wishbone signals
+ wbs_writedata : in std_logic_vector( 15 downto 0);
+ wbs_readdata : out std_logic_vector( 15 downto 0);
+ wbs_strobe : in std_logic ;
+ wbs_write : in std_logic ;
+ wbs_ack : out std_logic;
+ -- out signals
+ LED : out std_logic
+ );
+end entity;
+
+
+-----------------------------------------------------------------------
+Architecture wb_led_1 of wb_led is
+-----------------------------------------------------------------------
+ signal reg : std_logic_vector( 15 downto 0);
+begin
+
+ -- connect led
+ LED <= reg(0);
+
+ -- manage register
+ reg_bloc : process(gls_clk,gls_reset)
+ begin
+ if gls_reset = '1' then
+ reg <= (others => '0');
+ elsif rising_edge(gls_clk) then
+ if ((wbs_strobe and wbs_write) = '1' ) then
+ reg <= wbs_writedata;
+ else
+ reg <= reg;
+ end if;
+ end if;
+
+ end process reg_bloc;
+
+ wbs_ack <= wbs_strobe;
+ wbs_readdata <= reg;
+
+end architecture wb_led_1;
+
Copied: trunk/firmware/wishbone_example/src/wb_top.vhd (from rev 1105, trunk/firmware/wishbone_example/src/Wb_top.vhd)
===================================================================
--- trunk/firmware/wishbone_example/src/wb_top.vhd (rev 0)
+++ trunk/firmware/wishbone_example/src/wb_top.vhd 2009-03-03 09:56:47 UTC (rev 1106)
@@ -0,0 +1,368 @@
+---------------------------------------------------------------------------
+-- Company : ARMadeus Systems
+-- Author(s) : Fabien Marteau (fab...@ar...)
+--
+-- Creation Date : 05/03/2008
+-- File : Wb_top.vhd
+--
+-- Abstract :
+--
+-----------------------------------------------------------------------------------
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2, or (at your option)
+-- any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program; if not, write to the Free Software
+-- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+----------------------------------------------------------------------------------
+
+
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+use IEEE.numeric_std.all;
+
+---------------------------------------------------------------------------
+Entity wb_top is
+---------------------------------------------------------------------------
+port
+(
+ -- imx EIM connexion
+ imx_addr : in std_logic_vector( 12 downto 0);
+ imx_data : inout std_logic_vector( 15 downto 0);
+ imx_cs_n : in std_logic;
+ imx_eb3_n : in std_logic ;
+ imx_oe_n : in std_logic ;
+ -- clock
+ clk : in std_logic ;
+ -- fpga specific
+ LED : out std_logic;
+ button : in std_logic ;
+ -- irq
+ imx_irq : out std_logic
+);
+end entity;
+
+
+---------------------------------------------------------------------------
+architecture wb_top_1 of wb_top is
+---------------------------------------------------------------------------
+ component imx_wrapper
+ port (
+ -- i.MX Signals
+ imx_address : in std_logic_vector(12 downto 1);
+ imx_data : inout std_logic_vector(15 downto 0);
+ imx_cs_n : in std_logic;
+ imx_oe_n : in std_logic;
+ imx_eb3_n : in std_logic;
+
+ -- Global Signals
+ gls_reset : in std_logic;
+ gls_clk : in std_logic;
+
+ -- Wishbone interface signals
+ wbm_address : out std_logic_vector(12 downto 0); -- Address bus
+ wbm_readdata : in std_logic_vector(15 downto 0); -- Data bus for read access
+ wbm_writedata : out std_logic_vector(15 downto 0); -- Data bus for write access
+ wbm_strobe : out std_logic; -- Data Strobe
+ wbm_write : out std_logic; -- Write access
+ wbm_sel : out std_logic_vector(1 downto 0); -- select LSB or/and MSB byte
+ wbm_ack : in std_logic ;
+ wbm_cycle : out std_logic -- bus cycle in progress
+ );
+ end component;
+
+ component syscon
+ port(
+ -- external signals
+ ext_clk : in std_logic ;
+ ext_reset : in std_logic ;
+ --internal signals
+ gls_clk : out std_logic ;
+ gls_reset : out std_logic
+ );
+ end component;
+
+ component intercon
+ port (
+ -- imx wishbone master connexion
+ gls_reset_m1 : out std_logic ;
+ gls_clk_m1 : out std_logic ;
+
+ wbm_address_m1 : in std_logic_vector( 12 downto 0);
+ wbm_readdata_m1 : out std_logic_vector( 15 downto 0);
+ wbm_writedata_m1 : in std_logic_vector( 15 downto 0);
+ wbm_strobe_m1 : in std_logic ;
+ wbm_write_m1 : in std_logic ;
+ wbm_sel_m1 : in std_logic_vector( 1 downto 0);
+ wbm_ack_m1 : out std_logic ;
+ wbm_cycle_m1 : in std_logic ;
+
+ -- led wishbone slave connexion
+ gls_reset_s1 : out std_logic ;
+ gls_clk_s1 : out std_logic ;
+ wbs_writedata_s1 : out std_logic_vector( 15 downto 0);
+ wbs_readdata_s1 : in std_logic_vector( 15 downto 0);
+ wbs_strobe_s1 : out std_logic ;
+ wbs_write_s1 : out std_logic ;
+ wbs_ack_s1 : in std_logic ;
+
+ -- button slave connexion
+ gls_reset_s2 : out std_logic ;
+ gls_clk_s2 : out std_logic ;
+ wbs_readdata_s2 : in std_logic_vector( 15 downto 0);
+ wbs_strobe_s2 : out std_logic ;
+ wbs_write_s2 : out std_logic ;
+ wbs_ack_s2 : in std_logic ;
+
+ wbs_irq_s2 : in std_logic ;
+
+ -- irq slave connexion
+ gls_reset_s3 : out std_logic ;
+ gls_clk_s3 : out std_logic ;
+ wbs_address_s3 : out std_logic ;
+ wbs_writedata_s3 : out std_logic_vector( 15 downto 0);
+ wbs_readdata_s3 : in std_logic_vector( 15 downto 0);
+ wbs_strobe_s3 : out std_logic ;
+ wbs_write_s3 : out std_logic ;
+ wbs_ack_s3 : in std_logic ;
+ wbs_irq_s3 : out std_logic;
+
+ -- syscon connection
+ gls_reset_sys : in std_logic ;
+ gls_clk_sys : in std_logic
+ );
+ end component intercon;
+
+ component wb_led
+ port(
+ -- Syscon signals
+ gls_reset : in std_logic ;
+ gls_clk : in std_logic ;
+ -- Wishbone signals
+ wbs_writedata : in std_logic_vector( 15 downto 0);
+ wbs_readdata : out std_logic_vector( 15 downto 0);
+ wbs_strobe : in std_logic ;
+ wbs_write : in std_logic ;
+ wbs_ack : out std_logic;
+ -- out signals
+ LED : out std_logic
+ );
+ end component;
+
+ component wb_button
+ port (
+ -- global signals
+ gls_reset : in std_logic ;
+ gls_clk : in std_logic ;
+ wbs_readdata : out std_logic_vector( 15 downto 0);
+ wbs_strobe : in std_logic ;
+ wbs_write : in std_logic ;
+ wbs_ack : out std_logic ;
+ -- irq
+ wbs_irq_s : out std_logic ;
+
+ -- fpga input
+ button : in std_logic
+ );
+ end component;
+
+ component irq_mngr
+ generic
+ (
+ irq_count : integer := 1;
+ irq_level : std_logic := '1'
+ );
+ port (
+ -- Global Signals
+ gls_clk : in std_logic;
+ gls_reset : in std_logic;
+
+ -- Wishbone interface signals
+ wbs_s1_address : in std_logic; -- Address bus
+ wbs_s1_readdata : out std_logic_vector(15 downto 0); -- Data bus for read access
+ wbs_s1_writedata : in std_logic_vector(15 downto 0); -- Data bus for write access
+ wbs_s1_ack : out std_logic; -- Access acknowledge
+ wbs_s1_strobe : in std_logic; -- Data Strobe
+ wbs_s1_write : in std_logic; -- Write access
+ -- irq from other IP
+ wbs_s1_irq : in std_logic_vector(irq_count-1 downto 0);
+ -- Component external signals
+ gls_irq : out std_logic -- IRQ request
+ );
+ end component irq_mngr;
+
+ -- irq_mngr connection signal
+ signal gls_clk_s3 : std_logic ;
+ signal gls_reset_s3 : std_logic ;
+ signal wbs_address_s3 : std_logic ;
+ signal wbs_readdata_s3 : std_logic_vector(15 downto 0);
+ signal wbs_writedata_s3: std_logic_vector( 15 downto 0);
+ signal wbs_ack_s3 : std_logic ;
+ signal wbs_strobe_s3 : std_logic ;
+ signal wbs_write_s3 : std_logic ;
+ signal wbs_irq_s3 : std_logic;
+
+ -- button connection signal
+ signal gls_reset_s2 : std_logic ;
+ signal gls_clk_s2 : std_logic ;
+ signal wbs_readdata_s2: std_logic_vector(15 downto 0);
+ signal wbs_ack_s2 : std_logic ;
+ signal wbs_strobe_s2 : std_logic ;
+ signal wbs_write_s2 : std_logic ;
+ signal wbs_irq_s2 : std_logic ;
+
+ -- imx_wrapper connection signals
+ signal gls_reset_m1 : std_logic ;
+ Signal gls_clk_m1 : std_logic ;
+ signal wbm_address_m1 : std_logic_vector( 12 downto 0);
+ Signal wbm_readdata_m1 : std_logic_vector( 15 downto 0);
+ Signal wbm_writedata_m1 : std_logic_vector( 15 downto 0);
+ Signal wbm_strobe_m1 : std_logic ;
+ signal wbm_write_m1 : std_logic ;
+ Signal wbm_sel_m1 : std_logic_vector( 1 downto 0);
+ signal wbm_ack_m1 : std_logic ;
+ Signal wbm_cycle_m1 : std_logic ;
+
+ -- led connection signals
+ Signal gls_reset_s1 : std_logic ;
+ Signal gls_clk_s1 : std_logic ;
+ Signal wbs_writedata_s1 : std_logic_vector( 15 downto 0);
+ Signal wbs_readdata_s1 : std_logic_vector( 15 downto 0);
+ Signal wbs_strobe_s1 : std_logic ;
+ Signal wbs_write_s1 : std_logic ;
+ Signal wbs_ack_s1 : std_logic ;
+
+ -- syscon connection signals
+ Signal gls_reset_sys : std_logic ;
+ Signal gls_clk_sys : std_logic ;
+
+begin
+
+ connect_imx_wrapper : imx_wrapper
+ port map (
+ imx_address => imx_addr(12 downto 1),
+ imx_data => imx_data,
+ imx_cs_n => imx_cs_n,
+ imx_oe_n => imx_oe_n,
+ imx_eb3_n => imx_eb3_n,
+
+ gls_reset => gls_reset_m1,
+ gls_clk => gls_clk_m1,
+
+ wbm_address => wbm_address_m1,
+ wbm_readdata => wbm_readdata_m1,
+ wbm_writedata => wbm_writedata_m1,
+ wbm_strobe => wbm_strobe_m1,
+ wbm_write => wbm_write_m1,
+ wbm_sel => wbm_sel_m1,
+ wbm_ack => wbm_ack_m1,
+ wbm_cycle => wbm_cycle_m1
+ );
+
+ connect_wb_led : wb_led
+ port map (
+ gls_reset => gls_reset_s1,
+ gls_clk => gls_clk_s1,
+
+ wbs_writedata => wbs_writedata_s1,
+ wbs_readdata => wbs_readdata_s1,
+ wbs_strobe => wbs_strobe_s1,
+ wbs_write => wbs_write_s1,
+ wbs_ack => wbs_ack_s1,
+
+ LED => LED
+ );
+
+ connect_syscon : syscon
+ port map (
+ ext_clk => clk,
+ ext_reset => '0',
+
+ gls_clk => gls_clk_sys,
+ gls_reset => gls_reset_sys
+ );
+
+ connect_intercon : intercon
+ port map (
+ -- imx_wrapper connexion
+ gls_reset_m1 => gls_reset_m1,
+ gls_clk_m1 => gls_clk_m1,
+ wbm_address_m1 => wbm_address_m1,
+ wbm_readdata_m1 => wbm_readdata_m1,
+ wbm_writedata_m1 => wbm_writedata_m1,
+ wbm_strobe_m1 => wbm_strobe_m1,
+ wbm_write_m1 => wbm_write_m1,
+ wbm_sel_m1 => wbm_sel_m1,
+ wbm_ack_m1 => wbm_ack_m1,
+ wbm_cycle_m1 => wbm_cycle_m1,
+ -- led connexion
+ gls_reset_s1 => gls_reset_s1,
+ gls_clk_s1 => gls_clk_s1,
+ wbs_writedata_s1 => wbs_writedata_s1,
+ wbs_readdata_s1 => wbs_readdata_s1,
+ wbs_strobe_s1 => wbs_strobe_s1,
+ wbs_write_s1 => wbs_write_s1,
+ wbs_ack_s1 => wbs_ack_s1,
+ -- button connexion
+ gls_reset_s2 => gls_reset_s2,
+ gls_clk_s2 => gls_clk_s2,
+ wbs_readdata_s2 => wbs_readdata_s2,
+ wbs_strobe_s2 => wbs_strobe_s2,
+ wbs_write_s2 => wbs_write_s2,
+ wbs_ack_s2 => wbs_ack_s2,
+ wbs_irq_s2 => wbs_irq_s2,
+ -- irq connexion
+ gls_reset_s3 => gls_reset_s3,
+ gls_clk_s3 => gls_clk_s3,
+ wbs_address_s3 => wbs_address_s3,
+ wbs_writedata_s3 => wbs_writedata_s3,
+ wbs_readdata_s3 => wbs_readdata_s3,
+ wbs_strobe_s3 => wbs_strobe_s3,
+ wbs_write_s3 => wbs_write_s3,
+ wbs_ack_s3 => wbs_ack_s3,
+ wbs_irq_s3 => wbs_irq_s3,
+ -- global signals
+ gls_reset_sys => gls_reset_sys,
+ gls_clk_sys => gls_clk_sys
+ );
+
+ connect_button : wb_button
+ port map (
+ -- global signals
+ gls_reset => gls_reset_s2,
+ gls_clk => gls_clk_s2,
+ wbs_readdata => wbs_readdata_s2,
+ wbs_strobe => wbs_strobe_s2,
+ wbs_write => wbs_write_s2,
+ wbs_ack => wbs_ack_s2,
+ -- irq
+ wbs_irq_s => wbs_irq_s2,
+ -- fpga input
+ button => button
+ );
+
+ connect_irq_mngr : irq_mngr
+ port map (
+ -- Global Signals
+ gls_clk => gls_clk_s3,
+ gls_reset => gls_reset_s3,
+ -- Wishbone interface signals
+ wbs_s1_address => wbs_address_s3, -- Address bus
+ wbs_s1_readdata => wbs_readdata_s3, -- Data bus for read access
+ wbs_s1_writedata => wbs_writedata_s3, -- Data bus for write access
+ wbs_s1_ack => wbs_ack_s3, -- Access acknowledge
+ wbs_s1_strobe => wbs_strobe_s3, -- Data Strobe
+ wbs_s1_write => wbs_write_s3, -- Write access
+ wbs_s1_irq(0) => wbs_irq_s3, -- irq from other IP
+ gls_irq => imx_irq -- Component external signals
+ );
+
+end architecture wb_top_1;
+
Modified: trunk/firmware/wishbone_example/src/wishbone/imx_wrapper.vhd
===================================================================
--- trunk/firmware/wishbone_example/src/wishbone/imx_wrapper.vhd 2009-03-02 16:14:50 UTC (rev 1105)
+++ trunk/firmware/wishbone_example/src/wishbone/imx_wrapper.vhd 2009-03-03 09:56:47 UTC (rev 1106)
@@ -49,20 +49,18 @@
imx_cs_n : in std_logic;
imx_oe_n : in std_logic;
imx_eb3_n : in std_logic;
-
-- Global Signals
gls_reset : in std_logic;
gls_clk : in std_logic;
-
-- Wishbone interface signals
- wbm_address : out std_logic_vector(12 downto 0); -- Address bus
- wbm_readdata : in std_logic_vector(15 downto 0); -- Data bus for read access
- wbm_writedata : out std_logic_vector(15 downto 0); -- Data bus for write access
- wbm_strobe : out std_logic; -- Data Strobe
- wbm_write : out std_logic; -- Write access
- wbm_sel : out std_logic_vector(1 downto 0); -- select LSB or/and MSB byte
- wbm_ack : in std_logic ; -- acknowledge
- wbm_cycle : out std_logic -- bus cycle in progress
+ wbm_address : out std_logic_vector(12 downto 0); -- Address bus
+ wbm_readdata : in std_logic_vector(15 downto 0); -- Data bus for read access
+ wbm_writedata: out std_logic_vector(15 downto 0); -- Data bus for write access
+ wbm_strobe : out std_logic; -- Data Strobe
+ wbm_write : out std_logic; -- Write access
+ wbm_sel : out std_logic_vector(1 downto 0); -- select LSB or/and MSB byte
+ wbm_ack : in std_logic ; -- acknowledge
+ wbm_cycle : out std_logic -- bus cycle in progress
);
end entity;
@@ -70,43 +68,43 @@
Architecture RTL of imx_wrapper is
-- ----------------------------------------------------------------------------
-signal write : std_logic;
-signal read : std_logic;
-signal sel : std_logic_vector(1 downto 0);
-signal strobe : std_logic;
-signal writedata : std_logic_vector(15 downto 0);
-signal address : std_logic_vector(12 downto 0);
+ signal write : std_logic;
+ signal read : std_logic;
+ signal sel : std_logic_vector(1 downto 0);
+ signal strobe : std_logic;
+ signal writedata : std_logic_vector(15 downto 0);
+ signal address : std_logic_vector(12 downto 0);
begin
--- ----------------------------------------------------------------------------
--- External signals synchronization process
--- ----------------------------------------------------------------------------
-process(gls_clk, gls_reset)
-begin
- if(gls_reset='1') then
- write <= '0';
- read <= '0';
- sel <= "00";
- strobe <= '0';
- writedata <= (others => '0');
- address <= (others => '0');
- elsif(rising_edge(gls_clk)) then
- strobe <= not (imx_cs_n) and not(imx_oe_n and imx_eb3_n);
- write <= not (imx_cs_n or imx_eb...
[truncated message content] |
|
From: <th...@us...> - 2009-03-02 16:14:56
|
Revision: 1105
http://armadeus.svn.sourceforge.net/armadeus/?rev=1105&view=rev
Author: thom25
Date: 2009-03-02 16:14:50 +0000 (Mon, 02 Mar 2009)
Log Message:
-----------
[LINUX] fix error in gpio.c (ticket #9)
Added Paths:
-----------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/313-apf27-armadeus-pengu_gpio.patch
Added: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/313-apf27-armadeus-pengu_gpio.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/313-apf27-armadeus-pengu_gpio.patch (rev 0)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/313-apf27-armadeus-pengu_gpio.patch 2009-03-02 16:14:50 UTC (rev 1105)
@@ -0,0 +1,18 @@
+This patch fixes an error in gpio.c (gpio_get)
+
+Signed-off-by: Nicolas Colombain <nic...@ar...>
+
+Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/ulpi.h
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/plat-mxc/gpio.c 2008-10-10 00:13:53.000000000 +0200
++++ linux-2.6.27.13/arch/arm/plat-mxc/gpio.c 2009-03-01 08:29:01.000000000 +0100
+@@ -187,8 +187,7 @@ static int mxc_gpio_get(struct gpio_chip
+ {
+ struct mxc_gpio_port *port =
+ container_of(chip, struct mxc_gpio_port, chip);
+-
+- return (__raw_readl(port->base + GPIO_DR) >> offset) & 1;
++ return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1;
+ }
+
+ static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-02-25 20:44:10
|
Revision: 1104
http://armadeus.svn.sourceforge.net/armadeus/?rev=1104&view=rev
Author: artemys
Date: 2009-02-25 20:44:05 +0000 (Wed, 25 Feb 2009)
Log Message:
-----------
[LINUX] Add NLS_ISO8859_1 by default on APF9328
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.27.13.config
Modified: trunk/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.27.13.config
===================================================================
--- trunk/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.27.13.config 2009-02-25 20:26:43 UTC (rev 1103)
+++ trunk/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.27.13.config 2009-02-25 20:44:05 UTC (rev 1104)
@@ -1379,7 +1379,7 @@
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
+CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-02-25 20:26:49
|
Revision: 1103
http://armadeus.svn.sourceforge.net/armadeus/?rev=1103&view=rev
Author: artemys
Date: 2009-02-25 20:26:43 +0000 (Wed, 25 Feb 2009)
Log Message:
-----------
[TOOLS] Add a script to ease ChangeLog generation
Modified Paths:
--------------
trunk/ChangeLog
Added Paths:
-----------
trunk/release/
trunk/release/changes.sh
Modified: trunk/ChangeLog
===================================================================
--- trunk/ChangeLog 2009-02-25 14:34:30 UTC (rev 1102)
+++ trunk/ChangeLog 2009-02-25 20:26:43 UTC (rev 1103)
@@ -1,16 +1,249 @@
ChangeLog file for Armadeus Project
-Changes to be released
-- [BUILDROOT] Predefine GCC 4.2.1 by default
-- [BUILDROOT] uppgrade MPFR to revision 2.3.2 fixing broken internet link issue
-- [UBOOT] upgrade to U-Boot release 1.3.4
-- [uClibc] undefine _POSIX_SPIN_LOCKS: still not yet implemented in uClibc 0.9.29
- thanks to Creber
+----
+
+Changes in release 3.0 (25 feb 2009 - SVN revisions 763 to 1097)
+
+* Buildroot:
+ Main changes: upgrade to 20081103 version, adding of AFP27 target, upgrade to GCC 4.2.1
+ Other changes:
+ - Deactivate ad9889 & testsuite packages for APF9328
+ - remove need of linux-2.6.XX- prefix in armadeus custom kernel patches
+ - Add ad9889ctl tool to buildroot
+ - Install all test scripts in the same dir
+ - Correct small bug in Makefile
+ - Put sdlwater in the right place and install it correctly
+ - Removes no more used alsa-driver package
+ - Makes madplayer work again
+ - upgrade and fix setserial 2.17-45
+ - delete deprecated cygwin patchs
+ - upgrade curl to buildroot libcurl
+ - upgrade package libpcap fixing patch failure
+ - Compiling pod drivers cleaned
+ - uClibc-0.9.29 pretends that spinclocks are available ("#define _POSIX_SPIN_LOCKS" in posix_opt.h) whereas for ARM, this functionality is currently in development. As a consequence, third party applications looking for this define to internally enable spinlocking may fail to compile. (As "clocktest" provided by Xenomai). This patch inhibits the faulty define. Thanks Creber
+ - upgrade to lcd4linux 0.10.1-RC2 and fix compilation failure
+ - Added alternate download site capabilities to autotool based package + mprf and tslib.
+ - [mplayer] armv4 does not support pld instruction
+ - Fixed busybox default configuration file.
+ - Fixed some path issue in default configuration
+ - Enable save/restore project config - including u-boot, uclibc and busybox configuration
+ - fixed patch failure when patch create new buildroot file - move tslib patch form patch directory to buidlroot/package/tslib
+ - Now generates automatically /etc/fb.modes depending on the framebuffer configuration at the first boot (corrects Bug [1980391]: Automatically generates /etc/fb.modes at startup)
+ - Makes tslib work with recent kernel
+ - Shrink size of mysql_client
+ - Now Linux is (again) compilable in a simple way (make in LINUX_DIR)
+ - Add a package to automatically install Armadeus validation testsuite
+ - ALSA is working again
+ - Add MySQL support module for Python
+ - re-populate default /dev even if we are now using mdev
+ - Don't try to mount configfs when doing mount -a
+ - Makes socketcan compilation works again + add test tools
+ - Add patch to allow madplay to compile for ALSA output
+ - corrects aplay: set_params:1012: unable to install sw params BUG
+ - Predefine GCC 4.2.1 by default
+ - Correct Bug [ 1981233 ] file_4.21.orig.tar.gz no more downloadable
+ - Change setserial download mirror
+ - SDL_ttf needs freetype package to compile
+ - strip cmd was not correct in sdl* packages
+ - Fixes bug 2019483 (SDL_ttf doesn't compile)
+ - Add Socket CAN package
+ - Add fr & de keyboard maps to rootfs skeleton
+ - Makes fbgrab package compilation produce a working executable
+ - Deactivate ivtv ouput when configuring mplayer
+ - Adding an usefull frame buffer grabber package (fbgrab)
+ - make apm9328 board deprecated and make the apf9328 the reference board
+ - Prevent /tmp to be remounted over and over when doing a mount -a (busybox mount doesn't check if filesystem is already mounted when called
+ - Add /etc/inetd.conf file with Telnet config already in
+ - added input devices to support keyboard and keypad
+ - fix bug 1904713: Unable to generate a JFFS2 image after a make
+* Linux:
+ Main changes: upgrade to 2.6.27, adding of APF27
+ Other changes:
+ - make MCP251x work again on APF27
+ - allow short circuit on headphone output for short time (tsc2101)
+ - allow tsc, max and mcp to be compiled as kernel module
+ - Makes spi_imx driver compiles as static
+ - Add CPU frequency scaling helpers to APF27
+ - Add some refinements in APF27 PM
+ - Add suspend of ISP1504 USB PHY
+ - Add power management infrastructure for APF27
+ - rename 2.6.23 armadeus linux patches to a more suitable name
+ - rename 2.6.27 armadeus linux patches to a more suitable name
+ - Makes tsc210x compiles with CONFIG_PM activated
+ - Add PHY power down + patch rework (APF27)
+ - Moves 2.6.27.2 patches to 2.6.27.13
+ - Custom MTD map is no more needed (APF9328)
+ - Reorg of imxmmc patches
+ - Correct wrong PWM init value for MTF-035 LCD
+ - Clean-up apf9328-isp1761 driver - hardware configuration moved to apf9328.c and u-boot 1.3.4 patch 3.5
+ - Improved console message with apf9328_devlight (ISP1760 device not present)
+ - Enhanced USB host driver ISP176x - Changed default configuration to statically include ISP1760 driver.
+ - Enhanced Identification test to check 32bit registers access (ISP176x)
+ - preliminary workaround to fix ISP1760/FTDI oops
+ - improved ISP1760 pre-fetch timing according datasheet - optimized RD/WR pulse width
+ - Add PWM driver to default apf9328 linux 2.6.27 config
+ - Makes PWM driver works again with 2.6.27 kernels
+ - Update desc. of backlight driver
+ - Factorizes common Makefile targets (default & clean) for Armadeus custom drivers
+ - Cleanup backlight driver to prepare i.MX27 compatibility
+ - improve tsc2102 driver
+ - Updates Armadeus custom drivers Makefiles with usage of new general Makefile.in
+ - Max1027: now handles conversion results from all scanning modes (10 is still perfectible)
+ - ALSA/TSC : imx_dma_request_by_prio() returns an available channel not an error.
+ - Activate EABI for 2.6.23 kernel (APF9328)
+ - Remove debugging + add ALSA in 2.6.23.1 APF9328 default config
+ - Updates Linux 2.6.23.1 APF9328 default MTD map to handle new FLASH partitionning
+ - Makes max1027 driver compiles again with Linux 2.6.23.1
+ - make mcp2515 working again
+ - make MAX1027 working again
+ - fpgaregs update
+ - Suppressing uart irq declarations [apf9328]
+ - Make uart2 work (apf9328)
+ - Remove fpga/dev_tools/fpgaaccess/Module.symvers from SVN (it's a generated file)
+ - Remove fpga/dev_tools/fpgaaccess/fpgaregs from SVN (it's a generated executable)
+ - Remove fpga/dev_tools/fpgaaccess/.tmp_versions/ directory from SVN (it's a temp dir)
+ - Move old FPGA led driver to fpga/others/
+ - imxlkeypad driver config should not depend on FPGA one
+ - Changed linux patch naming convention to support next buildroot migration
+ - Allows fpgaregs to be compiled directly from its directory
+ - Change backlight PWM reference clock for LQ043 and MTF-035 LCDs
+ - Add MAX1027 driver in the default configuration
+ - In new version of max1027 driver: now handle the numerous scan modes of the device + correct some bugs + integrate hwmon interface (if configured) of old driver + do some cleanup
+ - remove led.c file from Wb_led driver
+ - do some cleanup in Wb_led driver
+ - correct GPIO driver Makefile (SF bug 1901559)
+ - First (working) version of new (faster) MAX1027 driver.
+ - Changing fpga driver tree
+ - Refactoring of generic GPIO driver, for handling interrupts and pull-up, still long way to go to reach state of the art, but it's usable... ;-) Next step is to integrate JiBee's work.
+ - FPGA's irq_manager driver should not be compiled if not selected
+ - Add some (temporary) kernel patches to test serial and irq IPs
+ - Add driver for OpenCore IRQ manager (generated by POD)
+ - Add automatic generation of 013-imxfb patch + removing of PWM register update when doing imxfb_set_par()
+ - Rename 013 patch (in 2.6.23)
+ - Split 013-framebuffer patch in 2
+ - Split framebuff patch in 2: imxfb & logo
+ - Rename I2C patch
+ - remove warning in apf9328_lcd_config.h compilation
+ - Improve backlight handling for Sharp LQ043
+ - Add first version (without IT) of OpenCore 16550 serial IP driver
+ - uppgrade MPFR to revision 2.3.2 fixing broken internet link issue
+ - Cleanup apf9328_init() + remove unneeded request_mem_region(IMX_CS1_PHYS)
+ - Update some 2.6.23.1 patches with new automatically built warning
+ - Add APF9328 FPGA interrupt definition to apf9328.h & apf9328.c + little cleanup
+ - Add very first stage of tools to easily manage our Linux kernel patches generation/maintenance
+ - remove led.mod.c file from Wb_led driver
+ - Allows isp1761 driver to be compiled as static or module (even if it's not working when compiled as static: bug opened)
+ - patches splitting continues...
+ - Extract build part of 021-apf9328 patch
+ - 020-scbfb patch is no more used so rename it so it won't be applied
+ - Add first version of ALSA drivers for TSC2102 / i.MXL SSI (should produce sound :-) )
+ - Add comment in spi2-reg-irq-defines patch
+ - Split tsc2102 spi patch in 2 parts (driver/build) + do some defines update in tsc2102.h
+ - Extract defconfig part (not used) from apf9328.diff
+ - fix build error when PM is activated
+ - Fix bug 1960067: ISP1761 scratch register
+ - change UART/DM9000 irq trig method from level to edge. (adeos compatibility)
+ - fix error when writing on an ext2 SD/MMC
+ - Now keycodes can be passed as insmod/modprobe parameters to imxkeypad driver
+ - Move i.MXL matrix keypad driver back to its correct directory
+ - Add some commentaries in imxkeypad driver
+ - Correct false commentar in apf9328
+ - Modify 2.6.23.1 default config to allow automatic build works again and put Sharp LQ043 as default LCD
+ - Add (partial) 2.6.24 kernel support + libertas over SPI control
+ - Changed imxkeypad kernel default configuration to be built as a module.
+ - updated imx keypad driver compatibility with recent linux kernel and fixed some bugs.
+ - adjust usb host first read timing (ISP1761)
+ - new fpgaregs, to read/write in 16bits on fpga driver+binary
+ - fix warning in fpgaaccess.c
+ - Led driver with /dev, /sys and interruption
+* U-Boot:
+ Main changes: upgrade to 1.3.4, adding of APF27
+ Other changes:
+ - Add missing APF27 patches
+ - PCCR init value cleanup
+ - Fixed relocation status & some compilation warnings
+ - Reprogram eeprom only when it is needed
+ - update reference uboot image to the latest version of patch 3.5
+ - Changed CS3 timings to support ISP1760 USB Host controler
+ - added board name to CONFIG_ROOTPATH
+ - Remove unexpected user configuration from the configuration file apf9328.h
+ - Fixed software examples loading address issues
+ - 50ns read cycle for CS1 (FPGA)
+ - patch 3.0 supporting u-boot release 1.3.4
+* Other:
+ Build:
+ - Add envt variable for rootfs tar archive
+ - Removes warning in Makefile.in when building clean view
+ - Make it easier to get some important shell environment variables (for access to the most used Armadeus directories)
+ - Add helper to compile armadeus sub-systems (custom drivers for example)
+ - Move buildroot archive to SourceForge
+ - Add SDL build dir envt
+ - remove timestamp in automatically generated patches
+ Test:
+ - Correct Boa test
+ - Makes RTC test effective
+ - Add script for madplay
+ - Add APF27 support to some scripts
+ - Add script to test Lua
+ - Add script to test Python
+ - Add a test to check SDL is running
+ - Update touchscreen test
+ - Add a test for strace (to be improved)
+ - Add a test for Boa web server
+ - Add dir to store Buildroot packages tests + add mplayer one
+ - Add test script for ADC
+ - Add sound test to global launcher
+ - Add script to test ALSA/sound
+ - Move some tests to packages/
+ - Add script to test TV output
+ Demos:
+ - input_test was crashing on APF due to SDL_DOUBLEBUF option
+ - Add missing sprite file for input_test
+ - Now input_test can check: keypads, keyboards, mouses and joysticks/trackballs
+ - rename keypad tool (part2)
+ - Rename keypad_test to input_test
+ - Correct Armanoid Makefile to let it handle TARGET=arm
+ - Improve backlight tool (compiling and running on target
+ - Makes armanoid compiles again + install it in correct directories
+ - First version of SDL+Tslib backlight controller
+ - Backport from apf2/ branch correction (rev [789]: Armanoid compilation)
+ Firmware:
+ - POD was moved to its own repository: http://www.sf.net/projects/periphondemand
+ - Makefile and testbench corrections
+ - Unit test driver for i2c_ocores IP
+ - [BRAMTest] Address shifted
+ - New version of Yvan Roch's servo IP
+ - Rename wishbone example's directory
+ - [testbench] read/write function improvements (wsc can be set)
+ - Wisbone simple design example
+ - Simple design to switch led,[apf_pkg] package for simulate read and write (imx), [Xtools] some tools to report synthezis problems
+ Debug:
+ - New version of imxssi
+ - imxregs: makes the distinguish between the two SSI register sets on i.MX27
+ - Now imxregs has the same name for i.MXL & i.MX27
+ - imxssi: removes what imxregs is already doing (very well ;-) )
+ - Found 2 indent styles in imxssi so I applied the most common one to the whole file
+ - Save some files from the dark side of the Force (= DOS text format)
+ - Save some files from the dark side of the Force (= DOS text format)
+ - Add UART1 registers to imxregs
+ - fix bug when writing 16bits values in fpgaregs.c
+ - LGPMR renamed LSCR1 in imxregs
+ - Add watchdog & GPTimer registers access in imxregs
+ - imxregs: say when register is not found
+ Misc:
+ - Remove unused host/ dir
+ - add apf27 uboot recover tool
+ - Add a tool to control HDMI controller of APF27_DEV
+
+----
+
Changes in release 2.3 (11 February 2008)
- [BUILDROOT] Change FTP server for buildroot and fakeroot files
+----
+
Changes in release 2.2 (16 December 2007)
- [UBOOT] U-Boot 1.1.6 patched 2.6
- [UBOOT] set pullup by default on inputs
Added: trunk/release/changes.sh
===================================================================
--- trunk/release/changes.sh (rev 0)
+++ trunk/release/changes.sh 2009-02-25 20:26:43 UTC (rev 1103)
@@ -0,0 +1,60 @@
+#!/bin/bash
+
+TEMP_DIR=./tmp_log
+SVN_LOG=$TEMP_DIR/svn.log
+SVN_LOG_CLEAN=$TEMP_DIR/svn_clean.log
+LOG_CLEAN_TMP=$TEMP_DIR/svn_clean_tmp.log
+CHANGES_LINUX=$TEMP_DIR/linux.log
+CHANGES_UBOOT=$TEMP_DIR/uboot.log
+CHANGES_BUILDROOT=$TEMP_DIR/buildroot.log
+CHANGES_OTHER=$TEMP_DIR/other.log
+
+
+usage()
+{
+ echo
+ echo "$0 rev1 rev2: generates ChangeLog file for commit between rev1 and rev2 (included)"
+ echo
+}
+
+if [ "$#" != 2 ]; then
+ usage
+ exit 1
+fi
+
+mkdir -p $TEMP_DIR
+echo "Generating ChangeLog for revisions between $1 and $2 in" `pwd`
+
+if [ ! -f $SVN_LOG ]; then
+ svn log -r $2:$1 > $SVN_LOG
+fi
+# remove unneeded lines:
+cat $SVN_LOG | grep -v -e "-\{5,\}" | grep -v -e "^r[0-9]\{2,\}" > $SVN_LOG_CLEAN
+
+# separate sections:
+cat $SVN_LOG_CLEAN | grep -i "\[LINUX\]" > $CHANGES_LINUX
+cat $SVN_LOG_CLEAN | grep -iv "\[LINUX\]" > $LOG_CLEAN_TMP
+cat $LOG_CLEAN_TMP | grep -i "\[U[-]\{0,\}BOOT\]" > $CHANGES_UBOOT
+cat $LOG_CLEAN_TMP | grep -iv "\[U[-]\{0,\}BOOT\]" > $LOG_CLEAN_TMP.2
+cat $LOG_CLEAN_TMP.2 | grep -i "\[BUILDROOT\]" > $CHANGES_BUILDROOT
+cat $LOG_CLEAN_TMP.2 | grep -iv "\[BUILDROOT\]" > $LOG_CLEAN_TMP.3
+cat $LOG_CLEAN_TMP.3 > $CHANGES_OTHER
+
+# compose changelog with sections without empty lines:
+
+echo
+echo "Changes in release XXX ("`date`" - SVN revisions $1 to $2"
+echo
+echo "* Buildroot:"
+cat $CHANGES_BUILDROOT | grep -v "^$" | sed 's/\[[Bb][Uu][Ii][Ll][Dd][Rr][Oo][Oo][Tt]\]/ -/g'
+echo "* Linux:"
+cat $CHANGES_LINUX | grep -v "^$" | sed 's/\[[Ll][Ii][Nn][Uu][Xx]\]/ -/g'
+echo "* U-Boot:"
+cat $CHANGES_UBOOT | grep -v "^$" | sed 's/\[[Uu][-]\{0,\}[Bb][Oo][Oo][Tt]\]/ -/g'
+echo "* Other:"
+cat $CHANGES_OTHER | grep -v "^$"
+
+rm -rf $TEMP_DIR
+
+exit 0
+
Property changes on: trunk/release/changes.sh
___________________________________________________________________
Added: svn:executable
+ *
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|
|
From: <ar...@us...> - 2009-02-25 14:34:40
|
Revision: 1102
http://armadeus.svn.sourceforge.net/armadeus/?rev=1102&view=rev
Author: artemys
Date: 2009-02-25 14:34:30 +0000 (Wed, 25 Feb 2009)
Log Message:
-----------
[LINUX] Add NLS_ISO8859_1 by default for APF9328
Modified Paths:
--------------
tags/release-3.0/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.27.13.config
Modified: tags/release-3.0/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.27.13.config
===================================================================
--- tags/release-3.0/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.27.13.config 2009-02-25 10:27:38 UTC (rev 1101)
+++ tags/release-3.0/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.27.13.config 2009-02-25 14:34:30 UTC (rev 1102)
@@ -1379,7 +1379,7 @@
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
+CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-02-25 10:27:48
|
Revision: 1101
http://armadeus.svn.sourceforge.net/armadeus/?rev=1101&view=rev
Author: artemys
Date: 2009-02-25 10:27:38 +0000 (Wed, 25 Feb 2009)
Log Message:
-----------
Creates TAG for Armadeus 3.0 release
Added Paths:
-----------
tags/release-3.0/
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-02-25 10:23:52
|
Revision: 1100
http://armadeus.svn.sourceforge.net/armadeus/?rev=1100&view=rev
Author: artemys
Date: 2009-02-25 10:23:46 +0000 (Wed, 25 Feb 2009)
Log Message:
-----------
[BRANCH] Updates ChangeLog for release 3.0
Modified Paths:
--------------
branches/release-3.0/ChangeLog
Modified: branches/release-3.0/ChangeLog
===================================================================
--- branches/release-3.0/ChangeLog 2009-02-25 09:52:16 UTC (rev 1099)
+++ branches/release-3.0/ChangeLog 2009-02-25 10:23:46 UTC (rev 1100)
@@ -1,16 +1,249 @@
ChangeLog file for Armadeus Project
-Changes to be released
-- [BUILDROOT] Predefine GCC 4.2.1 by default
-- [BUILDROOT] uppgrade MPFR to revision 2.3.2 fixing broken internet link issue
-- [UBOOT] upgrade to U-Boot release 1.3.4
-- [uClibc] undefine _POSIX_SPIN_LOCKS: still not yet implemented in uClibc 0.9.29
- thanks to Creber
+----
+
+Changes in release 3.0 (25 feb 2009 - SVN revisions 763 to 1097)
+
+* Buildroot:
+ Main changes: upgrade to 20081103 version, adding of AFP27 target, upgrade to GCC 4.2.1
+ Other changes:
+ - Deactivate ad9889 & testsuite packages for APF9328
+ - remove need of linux-2.6.XX- prefix in armadeus custom kernel patches
+ - Add ad9889ctl tool to buildroot
+ - Install all test scripts in the same dir
+ - Correct small bug in Makefile
+ - Put sdlwater in the right place and install it correctly
+ - Removes no more used alsa-driver package
+ - Makes madplayer work again
+ - upgrade and fix setserial 2.17-45
+ - delete deprecated cygwin patchs
+ - upgrade curl to buildroot libcurl
+ - upgrade package libpcap fixing patch failure
+ - Compiling pod drivers cleaned
+ - uClibc-0.9.29 pretends that spinclocks are available ("#define _POSIX_SPIN_LOCKS" in posix_opt.h) whereas for ARM, this functionality is currently in development. As a consequence, third party applications looking for this define to internally enable spinlocking may fail to compile. (As "clocktest" provided by Xenomai). This patch inhibits the faulty define. Thanks Creber
+ - upgrade to lcd4linux 0.10.1-RC2 and fix compilation failure
+ - Added alternate download site capabilities to autotool based package + mprf and tslib.
+ - [mplayer] armv4 does not support pld instruction
+ - Fixed busybox default configuration file.
+ - Fixed some path issue in default configuration
+ - Enable save/restore project config - including u-boot, uclibc and busybox configuration
+ - fixed patch failure when patch create new buildroot file - move tslib patch form patch directory to buidlroot/package/tslib
+ - Now generates automatically /etc/fb.modes depending on the framebuffer configuration at the first boot (corrects Bug [1980391]: Automatically generates /etc/fb.modes at startup)
+ - Makes tslib work with recent kernel
+ - Shrink size of mysql_client
+ - Now Linux is (again) compilable in a simple way (make in LINUX_DIR)
+ - Add a package to automatically install Armadeus validation testsuite
+ - ALSA is working again
+ - Add MySQL support module for Python
+ - re-populate default /dev even if we are now using mdev
+ - Don't try to mount configfs when doing mount -a
+ - Makes socketcan compilation works again + add test tools
+ - Add patch to allow madplay to compile for ALSA output
+ - corrects aplay: set_params:1012: unable to install sw params BUG
+ - Predefine GCC 4.2.1 by default
+ - Correct Bug [ 1981233 ] file_4.21.orig.tar.gz no more downloadable
+ - Change setserial download mirror
+ - SDL_ttf needs freetype package to compile
+ - strip cmd was not correct in sdl* packages
+ - Fixes bug 2019483 (SDL_ttf doesn't compile)
+ - Add Socket CAN package
+ - Add fr & de keyboard maps to rootfs skeleton
+ - Makes fbgrab package compilation produce a working executable
+ - Deactivate ivtv ouput when configuring mplayer
+ - Adding an usefull frame buffer grabber package (fbgrab)
+ - make apm9328 board deprecated and make the apf9328 the reference board
+ - Prevent /tmp to be remounted over and over when doing a mount -a (busybox mount doesn't check if filesystem is already mounted when called
+ - Add /etc/inetd.conf file with Telnet config already in
+ - added input devices to support keyboard and keypad
+ - fix bug 1904713: Unable to generate a JFFS2 image after a make
+* Linux:
+ Main changes: upgrade to 2.6.27, adding of APF27
+ Other changes:
+ - make MCP251x work again on APF27
+ - allow short circuit on headphone output for short time (tsc2101)
+ - allow tsc, max and mcp to be compiled as kernel module
+ - Makes spi_imx driver compiles as static
+ - Add CPU frequency scaling helpers to APF27
+ - Add some refinements in APF27 PM
+ - Add suspend of ISP1504 USB PHY
+ - Add power management infrastructure for APF27
+ - rename 2.6.23 armadeus linux patches to a more suitable name
+ - rename 2.6.27 armadeus linux patches to a more suitable name
+ - Makes tsc210x compiles with CONFIG_PM activated
+ - Add PHY power down + patch rework (APF27)
+ - Moves 2.6.27.2 patches to 2.6.27.13
+ - Custom MTD map is no more needed (APF9328)
+ - Reorg of imxmmc patches
+ - Correct wrong PWM init value for MTF-035 LCD
+ - Clean-up apf9328-isp1761 driver - hardware configuration moved to apf9328.c and u-boot 1.3.4 patch 3.5
+ - Improved console message with apf9328_devlight (ISP1760 device not present)
+ - Enhanced USB host driver ISP176x - Changed default configuration to statically include ISP1760 driver.
+ - Enhanced Identification test to check 32bit registers access (ISP176x)
+ - preliminary workaround to fix ISP1760/FTDI oops
+ - improved ISP1760 pre-fetch timing according datasheet - optimized RD/WR pulse width
+ - Add PWM driver to default apf9328 linux 2.6.27 config
+ - Makes PWM driver works again with 2.6.27 kernels
+ - Update desc. of backlight driver
+ - Factorizes common Makefile targets (default & clean) for Armadeus custom drivers
+ - Cleanup backlight driver to prepare i.MX27 compatibility
+ - improve tsc2102 driver
+ - Updates Armadeus custom drivers Makefiles with usage of new general Makefile.in
+ - Max1027: now handles conversion results from all scanning modes (10 is still perfectible)
+ - ALSA/TSC : imx_dma_request_by_prio() returns an available channel not an error.
+ - Activate EABI for 2.6.23 kernel (APF9328)
+ - Remove debugging + add ALSA in 2.6.23.1 APF9328 default config
+ - Updates Linux 2.6.23.1 APF9328 default MTD map to handle new FLASH partitionning
+ - Makes max1027 driver compiles again with Linux 2.6.23.1
+ - make mcp2515 working again
+ - make MAX1027 working again
+ - fpgaregs update
+ - Suppressing uart irq declarations [apf9328]
+ - Make uart2 work (apf9328)
+ - Remove fpga/dev_tools/fpgaaccess/Module.symvers from SVN (it's a generated file)
+ - Remove fpga/dev_tools/fpgaaccess/fpgaregs from SVN (it's a generated executable)
+ - Remove fpga/dev_tools/fpgaaccess/.tmp_versions/ directory from SVN (it's a temp dir)
+ - Move old FPGA led driver to fpga/others/
+ - imxlkeypad driver config should not depend on FPGA one
+ - Changed linux patch naming convention to support next buildroot migration
+ - Allows fpgaregs to be compiled directly from its directory
+ - Change backlight PWM reference clock for LQ043 and MTF-035 LCDs
+ - Add MAX1027 driver in the default configuration
+ - In new version of max1027 driver: now handle the numerous scan modes of the device + correct some bugs + integrate hwmon interface (if configured) of old driver + do some cleanup
+ - remove led.c file from Wb_led driver
+ - do some cleanup in Wb_led driver
+ - correct GPIO driver Makefile (SF bug 1901559)
+ - First (working) version of new (faster) MAX1027 driver.
+ - Changing fpga driver tree
+ - Refactoring of generic GPIO driver, for handling interrupts and pull-up, still long way to go to reach state of the art, but it's usable... ;-) Next step is to integrate JiBee's work.
+ - FPGA's irq_manager driver should not be compiled if not selected
+ - Add some (temporary) kernel patches to test serial and irq IPs
+ - Add driver for OpenCore IRQ manager (generated by POD)
+ - Add automatic generation of 013-imxfb patch + removing of PWM register update when doing imxfb_set_par()
+ - Rename 013 patch (in 2.6.23)
+ - Split 013-framebuffer patch in 2
+ - Split framebuff patch in 2: imxfb & logo
+ - Rename I2C patch
+ - remove warning in apf9328_lcd_config.h compilation
+ - Improve backlight handling for Sharp LQ043
+ - Add first version (without IT) of OpenCore 16550 serial IP driver
+ - uppgrade MPFR to revision 2.3.2 fixing broken internet link issue
+ - Cleanup apf9328_init() + remove unneeded request_mem_region(IMX_CS1_PHYS)
+ - Update some 2.6.23.1 patches with new automatically built warning
+ - Add APF9328 FPGA interrupt definition to apf9328.h & apf9328.c + little cleanup
+ - Add very first stage of tools to easily manage our Linux kernel patches generation/maintenance
+ - remove led.mod.c file from Wb_led driver
+ - Allows isp1761 driver to be compiled as static or module (even if it's not working when compiled as static: bug opened)
+ - patches splitting continues...
+ - Extract build part of 021-apf9328 patch
+ - 020-scbfb patch is no more used so rename it so it won't be applied
+ - Add first version of ALSA drivers for TSC2102 / i.MXL SSI (should produce sound :-) )
+ - Add comment in spi2-reg-irq-defines patch
+ - Split tsc2102 spi patch in 2 parts (driver/build) + do some defines update in tsc2102.h
+ - Extract defconfig part (not used) from apf9328.diff
+ - fix build error when PM is activated
+ - Fix bug 1960067: ISP1761 scratch register
+ - change UART/DM9000 irq trig method from level to edge. (adeos compatibility)
+ - fix error when writing on an ext2 SD/MMC
+ - Now keycodes can be passed as insmod/modprobe parameters to imxkeypad driver
+ - Move i.MXL matrix keypad driver back to its correct directory
+ - Add some commentaries in imxkeypad driver
+ - Correct false commentar in apf9328
+ - Modify 2.6.23.1 default config to allow automatic build works again and put Sharp LQ043 as default LCD
+ - Add (partial) 2.6.24 kernel support + libertas over SPI control
+ - Changed imxkeypad kernel default configuration to be built as a module.
+ - updated imx keypad driver compatibility with recent linux kernel and fixed some bugs.
+ - adjust usb host first read timing (ISP1761)
+ - new fpgaregs, to read/write in 16bits on fpga driver+binary
+ - fix warning in fpgaaccess.c
+ - Led driver with /dev, /sys and interruption
+* U-Boot:
+ Main changes: upgrade to 1.3.4, adding of APF27
+ Other changes:
+ - Add missing APF27 patches
+ - PCCR init value cleanup
+ - Fixed relocation status & some compilation warnings
+ - Reprogram eeprom only when it is needed
+ - update reference uboot image to the latest version of patch 3.5
+ - Changed CS3 timings to support ISP1760 USB Host controler
+ - added board name to CONFIG_ROOTPATH
+ - Remove unexpected user configuration from the configuration file apf9328.h
+ - Fixed software examples loading address issues
+ - 50ns read cycle for CS1 (FPGA)
+ - patch 3.0 supporting u-boot release 1.3.4
+* Other:
+ Build:
+ - Add envt variable for rootfs tar archive
+ - Removes warning in Makefile.in when building clean view
+ - Make it easier to get some important shell environment variables (for access to the most used Armadeus directories)
+ - Add helper to compile armadeus sub-systems (custom drivers for example)
+ - Move buildroot archive to SourceForge
+ - Add SDL build dir envt
+ - remove timestamp in automatically generated patches
+ Test:
+ - Correct Boa test
+ - Makes RTC test effective
+ - Add script for madplay
+ - Add APF27 support to some scripts
+ - Add script to test Lua
+ - Add script to test Python
+ - Add a test to check SDL is running
+ - Update touchscreen test
+ - Add a test for strace (to be improved)
+ - Add a test for Boa web server
+ - Add dir to store Buildroot packages tests + add mplayer one
+ - Add test script for ADC
+ - Add sound test to global launcher
+ - Add script to test ALSA/sound
+ - Move some tests to packages/
+ - Add script to test TV output
+ Demos:
+ - input_test was crashing on APF due to SDL_DOUBLEBUF option
+ - Add missing sprite file for input_test
+ - Now input_test can check: keypads, keyboards, mouses and joysticks/trackballs
+ - rename keypad tool (part2)
+ - Rename keypad_test to input_test
+ - Correct Armanoid Makefile to let it handle TARGET=arm
+ - Improve backlight tool (compiling and running on target
+ - Makes armanoid compiles again + install it in correct directories
+ - First version of SDL+Tslib backlight controller
+ - Backport from apf2/ branch correction (rev [789]: Armanoid compilation)
+ Firmware:
+ - POD was moved to its own repository: http://www.sf.net/projects/periphondemand
+ - Makefile and testbench corrections
+ - Unit test driver for i2c_ocores IP
+ - [BRAMTest] Address shifted
+ - New version of Yvan Roch's servo IP
+ - Rename wishbone example's directory
+ - [testbench] read/write function improvements (wsc can be set)
+ - Wisbone simple design example
+ - Simple design to switch led,[apf_pkg] package for simulate read and write (imx), [Xtools] some tools to report synthezis problems
+ Debug:
+ - New version of imxssi
+ - imxregs: makes the distinguish between the two SSI register sets on i.MX27
+ - Now imxregs has the same name for i.MXL & i.MX27
+ - imxssi: removes what imxregs is already doing (very well ;-) )
+ - Found 2 indent styles in imxssi so I applied the most common one to the whole file
+ - Save some files from the dark side of the Force (= DOS text format)
+ - Save some files from the dark side of the Force (= DOS text format)
+ - Add UART1 registers to imxregs
+ - fix bug when writing 16bits values in fpgaregs.c
+ - LGPMR renamed LSCR1 in imxregs
+ - Add watchdog & GPTimer registers access in imxregs
+ - imxregs: say when register is not found
+ Misc:
+ - Remove unused host/ dir
+ - add apf27 uboot recover tool
+ - Add a tool to control HDMI controller of APF27_DEV
+
+----
+
Changes in release 2.3 (11 February 2008)
- [BUILDROOT] Change FTP server for buildroot and fakeroot files
+----
+
Changes in release 2.2 (16 December 2007)
- [UBOOT] U-Boot 1.1.6 patched 2.6
- [UBOOT] set pullup by default on inputs
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|
|
From: <Fa...@us...> - 2009-02-25 09:52:18
|
Revision: 1099
http://armadeus.svn.sourceforge.net/armadeus/?rev=1099&view=rev
Author: FabM
Date: 2009-02-25 09:52:16 +0000 (Wed, 25 Feb 2009)
Log Message:
-----------
[FIRMWARE] README file to describe projects
Added Paths:
-----------
trunk/firmware/README
Added: trunk/firmware/README
===================================================================
--- trunk/firmware/README (rev 0)
+++ trunk/firmware/README 2009-02-25 09:52:16 UTC (rev 1099)
@@ -0,0 +1,13 @@
+This directory contain FPGA projects that not included in POD
+(http://periphondemand.sourceforge.net/).
+
+* BRAMTest : This is a simple project that instantiate RAM included in Spartan
+ to test communication between i.MX and FPGA.
+* PS2 : IP to drive a ps2 keyboard
+* led : This project is described on ARMadeus Project wiki page
+ http://www.armadeus.com/wiki/index.php?title=FPGA_and_led
+ it help FPGA beginners to make a simple design.
+* servo : Drive multiple servo-motors.
+* sram_test : Drive external sram.
+* wishbone_example : This is a simple project to show a wishbone implementation.
+
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|
|
From: <Fa...@us...> - 2009-02-25 09:44:15
|
Revision: 1098
http://armadeus.svn.sourceforge.net/armadeus/?rev=1098&view=rev
Author: FabM
Date: 2009-02-25 09:44:13 +0000 (Wed, 25 Feb 2009)
Log Message:
-----------
[FIRMWARE] Do some cleaning
Removed Paths:
-------------
trunk/firmware/PS2_Opencore/
trunk/firmware/Xtools/
trunk/firmware/apf_pkg/
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|
|
From: <ar...@us...> - 2009-02-24 21:26:59
|
Revision: 1097
http://armadeus.svn.sourceforge.net/armadeus/?rev=1097&view=rev
Author: artemys
Date: 2009-02-24 21:26:43 +0000 (Tue, 24 Feb 2009)
Log Message:
-----------
[BRANCH] [BUILD] Add envt variable for rootfs tar archive
Modified Paths:
--------------
branches/release-3.0/Makefile
branches/release-3.0/Makefile.in
Modified: branches/release-3.0/Makefile
===================================================================
--- branches/release-3.0/Makefile 2009-02-24 21:25:39 UTC (rev 1096)
+++ branches/release-3.0/Makefile 2009-02-24 21:26:43 UTC (rev 1097)
@@ -162,8 +162,8 @@
shell_env:
@echo ARMADEUS_LINUX_DIR=$(ARMADEUS_LINUX_DIR) > $(ARMADEUS_ENV_FILE)
@echo ARMADEUS_ROOTFS_DIR=$(ARMADEUS_ROOTFS_DIR) >> $(ARMADEUS_ENV_FILE)
+ @echo ARMADEUS_ROOTFS_TAR=$(ARMADEUS_ROOTFS_TAR) >> $(ARMADEUS_ENV_FILE)
-
PHONY_TARGETS+=dummy all linux-menuconfig linux26 linux26-clean buildroot-clean buildroot-dirclean
PHONY_TARGETS+=menuconfig $(BUILDROOT_DIR)/.config shell_env
.PHONY: $(PHONY_TARGETS)
Modified: branches/release-3.0/Makefile.in
===================================================================
--- branches/release-3.0/Makefile.in 2009-02-24 21:25:39 UTC (rev 1096)
+++ branches/release-3.0/Makefile.in 2009-02-24 21:26:43 UTC (rev 1097)
@@ -26,6 +26,7 @@
ARMADEUS_UCLIBC_DIR=$(BUILDROOT_DIR)/toolchain_build_$(ARMADEUS_TARGET_ARCH)/uClibc-$(ARMADEUS_UCLIBC_VERSION)
ARMADEUS_BOARD_DIR=$(BUILDROOT_DIR)/target/device/armadeus/$(ARMADEUS_BOARD_NAME)/
ARMADEUS_ROOTFS_DIR=$(BUILDROOT_DIR)/project_build_$(ARMADEUS_TARGET_ARCH)/$(ARMADEUS_BOARD_NAME)/root
+ARMADEUS_ROOTFS_TAR=$(BUILDROOT_DIR)/binaries/$(ARMADEUS_BOARD_NAME)/$(ARMADEUS_BOARD_NAME)-rootfs.arm.tar
ARMADEUS_BUILD_DIR=$(BUILDROOT_DIR)/build_$(ARMADEUS_TARGET_ARCH)
ARMADEUS_SDL_DIR=$(ARMADEUS_BUILD_DIR)/SDL-$(ARMADEUS_SDL_VERSION)
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|
|
From: <ar...@us...> - 2009-02-24 21:25:45
|
Revision: 1096
http://armadeus.svn.sourceforge.net/armadeus/?rev=1096&view=rev
Author: artemys
Date: 2009-02-24 21:25:39 +0000 (Tue, 24 Feb 2009)
Log Message:
-----------
[BUILD] Add envt variable for rootfs tar archive
Modified Paths:
--------------
trunk/Makefile
trunk/Makefile.in
Modified: trunk/Makefile
===================================================================
--- trunk/Makefile 2009-02-24 17:22:54 UTC (rev 1095)
+++ trunk/Makefile 2009-02-24 21:25:39 UTC (rev 1096)
@@ -162,6 +162,7 @@
shell_env:
@echo ARMADEUS_LINUX_DIR=$(ARMADEUS_LINUX_DIR) > $(ARMADEUS_ENV_FILE)
@echo ARMADEUS_ROOTFS_DIR=$(ARMADEUS_ROOTFS_DIR) >> $(ARMADEUS_ENV_FILE)
+ @echo ARMADEUS_ROOTFS_TAR=$(ARMADEUS_ROOTFS_TAR) >> $(ARMADEUS_ENV_FILE)
PHONY_TARGETS+=dummy all linux-menuconfig linux26 linux26-clean buildroot-clean buildroot-dirclean
Modified: trunk/Makefile.in
===================================================================
--- trunk/Makefile.in 2009-02-24 17:22:54 UTC (rev 1095)
+++ trunk/Makefile.in 2009-02-24 21:25:39 UTC (rev 1096)
@@ -26,6 +26,7 @@
ARMADEUS_UCLIBC_DIR=$(BUILDROOT_DIR)/toolchain_build_$(ARMADEUS_TARGET_ARCH)/uClibc-$(ARMADEUS_UCLIBC_VERSION)
ARMADEUS_BOARD_DIR=$(BUILDROOT_DIR)/target/device/armadeus/$(ARMADEUS_BOARD_NAME)/
ARMADEUS_ROOTFS_DIR=$(BUILDROOT_DIR)/project_build_$(ARMADEUS_TARGET_ARCH)/$(ARMADEUS_BOARD_NAME)/root
+ARMADEUS_ROOTFS_TAR=$(BUILDROOT_DIR)/binaries/$(ARMADEUS_BOARD_NAME)/$(ARMADEUS_BOARD_NAME)-rootfs.arm.tar
ARMADEUS_BUILD_DIR=$(BUILDROOT_DIR)/build_$(ARMADEUS_TARGET_ARCH)
ARMADEUS_SDL_DIR=$(ARMADEUS_BUILD_DIR)/SDL-$(ARMADEUS_SDL_VERSION)
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|
|
From: <ar...@us...> - 2009-02-24 17:23:01
|
Revision: 1095
http://armadeus.svn.sourceforge.net/armadeus/?rev=1095&view=rev
Author: artemys
Date: 2009-02-24 17:22:54 +0000 (Tue, 24 Feb 2009)
Log Message:
-----------
[BUILDROOT] Deactivate ad9889 & testsuite packages for APF9328
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/apf9328/apf9328_defconfig
Modified: trunk/buildroot/target/device/armadeus/apf9328/apf9328_defconfig
===================================================================
--- trunk/buildroot/target/device/armadeus/apf9328/apf9328_defconfig 2009-02-24 17:21:28 UTC (rev 1094)
+++ trunk/buildroot/target/device/armadeus/apf9328/apf9328_defconfig 2009-02-24 17:22:54 UTC (rev 1095)
@@ -1,6 +1,6 @@
#
# Automatically generated make config: don't edit
-# Fri Jan 30 15:13:22 2009
+# Tue Feb 24 18:01:21 2009
#
BR2_HAVE_DOT_CONFIG=y
BR2_VERSION="0.10.0-svn"
@@ -450,7 +450,8 @@
# BR2_PACKAGE_WEBIF is not set
# BR2_PACKAGE_WIRELESS_TOOLS is not set
BR2_BLOCKDEV_SUPPORT=y
-BR2_PACKAGE_ARMADEUS_TESTSUITE=y
+# BR2_PACKAGE_ARMADEUS_TESTSUITE is not set
+# BR2_PACKAGE_AD9889CTRL is not set
BR2_PACKAGE_CH7024CTRL=y
#
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|
|
From: <ar...@us...> - 2009-02-24 17:21:32
|
Revision: 1094
http://armadeus.svn.sourceforge.net/armadeus/?rev=1094&view=rev
Author: artemys
Date: 2009-02-24 17:21:28 +0000 (Tue, 24 Feb 2009)
Log Message:
-----------
[BRANCH] [BUILDROOT] Deactivate ad9889 & testsuite packages for APF9328
Modified Paths:
--------------
branches/release-3.0/buildroot/target/device/armadeus/apf9328/apf9328_defconfig
Modified: branches/release-3.0/buildroot/target/device/armadeus/apf9328/apf9328_defconfig
===================================================================
--- branches/release-3.0/buildroot/target/device/armadeus/apf9328/apf9328_defconfig 2009-02-24 15:51:08 UTC (rev 1093)
+++ branches/release-3.0/buildroot/target/device/armadeus/apf9328/apf9328_defconfig 2009-02-24 17:21:28 UTC (rev 1094)
@@ -1,6 +1,6 @@
#
# Automatically generated make config: don't edit
-# Fri Jan 30 15:13:22 2009
+# Tue Feb 24 18:01:21 2009
#
BR2_HAVE_DOT_CONFIG=y
BR2_VERSION="0.10.0-svn"
@@ -450,7 +450,8 @@
# BR2_PACKAGE_WEBIF is not set
# BR2_PACKAGE_WIRELESS_TOOLS is not set
BR2_BLOCKDEV_SUPPORT=y
-BR2_PACKAGE_ARMADEUS_TESTSUITE=y
+# BR2_PACKAGE_ARMADEUS_TESTSUITE is not set
+# BR2_PACKAGE_AD9889CTRL is not set
BR2_PACKAGE_CH7024CTRL=y
#
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|
|
From: <ar...@us...> - 2009-02-24 15:51:12
|
Revision: 1093
http://armadeus.svn.sourceforge.net/armadeus/?rev=1093&view=rev
Author: artemys
Date: 2009-02-24 15:51:08 +0000 (Tue, 24 Feb 2009)
Log Message:
-----------
[LINUX] Cleanup commit 1090 about CAN on APF27
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch 2009-02-24 15:50:06 UTC (rev 1092)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch 2009-02-24 15:51:08 UTC (rev 1093)
@@ -29,7 +29,7 @@
index 0000000..43be336
--- /dev/null
+++ b/drivers/net/can/mcp251x.c
-@@ -0,0 +1,1006 @@
+@@ -0,0 +1,1004 @@
+/* drivers/net/can/mcp251x.c
+ *
+ * Driver for Microchip MCP251x CAN Controller with SPI Interface
@@ -458,6 +458,7 @@
+static void mcp251x_hw_wakeup(struct spi_device *spi)
+{
+ struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
++
+ priv->wake = 1;
+
+ /* Can only wake up by generating a wake-up interrupt. */
@@ -530,7 +531,6 @@
+ /* Put device into loopback mode */
+ mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_LOOPBACK);
+ } else {
-+
+ /* Put device into normal mode */
+ mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_NORMAL);
+
@@ -635,7 +635,6 @@
+ u8 intf;
+
+ for (;;) {
-+
+ if (priv->wake) {
+ /* Wait whilst the device wakes up */
+ int i = 200 * (128 * USEC_PER_SEC / pdata->oscillator_frequency);
@@ -647,7 +646,6 @@
+ }
+
+ intf = mcp251x_read_reg(spi, CANINTF);
-+
+ if (intf == 0x00)
+ break;
+
@@ -743,9 +741,9 @@
+ /* Clear everything except RX bits, don't want to miss any */
+ mcp251x_write_bits(spi, CANINTF, intf & ~(CANINTF_RX0IF | CANINTF_RX1IF), 0x00);
+ }
-+
++
+ mcp251x_read_reg(spi, CANSTAT);
-+
++
+ dev_dbg(&spi->dev, "interrupt ended\n");
+}
+
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|
|
From: <ar...@us...> - 2009-02-24 15:50:19
|
Revision: 1092
http://armadeus.svn.sourceforge.net/armadeus/?rev=1092&view=rev
Author: artemys
Date: 2009-02-24 15:50:06 +0000 (Tue, 24 Feb 2009)
Log Message:
-----------
[BRANCH] [LINUX] Get fixes from trunk (rev 1090) for CAN on APF27
Revision Links:
--------------
http://armadeus.svn.sourceforge.net/armadeus/?rev=1090&view=rev
Modified Paths:
--------------
branches/release-3.0/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch
Modified: branches/release-3.0/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch
===================================================================
--- branches/release-3.0/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch 2009-02-24 15:48:33 UTC (rev 1091)
+++ branches/release-3.0/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch 2009-02-24 15:50:06 UTC (rev 1092)
@@ -29,7 +29,7 @@
index 0000000..43be336
--- /dev/null
+++ b/drivers/net/can/mcp251x.c
-@@ -0,0 +1,1000 @@
+@@ -0,0 +1,1004 @@
+/* drivers/net/can/mcp251x.c
+ *
+ * Driver for Microchip MCP251x CAN Controller with SPI Interface
@@ -637,7 +637,11 @@
+ for (;;) {
+ if (priv->wake) {
+ /* Wait whilst the device wakes up */
-+ udelay(200 * (128 * USEC_PER_SEC / pdata->oscillator_frequency));
++ int i = 200 * (128 * USEC_PER_SEC / pdata->oscillator_frequency);
++ if( i> 1000 ) /*large delay, use mdelay*/
++ mdelay( (i+500)/1000);
++ else
++ udelay(i);
+ priv->wake = 0;
+ }
+
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|
|
From: <ar...@us...> - 2009-02-24 15:48:36
|
Revision: 1091
http://armadeus.svn.sourceforge.net/armadeus/?rev=1091&view=rev
Author: artemys
Date: 2009-02-24 15:48:33 +0000 (Tue, 24 Feb 2009)
Log Message:
-----------
[BRANCH] [LINUX] Remove APF27 power management compilation by default for Armadeus 3.0
Modified Paths:
--------------
branches/release-3.0/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config
Modified: branches/release-3.0/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config
===================================================================
--- branches/release-3.0/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config 2009-02-24 14:57:28 UTC (rev 1090)
+++ branches/release-3.0/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config 2009-02-24 15:48:33 UTC (rev 1091)
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.27.13
-# Mon Feb 23 14:11:31 2009
+# Tue Feb 24 16:11:33 2009
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -292,15 +292,7 @@
#
# Power management options
#
-CONFIG_PM=y
-CONFIG_PM_DEBUG=y
-CONFIG_PM_VERBOSE=y
-CONFIG_CAN_PM_TRACE=y
-CONFIG_PM_SLEEP=y
-CONFIG_SUSPEND=y
-# CONFIG_PM_TEST_SUSPEND is not set
-CONFIG_SUSPEND_FREEZER=y
-# CONFIG_APM_EMULATION is not set
+# CONFIG_PM is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y
@@ -997,7 +989,6 @@
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DEVICE_CLASS is not set
# CONFIG_USB_DYNAMIC_MINORS is not set
-CONFIG_USB_SUSPEND=y
# CONFIG_USB_OTG is not set
# CONFIG_USB_OTG_WHITELIST is not set
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
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|
|
From: <th...@us...> - 2009-02-24 14:57:41
|
Revision: 1090
http://armadeus.svn.sourceforge.net/armadeus/?rev=1090&view=rev
Author: thom25
Date: 2009-02-24 14:57:28 +0000 (Tue, 24 Feb 2009)
Log Message:
-----------
[LINUX] make MCP251x working again
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch 2009-02-24 14:02:17 UTC (rev 1089)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/088-can-mcp2515.patch 2009-02-24 14:57:28 UTC (rev 1090)
@@ -29,7 +29,7 @@
index 0000000..43be336
--- /dev/null
+++ b/drivers/net/can/mcp251x.c
-@@ -0,0 +1,1000 @@
+@@ -0,0 +1,1006 @@
+/* drivers/net/can/mcp251x.c
+ *
+ * Driver for Microchip MCP251x CAN Controller with SPI Interface
@@ -458,7 +458,6 @@
+static void mcp251x_hw_wakeup(struct spi_device *spi)
+{
+ struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
-+
+ priv->wake = 1;
+
+ /* Can only wake up by generating a wake-up interrupt. */
@@ -531,6 +530,7 @@
+ /* Put device into loopback mode */
+ mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_LOOPBACK);
+ } else {
++
+ /* Put device into normal mode */
+ mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_NORMAL);
+
@@ -635,13 +635,19 @@
+ u8 intf;
+
+ for (;;) {
++
+ if (priv->wake) {
+ /* Wait whilst the device wakes up */
-+ udelay(200 * (128 * USEC_PER_SEC / pdata->oscillator_frequency));
++ int i = 200 * (128 * USEC_PER_SEC / pdata->oscillator_frequency);
++ if( i> 1000 ) /*large delay, use mdelay*/
++ mdelay( (i+500)/1000);
++ else
++ udelay(i);
+ priv->wake = 0;
+ }
+
+ intf = mcp251x_read_reg(spi, CANINTF);
++
+ if (intf == 0x00)
+ break;
+
@@ -737,9 +743,9 @@
+ /* Clear everything except RX bits, don't want to miss any */
+ mcp251x_write_bits(spi, CANINTF, intf & ~(CANINTF_RX0IF | CANINTF_RX1IF), 0x00);
+ }
-+
++
+ mcp251x_read_reg(spi, CANSTAT);
-+
++
+ dev_dbg(&spi->dev, "interrupt ended\n");
+}
+
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|
|
From: <ar...@us...> - 2009-02-24 14:02:22
|
Revision: 1089
http://armadeus.svn.sourceforge.net/armadeus/?rev=1089&view=rev
Author: artemys
Date: 2009-02-24 14:02:17 +0000 (Tue, 24 Feb 2009)
Log Message:
-----------
[SVN] Make a branch for Armadeus 3.0 release process
Added Paths:
-----------
branches/release-3.0/
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|
|
From: <th...@us...> - 2009-02-24 13:01:29
|
Revision: 1088
http://armadeus.svn.sourceforge.net/armadeus/?rev=1088&view=rev
Author: thom25
Date: 2009-02-24 11:44:20 +0000 (Tue, 24 Feb 2009)
Log Message:
-----------
[LINUX] allow short circuit on headphone output for short time
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/073-armadeus-tsc2102.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/073-armadeus-tsc2102.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/073-armadeus-tsc2102.patch 2009-02-23 20:02:24 UTC (rev 1087)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/073-armadeus-tsc2102.patch 2009-02-24 11:44:20 UTC (rev 1088)
@@ -992,7 +992,7 @@
+ tsc210x_set_fsref(44100);
+
+ if (tsc.kind == tsc2101) {
-+ tsc210x_write_sync(TSC2101_AUDIO5_CTRL, /*AC5_AST2SPK1 |*/ AC5_DAC2SPK1(1) | AC5_DAC2SPK2(2));
++ tsc210x_write_sync(TSC2101_AUDIO5_CTRL, /*AC5_AST2SPK1 |*/ AC5_DAC2SPK1(1) | AC5_DAC2SPK2(2)|AC5_HDSCPTC);
+ tsc210x_write_sync(TSC2101_MIXER_PGA_CTRL, /*0x7f00*/ 0xc500 /* reset value */ | MPC_MICSEL(1) | MPC_MICADC);
+ tsc210x_write_sync(TSC2101_HEADSET_GAIN_CTRL, HGC_ADPGA_HED(0));
+ tsc210x_write_sync(TSC2101_HANDSET_PGA_CTRL, 0x0000);
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|
|
From: <ar...@us...> - 2009-02-23 20:02:28
|
Revision: 1087
http://armadeus.svn.sourceforge.net/armadeus/?rev=1087&view=rev
Author: artemys
Date: 2009-02-23 20:02:24 +0000 (Mon, 23 Feb 2009)
Log Message:
-----------
[BUILD] Removes warning in Makefile.in when building clean view
Modified Paths:
--------------
trunk/Makefile.in
Modified: trunk/Makefile.in
===================================================================
--- trunk/Makefile.in 2009-02-23 17:25:15 UTC (rev 1086)
+++ trunk/Makefile.in 2009-02-23 20:02:24 UTC (rev 1087)
@@ -16,7 +16,7 @@
ARMADEUS_TARGET_ARCH:=$(shell echo $(BR2_GCC_TARGET_ARCH))
ARMADEUS_UCLIBC_VERSION:=0.9.29
-ARMADEUS_SDL_VERSION:=$(shell grep "SDL_VERSION:=" $(BUILDROOT_DIR)/package/sdl/sdl.mk | cut -d = -f 2)
+ARMADEUS_SDL_VERSION:=$(shell grep "SDL_VERSION:=" $(BUILDROOT_DIR)/package/sdl/sdl.mk 2>/dev/null | cut -d = -f 2)
ifeq ($(ARMADEUS_SDL_VERSION),)
ARMADEUS_SDL_VERSION:=SDL_NOT_INSTALLED
endif
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|
|
From: <th...@us...> - 2009-02-23 17:25:19
|
Revision: 1086
http://armadeus.svn.sourceforge.net/armadeus/?rev=1086&view=rev
Author: thom25
Date: 2009-02-23 17:25:15 +0000 (Mon, 23 Feb 2009)
Log Message:
-----------
[SOFTWARE] add apf27 uboot recover tool
Added Paths:
-----------
trunk/software/uboot_recover/apf27-u-boot.bin
trunk/software/uboot_recover/apf27_recover.py
Added: trunk/software/uboot_recover/apf27-u-boot.bin
===================================================================
(Binary files differ)
Property changes on: trunk/software/uboot_recover/apf27-u-boot.bin
___________________________________________________________________
Added: svn:mime-type
+ application/octet-stream
Added: trunk/software/uboot_recover/apf27_recover.py
===================================================================
--- trunk/software/uboot_recover/apf27_recover.py (rev 0)
+++ trunk/software/uboot_recover/apf27_recover.py 2009-02-23 17:25:15 UTC (rev 1086)
@@ -0,0 +1,349 @@
+#
+# APF27 bootloader
+#
+# Copyright (2008) ARMADEUS
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#
+# author: nic...@ar...
+#
+# Change History:
+# - (Jorasse) : init DDR RAM and u-boot upload
+#
+
+import sys
+import time
+from struct import *
+import os
+import serial
+import thread
+import re
+
+class apf27Bootloader:
+
+ statuscode = { 0x8D: 'data specified is out of bounds',
+ 0x55: 'error during assert verification',
+ 0x36: 'hash verification failed',
+ 0x33: 'certificate parsing failed or the certificate contained an unsupported key',
+ 0x35: 'signature verification failed',
+ 0x4B: 'CSF command sequence contains unsupported command identifier',
+ 0x4E: 'absence of expected CSF header',
+ 0x4D: 'CSF length is unsupported',
+ 0x2E: 'CSF TYPE does not match processor TYPE',
+ 0x2D: 'CSF UID does not match either processor UID or generic UID',
+ 0x3A: 'CSF customer/product code does not match processor customer/product code',
+ 0x87: 'key indexis either unsupported, or an attempt is made to overwrite the SRK from a CSF command',
+ 0xF0: 'successful operation completion',
+ 0x17: 'SCC unexpectedly not in secure state',
+ 0x1E: 'secureRAM secret key invalid',
+ 0x1D: 'secureRAM initialization failure',
+ 0x1B: 'secureRAM self test failure',
+ 0x2B: 'secureRAM internal failure',
+ 0x27: 'secureRAM secrect key unexpectedly in use',
+ 0x8B: 'an attempt is made to read a key from the list of subordinate public keys at a location where no key is installed',
+ 0x8E: 'algorithm type is either invalid or ortherwise unsupported',
+ 0x66: 'write operation to register failed',
+ 0x63: 'DCD invalid',
+ 0x6F: 'RAM application pointer is NULL or ERASED_FLASH',
+ 0x69: 'CSF missing when HAB TYPE is not HAB-disabled',
+ 0x6A: 'NANDFC boot buffer load failed',
+ 0x6C: 'Exception has occured',
+ 0x67: 'INT_BOOT fuse is blown but BOOT pins are set for external boot',
+ 0x88: 'Successful download completion' }
+
+
+
+ def __init__(self, serialport ):
+ self.port = serialport
+
+
+ def getstatus(self):
+ self.port.flushInput()
+ #print 'get Status'
+ self.port.write( self.buildcmd("0505" ,"00000000","b","00000000","00","0" ))
+ result = self.port.read(4)
+ if len(result) > 0:
+ print self.statuscode[ord(result[0])]
+ #for i in range(len(result)):
+ # print '%02x' % ord(result[i]),
+ else:
+ print '\nread timeout'
+
+ def __displayProgress( self, text ):
+ sys.stdout.write(chr(13))
+ print text,
+
+# addr: address to read
+# count: number of bytes to read
+# mode: b, w, l for byte, word, long
+
+ def get( self, addr, count, mode ):
+ assert len(addr) <= 8, 'address too long'
+ assert int(count,16) > 0, 'zero length get'
+ assert int(count,16) < 0xffffffff, 'Too long get, should be < 31 bytes'
+ self.port.write( self.buildcmd("0101" ,addr,mode,count.zfill(9-len(count)),"00000000","0" ) )
+
+ #nbbyte = 1
+ #if mode == 'w':
+ # nbbyte = 2
+ #if mode == 'l':
+ # nbbyte = 4
+
+ #nbbyte = nbbyte * int(count)
+ temp = self.port.read(int(count)+4) # read n+4 char
+ if len(temp) == 0:
+ print 'read timeout'
+ return
+ #print '\nread ACK:',
+ #for i in range (len(temp)):
+ # print '%02x' % ord(temp[i]),
+
+ #print 'read data:',
+ result = []
+ for i in range (4,len(temp)):
+
+ result += '%02x' % ord(temp[len(temp)-i+3]),
+ #print ''.join(result)
+ return ''.join(result)
+
+
+# addr: address where the data have to be written
+# data: data to write. must match the given mode
+
+# mode: b, w, l for byte, word, long
+
+ def put( self, addr, data, mode ):
+ assert len(data) > 0, 'zero length put'
+ assert len(addr) == 8, 'address too long'
+ self.port.write( self.buildcmd("0202" ,addr,mode,"00000000",data,"0" ))
+ result = self.port.read(4) #ack
+ if len(result) == 0:
+ print 'read timeout'
+ return
+ #print ' \nwrite ACK:',
+ #for i in range (len(result)):
+ # print '%02x' % ord(result[i]),
+
+ result = self.port.read(4)
+ if len(result) == 0:
+ print 'read timeout'
+ return
+
+ #print '\nwrite success:',
+ #for i in range (len(result)):
+ #print '%02x' % ord(result[i]),
+
+
+ def download( self, addr, data, size):
+ assert size > 0, 'file empty'
+ f=open(data, 'rb')
+ self.port.write( self.buildcmd("0404" ,addr,"l", size, "00000000","AA" ))
+ result = self.port.read(4) #ack
+ if len(result) == 0:
+ print '\nread timeout'
+ return
+ #print ' \nwrite ACK:',
+ #for i in range (len(result)):
+ # print '%02x' % ord(result[i]),
+
+ data = f.read(16)
+ count = 16
+ b = 0
+ while len(data):
+ n = len(data)
+ b = 16-n # ensure always 4 bytes
+ #tr = unpack('B'*n,data)
+ self.port.write(data)
+
+ count = count + 16
+ if (count % 1024) == 0:
+ self.__displayProgress( "%d octets " % count )
+ data = f.read(16)
+ self.__displayProgress( "%d octets" % count )
+ print ""
+ f.close()
+ self.getstatus()
+ return
+
+ def buildcmd( self, cmd, addr, ds, cnt, data, ft ):
+ if ds == 'b':
+ datatmp = ('%c' % int('00',16)) + ('%c' % int('00',16)) + ('%c' % int('00',16)) + ('%c' % int(data[0:2],16))
+ datasize = "08"
+ elif ds == 'w':
+ datasize = "10"
+ datatmp = ('%c' % int('00',16)) + ('%c' % int('00',16)) + ('%c' % int(data[0:2],16)) + ('%c' % int(data[2:4],16))
+ elif ds == 'l':
+ datasize = "20"
+ datatmp = ('%c' % int(data[0:2],16)) + ('%c' % int(data[2:4],16)) + ('%c' % int(data[4:6],16)) + ('%c' % int(data[6:8],16))
+ else:
+ print "errror invalid data size"
+ return ""
+
+ result = ('%c' % int(cmd[0:2],16)) + ('%c' % int(cmd[2:4],16)) + \
+ ('%c' % int(addr[0:2],16)) + ('%c' % int(addr[2:4],16)) + ('%c' % int(addr[4:6],16)) + ('%c' % int(addr[6:8],16)) + \
+ ('%c' % int(datasize,16)) + \
+ ('%c' % int(cnt[0:2],16)) + ('%c' % int(cnt[2:4],16)) + ('%c' % int(cnt[4:6],16)) + ('%c' % int(cnt[6:8],16)) + \
+ datatmp + ('%c' % int(ft,16))
+
+ #for i in range(len(result)):
+ # print '%02x' % ord(result[i]),
+ #print cnt
+ return result
+
+ def initSDRAM2( self ):
+ print "SDRAM INIT2 APF",
+ self.put("D800100C","00695728","l")
+
+ self.put("D8001008","92100000","l")
+ self.put("B0000F00","00000000","l")
+ self.put("D8001008","A2100000","l")
+ self.put("B0000F00","00000000","l")
+ self.put("B0000F00","00000000","l")
+ self.put("B0000F00","00000000","l")
+ self.put("B0000F00","00000000","l")
+ self.put("D8001008","A2100000","l")
+ self.put("B0000F00","00000000","l")
+ self.put("B0000F00","00000000","l")
+ self.put("B0000F00","00000000","l")
+ self.put("B0000F00","00000000","l")
+ self.put("D8001008","b2100000","l")
+ self.put("B0000033","DA0000DA","b")
+ self.put("B2000000","00000000","b")
+ self.put("D8001008","82126080","l")
+
+ def initSDRAM1( self, sdramType ):
+
+ print "SDRAM INIT1 APF",
+ self.put("10027818","0000080f","l")
+ #self.put("D8001010","00000004","l")
+ self.put("D8001010","0000000C","l")
+
+ #self.put("10027828","55555555","l")
+ #self.put("10027830","55555555","l")
+ #self.put("10027834","55555555","l")
+ #self.put("10027838","00005005","l")
+ #self.put("1002783C","15555555","l")
+ #self.put("D8001010","00000024","l")
+ #self.put("D8001004","0069eb38","l")
+ #self.put("D8001004","007FFFFF","l")
+ self.put("D8001004","00695728","l")
+
+ self.put("D8001000","92100000","l")
+ self.put("A0000F00","00000000","l")
+ self.put("D8001000","A2100000","l")
+ self.put("A0000F00","00000000","l")
+ self.put("A0000F00","00000000","l")
+ self.put("A0000F00","00000000","l")
+ self.put("A0000F00","00000000","l")
+ self.put("D8001000","A2100000","l")
+ self.put("A0000F00","00000000","l")
+ self.put("A0000F00","00000000","l")
+ self.put("A0000F00","00000000","l")
+ self.put("A0000F00","00000000","l")
+ self.put("D8001000","b2100000","l")
+ self.put("A0000033","DA0000DA","b")
+ self.put("A2000000","00000000","b")
+ self.put("D8001000","82126080","l")
+
+
+ def consoleDump(tid):
+ while 1:
+ sys.stdout.write(tid.read(1))
+ # print '%s' % tid.read(1),
+
+class UBoot:
+ """
+ """
+ def __init__(self, bootstrap, serial):
+ self.bootstrap = bootstrap
+ self.serial = serial
+
+ def __getOutput(self,error_msg=None):
+ """ this function wait for uboot response and return response"""
+ #debugser = serial.Serial("/dev/tty0",115200,timeout=1)
+ response = ""
+ while not re.search(r'BIOS>',response):
+ char = self.serial.read(1)
+ if char == '':
+ raise Error(response)
+ response = response + char
+ if error_msg!=None:
+ if re.search(error_msg,response):
+ raise Error("getOutput error")
+ sys.stdout.write(char)
+ #debugser.write(char)
+ #debugser.close()
+ return response
+
+ def load(self):
+ BINARY = "apf27-u-boot.bin"
+ if not os.path.exists(BINARY):
+ raise Error("file "+BINARY+" doesn't exit",0)
+ fsize = "%08x" % os.path.getsize(BINARY) #os.stat(filesize)[6]
+ self.bootstrap.download("A0000000",BINARY, fsize)
+
+ def resetenv(self):
+ self.serial.write("run flash_reset_env\n")
+ return self.__getOutput()
+
+ def waitForPrompt(self):
+ time.sleep(1)
+ self.serial.write("\n")
+ return self.__getOutput()
+
+ def flash(self):
+ """ flash uboot """
+ self.serial.write("run flash_uboot\n")
+ try:
+ ret = self.__getOutput()
+ except Error,e:
+ raise Error("Flashing U-Boot")
+ if not re.search(r'uboot succeed',ret):
+ print ret
+ raise Error("U-Boot flash failed",0)
+ return ret
+
+
+if __name__ == "__main__":
+
+ SPEED = 115200
+
+ print "APF27 Bootstrap Tool"
+ print "Do not forget to place the bootstrap jumper !!"
+ print "and be sure to have a u-boot.bin file in current dir"
+ port = raw_input('Enter serial port number or name to use (/dev/ttySx under Linux and COMx under Windows: ')
+ try:
+ ser = serial.Serial(port, SPEED, timeout=1)
+ except Exception, msg:
+ print "unable to open serial port %s" % port
+ print msg
+ sys.exit()
+ ser.flush()
+
+ apfBootloader = apf27Bootloader(ser)
+ uboot = UBoot(apfBootloader, ser)
+
+ apfBootloader.getstatus()
+ apfBootloader.initSDRAM1("APF27")
+ uboot.load()
+ uboot.waitForPrompt()
+ uboot.flash()
+ print "uBoot successfully recovered !"
+
+ del ser
+
+
+
+
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|
|
From: <th...@us...> - 2009-02-23 17:03:35
|
Revision: 1085
http://armadeus.svn.sourceforge.net/armadeus/?rev=1085&view=rev
Author: thom25
Date: 2009-02-23 17:03:26 +0000 (Mon, 23 Feb 2009)
Log Message:
-----------
[LINUX] allow tsc, max and mcp to be compiled as kernel module
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-02-23 16:12:18 UTC (rev 1084)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-02-23 17:03:26 UTC (rev 1085)
@@ -3,7 +3,7 @@
(Take a look at armadeus/target/linux/ directory to know how to generate it)
--- linux-2.6.27.13.original/arch/arm/mach-mx2/apf27.c
+++ linux-2.6.27.13.mod/arch/arm/mach-mx2/apf27.c
-@@ -0,0 +1,1287 @@
+@@ -0,0 +1,1293 @@
+ /*
+ * apf27.c
+ *
@@ -59,6 +59,9 @@
+#include <mach/mxc_nand.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
++#include <linux/spi/max1027.h>
++#include <linux/spi/tsc2102.h>
++#include "../../../drivers/net/can/mcp251x.h"
+#if defined(CONFIG_SND) || defined (CONFIG_SND_MODULE)
+#include <mach/imx_dam.h>
+#include <mach/imx_sound.h>
@@ -72,15 +75,12 @@
+#include "crm_regs.h"
+
+#ifdef CONFIG_ARMADEUS_MAX1027_MODULE
-+#include <linux/spi/max1027.h>
+#define CONFIG_ARMADEUS_MAX1027 1
+#endif
+#ifdef CONFIG_SPI_TSC2102_MODULE
-+#include <linux/spi/tsc2102.h>
+#define CONFIG_SPI_TSC2102 1
+#endif
+#ifdef CONFIG_CAN_MCP251X_MODULE
-+#include "../../../drivers/net/can/mcp251x.h"
+#define CONFIG_CAN_MCP251X 1
+#endif
+#ifdef CONFIG_IMX_BACKLIGHT_MODULE
@@ -1045,6 +1045,11 @@
+ gpio_set_value(APF27DEV_POWER_DOWN_NOT, 1);
+}
+
++static void apf27dev_power_down(void)
++{
++ gpio_set_value(APF27DEV_POWER_DOWN_NOT, 0);
++}
++
+#ifdef CONFIG_USE_SWITCH_FOR_PM
+static irqreturn_t apf27dev_user_switch_irq_handler(int irq, void *dev_id)
+{
@@ -1055,11 +1060,12 @@
+static int gpio_pwr_ctl_active(void)
+{
+ int err;
++
+
+#ifdef CONFIG_FB_MXC
++ int i;
+ /* force LCD data/control lines to 0 before powering the LCD
+ otherwise start up conditions may not be respected */
-+ int i;
+ for( i=5; i <= 23; i++ ){
+ mxc_gpio_mode( GPIO_PORTA | i | GPIO_OUT| GPIO_GPIO );
+ gpio_set_value(GPIO_PORTA | i, 0);
@@ -1068,11 +1074,14 @@
+ mdelay(5);
+#endif
+
++
+ err = mxc_gpio_setup_multiple(apf27dev_pwr_ctl_pins,
+ ARRAY_SIZE(apf27dev_pwr_ctl_pins), "pwr-ctl");
+ if (err < 0)
+ pr_err("Failed to register power control pins !\n");
+
++
++
+ apf27dev_power_up();
+#ifdef CONFIG_USE_LED_FOR_PM
+ gpio_set_value(GPIO_PORTF | 14, 0);
@@ -1090,11 +1099,8 @@
+
+#ifdef CONFIG_PM
+
-+static void apf27dev_power_down(void)
-+{
-+ gpio_set_value(APF27DEV_POWER_DOWN_NOT, 0);
-+}
+
++
+#ifdef APF27_PM_DEBUG
+#define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20)
+#define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24)
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-02-23 16:12:23
|
Revision: 1084
http://armadeus.svn.sourceforge.net/armadeus/?rev=1084&view=rev
Author: artemys
Date: 2009-02-23 16:12:18 +0000 (Mon, 23 Feb 2009)
Log Message:
-----------
Remove unused host/ dir
Removed Paths:
-------------
trunk/host/
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-02-23 15:47:13
|
Revision: 1083
http://armadeus.svn.sourceforge.net/armadeus/?rev=1083&view=rev
Author: artemys
Date: 2009-02-23 15:47:08 +0000 (Mon, 23 Feb 2009)
Log Message:
-----------
[U-BOOT] Add missing APF27 patches
Added Paths:
-----------
trunk/buildroot/target/u-boot/u-boot-1.3.4-140-ds1374.patch
trunk/buildroot/target/u-boot/u-boot-1.3.4-300-imx27.patch
trunk/buildroot/target/u-boot/u-boot-1.3.4-301-nand.patch
trunk/buildroot/target/u-boot/u-boot-1.3.4-310-apf27.patch
Added: trunk/buildroot/target/u-boot/u-boot-1.3.4-140-ds1374.patch
===================================================================
--- trunk/buildroot/target/u-boot/u-boot-1.3.4-140-ds1374.patch (rev 0)
+++ trunk/buildroot/target/u-boot/u-boot-1.3.4-140-ds1374.patch 2009-02-23 15:47:08 UTC (rev 1083)
@@ -0,0 +1,68 @@
+--- ref/u-boot-1.3.4/drivers/rtc/ds1374.c 2008-08-12 16:08:38.000000000 +0200
++++ u-boot-1.3.4/drivers/rtc/ds1374.c 2008-12-17 01:16:05.000000000 +0100
+@@ -113,6 +113,11 @@ int rtc_get (struct rtc_time *tm){
+ unsigned int limit;
+ unsigned char tmp;
+ unsigned int i;
++ int old_bus;
++
++ /* switch to correct I2C bus */
++ old_bus = I2C_GET_BUS();
++ I2C_SET_BUS(CFG_RTC_BUS_NUM);
+
+ /*
+ * Since the reads are being performed one byte at a time,
+@@ -154,6 +159,9 @@ int rtc_get (struct rtc_time *tm){
+ tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
+ tm->tm_hour, tm->tm_min, tm->tm_sec);
+
++ /* switch back to original I2C bus */
++ I2C_SET_BUS(old_bus);
++
+ return rel;
+ }
+
+@@ -164,6 +172,11 @@ void rtc_set (struct rtc_time *tmp){
+
+ unsigned long time;
+ unsigned i;
++ int old_bus;
++
++ /* switch to correct I2C bus */
++ old_bus = I2C_GET_BUS();
++ I2C_SET_BUS(CFG_RTC_BUS_NUM);
+
+ DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+@@ -186,6 +199,9 @@ void rtc_set (struct rtc_time *tmp){
+
+ /* Start clock */
+ rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, FALSE);
++
++ /* switch back to original I2C bus */
++ I2C_SET_BUS(old_bus);
+ }
+
+ /*
+@@ -198,6 +214,11 @@ void rtc_set (struct rtc_time *tmp){
+ void rtc_reset (void){
+
+ struct rtc_time tmp;
++ int old_bus;
++
++ /* switch to correct I2C bus */
++ old_bus = I2C_GET_BUS();
++ I2C_SET_BUS(CFG_RTC_BUS_NUM);
+
+ /* clear status flags */
+ rtc_write (RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), FALSE); /* clearing OSF and AF */
+@@ -230,6 +251,9 @@ void rtc_reset (void){
+ rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR,0xAC, TRUE);
+ rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR,0xDE, TRUE);
+ rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR,0xAD, TRUE);
++
++ /* switch back to original I2C bus */
++ I2C_SET_BUS(old_bus);
+ }
+
+ /*
Added: trunk/buildroot/target/u-boot/u-boot-1.3.4-300-imx27.patch
===================================================================
--- trunk/buildroot/target/u-boot/u-boot-1.3.4-300-imx27.patch (rev 0)
+++ trunk/buildroot/target/u-boot/u-boot-1.3.4-300-imx27.patch 2009-02-23 15:47:08 UTC (rev 1083)
@@ -0,0 +1,4796 @@
+--- ref/u-boot-1.3.4/cpu/arm926ejs/config.mk 2008-08-12 16:08:38.000000000 +0200
++++ u-boot-1.3.4/cpu/arm926ejs/config.mk 2008-12-29 16:27:49.000000000 +0100
+@@ -24,7 +24,7 @@
+ PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \
+ -msoft-float
+
+-PLATFORM_CPPFLAGS += -march=armv4
++PLATFORM_CPPFLAGS += -march=armv5te
+ # =========================================================================
+ #
+ # Supply options according to compiler version
+--- ref/u-boot-1.3.4/cpu/arm926ejs/imx27/cmd_imxfuse.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-1.3.4/cpu/arm926ejs/imx27/cmd_imxfuse.c 2009-01-07 18:20:21.000000000 +0100
+@@ -0,0 +1,328 @@
++/*
++ * cmd_imxfuse-c Interface to iMX IC Identification Module
++ * Based on Freescale iMX27 Board Support Package
++ *
++ * (C) Copyright 2008,2009 Eric Jarrige <eri...@ar...>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <config.h>
++#include <common.h>
++#include <command.h>
++
++#ifdef CONFIG_CMD_IMX_FUSE
++
++#include <asm/arch/imx-regs.h>
++#include <asm/io.h>
++
++#define IIM_ERR_SHIFT 8
++#define POLL_FUSE_PRGD (IIM_STAT_PRGD | (IIM_ERR_PRGE << IIM_ERR_SHIFT))
++#define POLL_FUSE_SNSD (IIM_STAT_SNSD | (IIM_ERR_SNSE << IIM_ERR_SHIFT))
++
++static void imx_fuse_op_start(void)
++{
++ /* Do not generate interrupt */
++ writel(0x00, &IIM_STATM);
++ // clear the status bits and error bits
++ writel(0x03, &IIM_STAT);
++ writel(0xFE, &IIM_ERR);
++}
++
++/*
++ * The action should be either:
++ * POLL_FUSE_PRGD
++ * or:
++ * POLL_FUSE_SNSD
++ */
++static int imx_poll_fuse_op_done(int action)
++{
++
++ u32 status, error;
++
++ if (action != POLL_FUSE_PRGD && action != POLL_FUSE_SNSD) {
++ printf("%s(%d) invalid operation\n", __FUNCTION__, action);
++ return -1;
++ }
++
++ /* Poll busy bit till it is NOT set */
++ while ((readl(&IIM_STAT) & IIM_STAT_BUSY) != 0 ) {
++ }
++
++ /* Test for successful write */
++ status = readl(&IIM_STAT);
++ error = readl(&IIM_ERR);
++
++ if ((status & action) != 0 && (error & (action >> IIM_ERR_SHIFT)) == 0) {
++ if (error) {
++ printf("Even though the operation seems successful...\n");
++ printf("There are some error(s) at addr=0x%x: 0x%x\n",
++ readl(&IIM_ERR), error);
++ }
++ return 0;
++ }
++ printf("%s(0x%x) failed\n", __FUNCTION__, action);
++ printf("status address=0x%x, value=0x%x\n",
++ readl(&IIM_STAT), status);
++ printf("There are some error(s) at addr=0x%x: 0x%x\n",
++ readl(&IIM_ERR), error);
++ return -1;
++}
++
++static int imx_read_shadow_fuse(int bank, int row, int bit)
++{
++ printf("Shadow fuses at (bank:%d, row:%d) = 0x%x\n",
++ bank, row, readl(&IIM_BANK_REG(bank,row)));
++ return 0;
++}
++
++static int imx_sense_fuse(int bank, int row, int bit)
++{
++ int addr, addr_l, addr_h;
++
++ imx_fuse_op_start();
++
++ /* Enable IIM Program Protect */
++ writel(0x0, &IIM_PROG_P);
++
++ addr = ((bank << 11) | (row << 3) | (bit & 0x7));
++ /* Set IIM Program Upper Address */
++ addr_h = (addr >> 8) & 0x000000FF;
++ /* Set IIM Program Lower Address */
++ addr_l = (addr & 0x000000FF);
++
++#ifdef IIM_FUSE_DEBUG
++ printf("%s: addr_h=0x%x, addr_l=0x%x\n",
++ __FUNCTION__, addr_h, addr_l);
++#endif
++ writel(addr_h, &IIM_UA);
++ writel(addr_l, &IIM_LA);
++
++ /* Start sensing */
++ writel(0x08, &IIM_FCTL);
++ if (imx_poll_fuse_op_done(POLL_FUSE_SNSD) != 0) {
++ printf("%s(bank: %d, row: %d, bit: %d failed\n",
++ __FUNCTION__, bank, row, bit);
++ }
++
++ printf("fuses at (bank:%d, row:%d) = 0x%x\n",
++ bank, row, readl(&IIM_SDAT));
++ return 0;
++}
++
++/* Blow fuses based on the bank, row and bit positions (all 0-based)
++*/
++static int imx_fuse_blow(int bank,int row,int bit)
++{
++ int addr, addr_l, addr_h, ret = 1;
++
++ imx_fuse_op_start();
++
++ /* Disable IIM Program Protect */
++ writel(0xAA, &IIM_PROG_P);
++
++ addr = ((bank << 11) | (row << 3) | (bit & 0x7));
++ /* Set IIM Program Upper Address */
++ addr_h = (addr >> 8) & 0x000000FF;
++ /* Set IIM Program Lower Address */
++ addr_l = (addr & 0x000000FF);
++
++#ifdef IIM_FUSE_DEBUG
++ printf("blowing addr_h=0x%x, addr_l=0x%x\n", addr_h, addr_l);
++#endif
++
++ writel(addr_h, &IIM_UA);
++ writel(addr_l, &IIM_LA);
++ /* Start Programming */
++ writel(0x31, &IIM_FCTL);
++ if (imx_poll_fuse_op_done(POLL_FUSE_PRGD) == 0) {
++ ret = 0;
++ }
++
++ /* Enable IIM Program Protect */
++ writel(0x0, &IIM_PROG_P);
++ return ret;
++}
++
++/* Blow byte fuses based on the bank and row positions (all 0-based)
++*/
++static int imx_fuse_blow_byte(int bank,int row,unsigned char value)
++{
++ int i, ret = 0;
++
++ for (i = 0; i < 8; i++) {
++ if (((value >> i) & 0x1) == 0) {
++ continue;
++ }
++ ret |= imx_fuse_blow(bank, row, i);
++ }
++
++ return ret;
++}
++
++static int imx_mac_read(unsigned char pmac[6])
++{
++ int i;
++ int uninitialized = 0;
++
++ for (i=0;i<6;i++) {
++ pmac[6-1-i] = readl(&IIM_BANK_REG(0,(IIM0_MAC+i)));
++ }
++
++ /* uninitialized if all 00 */
++ if ((pmac[0] == 0) && (pmac[1] == 0) && (pmac[2] == 0) &&
++ (pmac[3] == 0) && (pmac[4] == 0) && (pmac[5] == 0))
++ uninitialized = 1;
++
++ /* uninitialized if all FF (could be safe) */
++ if ((pmac[0] == 0xff) && (pmac[1] == 0xff) && (pmac[2] == 0xff) &&
++ (pmac[3] == 0xff) && (pmac[4] == 0xff) && (pmac[5] == 0xff))
++ uninitialized = 1;
++
++ return uninitialized;
++}
++
++static int imx_mac_blow(unsigned char pmac[6])
++{
++ int i, ret = 1;
++ unsigned char mac[6];
++ int uninitialized = 0;
++
++ uninitialized = imx_mac_read(mac);
++
++ if (uninitialized) {
++ ret = 0;
++ for(i=0;i<6;i++) {
++ ret |= imx_fuse_blow_byte(0, (IIM0_MAC+i), pmac[6 - 1 -i]);
++ }
++ }
++
++ return ret;
++}
++
++
++int do_imx_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
++{
++ uint32_t bank, row, value, i;
++ int ret = 1;
++
++ if (argc < 2) {
++ printf("It is too dangeous for you to use this command.\n");
++ printf("Usage:\n%s\n", cmdtp->usage);
++ return ret;
++ }
++
++ if ((!strcmp(argv[1], "sense"))&&((argc == 4))) {
++ bank = simple_strtoul(argv[2], NULL, 16);
++ row = simple_strtoul(argv[3], NULL, 16);
++
++ printf("Sense read fuse at bank:%d row:%d\n", bank, row);
++ ret = imx_sense_fuse(bank, row, 0);
++ }else if ((!strcmp(argv[1], "read"))&&((argc == 4))) {
++ bank = simple_strtoul(argv[2], NULL, 16);
++ row = simple_strtoul(argv[3], NULL, 16);
++
++ printf("Shadow read fuse at bank:%d row:%d\n", bank, row);
++ ret = imx_read_shadow_fuse(bank, row, 0);
++ }else if ((!strcmp(argv[1], "blow"))&&(argc == 5)) {
++ bank = simple_strtoul(argv[2], NULL, 16);
++ row = simple_strtoul(argv[3], NULL, 16);
++ value = simple_strtoul(argv[4], NULL, 16);
++
++ printf("Blowing fuse at bank:%d row:%d value:%d\n",
++ bank, row, value);
++ for (i = 0; i < 8; i++) {
++ if (((value >> i) & 0x1) == 0) {
++ continue;
++ }
++ if (imx_fuse_blow(bank, row, i) != 0) {
++ printf("fuse_blow(bank: %d, row: %d, bit:"
++ " %d failed\n", bank, row, i);
++ } else {
++ printf("fuse_blow(bank: %d, row: %d, bit:"
++ " %d successful\n", bank, row, i);
++ ret = 0;
++ }
++ }
++
++ /* read back fuse by shadow register if applicable */
++ ret |= imx_read_shadow_fuse(bank, row, 0);
++
++ }else if ((!strcmp(argv[1], "mac"))&&(argc == 2)) {
++ unsigned char mac[6];
++ ret = imx_mac_read(mac);
++
++ printf("%siMX mac_addr in fuse: %02X:%02X:%02X:%02X:%02X:%02X\n",
++ ret?"No ":"",
++ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
++ }else if ((!strcmp(argv[1], "mac"))&&(argc == 3)) {
++ unsigned char mac[6];
++ char *tmp, *end;
++
++ tmp = argv[2];
++ /* convert MAC from string to int */
++ for (i=0; i<6; i++) {
++ mac[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
++ if (tmp)
++ tmp = (*end) ? end+1 : end;
++ }
++
++ ret = imx_mac_blow(mac);
++ if (ret) {
++ printf("Failed to blow mac_addr in fuse: "
++ "%02X:%02X:%02X:%02X:%02X:%02X\n",
++ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
++ } else {
++ imx_mac_read(mac);
++ printf("Mac_addr blowed in fuse: "
++ "%02X:%02X:%02X:%02X:%02X:%02X\n",
++ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
++ }
++ }else if ((!strcmp(argv[1], "suid"))&&(argc == 2)) {
++
++ printf("iMX SUID: ");
++ for (i=0;i<6;i++) {
++ printf("%02x", readl(&IIM_BANK_REG(1,(IIM1_SUID+i))));
++ }
++ printf("\n");
++ ret = 0;
++ }else if ((!strcmp(argv[1], "scc_key"))&&(argc == 2)) {
++
++ printf("iMX SCC_KEY: ");
++ for (i=0;i<21;i++) {
++ printf("%02x", readl(&IIM_BANK_REG(0,(IIM0_SCC_KEY+i))));
++ }
++ printf("\n");
++ ret = 0;
++ } else { printf("arc:%d\n", argc);
++ printf("Usage:\n%s\n", cmdtp->usage);
++ return 1;
++ }
++
++ return ret;
++}
++
++U_BOOT_CMD(imxfuse, 5, 0, do_imx_fuse,
++ "imxfuse - Read/Blow some iMX fuses\n",\
++ "sense <bank> <row> - sense read iMX fuses at <bank>/<row>\n" \
++ "imxfuse read <bank> <row> - shadow read iMX fuses at <bank>/<row>\n" \
++ "imxfuse blow <bank> <row> <value> - blow <value> at <bank>/<row>\n"\
++ " - Read/Blow 8 bits <Value> for some iMX fuses at <bank>/<row>\n"\
++ "imxfuse mac [<mac_addr>] - read/blow <mac_addr> in iMX fuses\n"\
++ "imxfuse suid - read iMX SUID\n"\
++ "imxfuse scc_key - read iMX SCC_KEY\n");
++
++#endif /* CONFIG_CMD_IMX_FUSE */
+--- ref/u-boot-1.3.4/cpu/arm926ejs/imx27/fec_imx27.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-1.3.4/cpu/arm926ejs/imx27/fec_imx27.c 2009-01-07 18:20:45.000000000 +0100
+@@ -0,0 +1,797 @@
++/*
++ * (C) Copyright 2008,2009 Eric Jarrige <eri...@ar...>
++ * (C) Copyright 2008 Armadeus Systems nc
++ * (C) Copyright 2007 Pengutronix, Sascha Hauer <s....@pe...>
++ * (C) Copyright 2007 Pengutronix, Juergen Beisert <j.b...@pe...>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++/************************** TODO eth_register + cleanup gfec !! *****/
++
++
++#include <common.h>
++#include <malloc.h>
++#include <net.h>
++#include "miiphy.h"
++#include "fec_imx27.h"
++
++#include <asm/arch/clock.h>
++#include <asm/arch/imx-regs.h>
++#include <asm/io.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++#ifdef CONFIG_DRIVER_FEC_IMX27
++
++#if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
++#error "CONFIG_MII has to be defined!"
++#endif
++
++//#undef CONFIG_FEC_IMX27_DEBUG
++#ifdef CONFIG_FEC_IMX27_DEBUG
++#define PRINTF(fmt,args...) printf (fmt ,##args)
++#else
++#define PRINTF(fmt,args...)
++#endif
++
++static int fec_miiphy_read(struct miiphy_device *mdev, uint8_t phyAddr,
++ uint8_t regAddr, uint16_t * retVal);
++static int fec_miiphy_write(struct miiphy_device *mdev, uint8_t phyAddr,
++ uint8_t regAddr, uint16_t data);
++
++typedef struct {
++ uint8_t data[1500]; /**< actual data */
++ int length; /**< actual length */
++ int used; /**< buffer in use or not */
++ uint8_t head[16]; /**< MAC header(6 + 6 + 2) + 2(aligned) */
++} NBUF;
++
++fec_priv gfec=
++{
++ .eth = (ethernet_regs *)IMX_FEC_BASE,
++ .xcv_type = MII100,
++ .rbd_base = NULL,
++ .rbd_index = 0,
++ .tbd_base = NULL,
++ .tbd_index = 0,
++ .miiphy =
++ {
++ CONFIG_PHY_ADDR,
++ fec_miiphy_read,
++ fec_miiphy_write,
++ 0,
++ NULL
++ },
++ .bd = NULL,
++};
++
++/*
++ * MII-interface related functions
++ */
++static int fec_miiphy_read(struct miiphy_device *mdev, uint8_t phyAddr,
++ uint8_t regAddr, uint16_t * retVal)
++{
++ struct eth_device *edev = mdev->edev;
++ fec_priv *fec = (fec_priv *)edev->priv;
++
++ uint32_t reg; /* convenient holder for the PHY register */
++ uint32_t phy; /* convenient holder for the PHY */
++ uint32_t start;
++
++ /*
++ * reading from any PHY's register is done by properly
++ * programming the FEC's MII data register.
++ */
++ writel(FEC_IEVENT_MII, &fec->eth->ievent);
++ reg = regAddr << FEC_MII_DATA_RA_SHIFT;
++ phy = phyAddr << FEC_MII_DATA_PA_SHIFT;
++
++ writel(FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA | phy | reg, &fec->eth->mii_data);
++
++ /*
++ * wait for the related interrupt
++ */
++ start = get_timer_masked(); /* get_time_ns(); */
++ while (!(readl(&fec->eth->ievent) & FEC_IEVENT_MII)) {
++ if (get_timer (start) > (CFG_HZ /1000) /* is_timeout(start, MSECOND)*/) {
++ printf("Read MDIO failed...\n");
++ return -1;
++ }
++ }
++
++ /*
++ * clear mii interrupt bit
++ */
++ writel(FEC_IEVENT_MII, &fec->eth->ievent);
++
++ /*
++ * it's now safe to read the PHY's register
++ */
++ *retVal = readl(&fec->eth->mii_data);
++ PRINTF("fec_miiphy_read: phy: %02x reg:%02x val:%#x\n", phyAddr, regAddr, *retVal);
++ return 0;
++}
++
++static int fec_miiphy_write(struct miiphy_device *mdev, uint8_t phyAddr,
++ uint8_t regAddr, uint16_t data)
++{
++ struct eth_device *edev = mdev->edev;
++ fec_priv *fec = (fec_priv *)edev->priv;
++
++ uint32_t reg; /* convenient holder for the PHY register */
++ uint32_t phy; /* convenient holder for the PHY */
++ uint32_t start;
++
++ reg = regAddr << FEC_MII_DATA_RA_SHIFT;
++ phy = phyAddr << FEC_MII_DATA_PA_SHIFT;
++
++ writel(FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR |
++ FEC_MII_DATA_TA | phy | reg | data, &fec->eth->mii_data);
++
++ /*
++ * wait for the MII interrupt
++ */
++ start = get_timer_masked(); /* get_time_ns(); */
++ while (!(readl(&fec->eth->ievent) & FEC_IEVENT_MII)) {
++ if (get_timer (start) > (CFG_HZ /1000) /* is_timeout(start, MSECOND)*/) {
++ printf("Write MDIO failed...\n");
++ return -1;
++ }
++ }
++
++ /*
++ * clear MII interrupt bit
++ */
++ writel(FEC_IEVENT_MII, &fec->eth->ievent);
++ PRINTF("fec_miiphy_write: phy: %02x reg:%02x val:%#x\n", phyAddr, regAddr, data);
++
++ return 0;
++}
++
++static int fec_rx_task_enable(fec_priv *fec)
++{
++ writel(1 << 24, &fec->eth->r_des_active);
++ return 0;
++}
++
++static int fec_rx_task_disable(fec_priv *fec)
++{
++ return 0;
++}
++
++static int fec_tx_task_enable(fec_priv *fec)
++{
++ writel(1 << 24, &fec->eth->x_des_active);
++ return 0;
++}
++
++static int fec_tx_task_disable(fec_priv *fec)
++{
++ return 0;
++}
++
++/**
++ * Initialize receive task's buffer descriptors
++ * @param[in] fec all we know about the device yet
++ * @param[in] count receive buffer count to be allocated
++ * @param[in] size size of each receive buffer
++ * @return 0 on success
++ *
++ * For this task we need additional memory for the data buffers. And each
++ * data buffer requires some alignment. Thy must be aligned to a specific
++ * boundary each (DB_DATA_ALIGNMENT).
++ */
++static int fec_rbd_init(fec_priv *fec, int count, int size, int once)
++{
++ int ix;
++ uint32_t p=0;
++
++ if (!once) {
++ /* reserve data memory and consider alignment */
++ p = (uint32_t)malloc(size * count + DB_DATA_ALIGNMENT);
++ memset((void *)p, 0, size * count + DB_DATA_ALIGNMENT);
++ p += DB_DATA_ALIGNMENT-1;
++ p &= ~(DB_DATA_ALIGNMENT-1);
++ }
++
++ for (ix = 0; ix < count; ix++) {
++ if (!once) {
++ writel(p, &fec->rbd_base[ix].data_pointer);
++ p += size;
++ }
++ writew(FEC_RBD_EMPTY, &fec->rbd_base[ix].status);
++ writew(0, &fec->rbd_base[ix].data_length);
++ }
++ /*
++ * mark the last RBD to close the ring
++ */
++ writew(FEC_RBD_WRAP | FEC_RBD_EMPTY, &fec->rbd_base[ix - 1].status);
++ fec->rbd_index = 0;
++
++ return 0;
++}
++
++/**
++ * Initialize transmit task's buffer descriptors
++ * @param[in] fec all we know about the device yet
++ *
++ * Transmit buffers are created externally. We only have to init the BDs here.\n
++ * Note: There is a race condition in the hardware. When only one BD is in
++ * use it must be marked with the WRAP bit to use it for every transmitt.
++ * This bit in combination with the READY bit results into double transmit
++ * of each data buffer. It seems the state machine checks READY earlier then
++ * resetting it after the first transfer.
++ * Using two BDs solves this issue.
++ */
++static void fec_tbd_init(fec_priv *fec)
++{
++ writew(0x0000, &fec->tbd_base[0].status);
++ writew(FEC_TBD_WRAP, &fec->tbd_base[1].status);
++ fec->tbd_index = 0;
++}
++
++/**
++ * Mark the given read buffer descriptor as free
++ * @param[in] last 1 if this is the last buffer descriptor in the chain, else 0
++ * @param[in] pRbd buffer descriptor to mark free again
++ */
++static void fec_rbd_clean(int last, FEC_BD *pRbd)
++{
++ /*
++ * Reset buffer descriptor as empty
++ */
++ if (last)
++ writew(FEC_RBD_WRAP | FEC_RBD_EMPTY, &pRbd->status);
++ else
++ writew(FEC_RBD_EMPTY, &pRbd->status);
++ /*
++ * no data in it
++ */
++ writew(0, &pRbd->data_length);
++}
++
++static int fec_get_hwaddr(struct eth_device *dev, unsigned char *mac)
++{
++ int i;
++ int uninitialized = 0;
++
++ for (i=0;i<6;i++) {
++ mac[6-1-i] = readl(&IIM_BANK_REG(0,(IIM0_MAC+i)));
++ }
++
++ /* uninitialized if all 00 */
++ if ((mac[0] == 0) && (mac[1] == 0) && (mac[2] == 0) &&
++ (mac[3] == 0) && (mac[4] == 0) && (mac[5] == 0))
++ uninitialized = 1;
++
++ /* uninitialized if all FF (could be safe) */
++ if ((mac[0] == 0xff) && (mac[1] == 0xff) && (mac[2] == 0xff) &&
++ (mac[3] == 0xff) && (mac[4] == 0xff) && (mac[5] == 0xff))
++ uninitialized = 1;
++
++ return uninitialized;
++}
++
++static int fec_set_hwaddr(struct eth_device *dev, unsigned char *mac)
++{
++ fec_priv *fec = (fec_priv *)dev->priv;
++//#define WTF_IS_THIS
++#ifdef WTF_IS_THIS
++ uint32_t crc = 0xffffffff; /* initial value */
++ uint8_t currByte; /* byte for which to compute the CRC */
++ int byte; /* loop - counter */
++ int bit; /* loop - counter */
++
++ /*
++ * The algorithm used is the following:
++ * we loop on each of the six bytes of the provided address,
++ * and we compute the CRC by left-shifting the previous
++ * value by one position, so that each bit in the current
++ * byte of the address may contribute the calculation. If
++ * the latter and the MSB in the CRC are different, then
++ * the CRC value so computed is also ex-ored with the
++ * "polynomium generator". The current byte of the address
++ * is also shifted right by one bit at each iteration.
++ * This is because the CRC generatore in hardware is implemented
++ * as a shift-register with as many ex-ores as the radixes
++ * in the polynomium. This suggests that we represent the
++ * polynomiumm itself as a 32-bit constant.
++ */
++ for (byte = 0; byte < 6; byte++) {
++ currByte = mac[byte];
++ for (bit = 0; bit < 8; bit++) {
++ if ((currByte & 0x01) ^ (crc & 0x01)) {
++ crc >>= 1;
++ crc = crc ^ 0xedb88320;
++ } else {
++ crc >>= 1;
++ }
++ currByte >>= 1;
++ }
++ }
++
++ crc = crc >> 26;
++
++ /*
++ * Set individual hash table register
++ */
++ if (crc >= 32) {
++ fec->eth->iaddr1 = (1 << (crc - 32));
++ fec->eth->iaddr2 = 0;
++ } else {
++ fec->eth->iaddr1 = 0;
++ fec->eth->iaddr2 = (1 << crc);
++ }
++#else
++ writel(0, &fec->eth->iaddr1);
++ writel(0, &fec->eth->iaddr2);
++ writel(0, &fec->eth->gaddr1);
++ writel(0, &fec->eth->gaddr2);
++#endif
++ /*
++ * Set physical address
++ */
++ writel((mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3], &fec->eth->paddr1);
++ writel((mac[4] << 24) + (mac[5] << 16) + 0x8808, &fec->eth->paddr2);
++
++ return 0;
++}
++
++/**
++ * Start the FEC engine
++ * @param[in] dev Our device to handle
++ */
++static int fec_open(struct eth_device *edev)
++{
++ fec_priv *fec = (fec_priv *)edev->priv;
++
++ PRINTF("fec_open: fec_open(dev)\n");
++ writel(1 << 2, &fec->eth->x_cntrl); /* full-duplex, heartbeat disabled */
++ fec->rbd_index = 0;
++
++ /*
++ * Enable FEC-Lite controller
++ */
++ writel(FEC_ECNTRL_ETHER_EN, &fec->eth->ecntrl);
++
++ if (fec->xcv_type != SEVENWIRE) {
++ miiphy_wait_aneg(&fec->miiphy);
++ miiphy_print_status(&fec->miiphy);
++ }
++
++ /*
++ * Enable SmartDMA receive task
++ */
++ fec_rx_task_enable(fec);
++
++ udelay(100000);
++ return 0;
++}
++
++static int fec_init(struct eth_device *dev, bd_t* bd)
++{
++ static int once = 0;
++ uint32_t base;
++ fec_priv *fec = (fec_priv *)dev->priv;
++
++ if( !once )
++ {
++ /*
++ * reserve memory for both buffer descriptor chains at once
++ * Datasheet forces the startaddress of each chain is 16 byte aligned
++ */
++ base = (uint32_t)malloc( (2 + FEC_RBD_NUM) * sizeof(FEC_BD) + DB_ALIGNMENT );
++ memset((void *)base, 0, (2 + FEC_RBD_NUM) * sizeof(FEC_BD) + DB_ALIGNMENT);
++ base += (DB_ALIGNMENT-1);
++ base &= ~(DB_ALIGNMENT-1);
++
++ fec->rbd_base = (FEC_BD*)base;
++
++ base += FEC_RBD_NUM * sizeof(FEC_BD);
++
++ fec->tbd_base = (FEC_BD*)base;
++ }
++
++ /*
++ * Set interrupt mask register
++ */
++ writel(0x00000000, &fec->eth->imask);
++
++ /*
++ * Clear FEC-Lite interrupt event register(IEVENT)
++ */
++ writel(0xffffffff, &fec->eth->ievent);
++
++
++ /*
++ * Set FEC-Lite receive control register(R_CNTRL):
++ */
++ if (fec->xcv_type == SEVENWIRE) {
++ /*
++ * Frame length=1518; 7-wire mode
++ */
++ writel(0x05ee0020, &fec->eth->r_cntrl); /* FIXME 0x05ee0000 */
++ } else {
++ /*
++ * Frame length=1518; MII mode;
++ */
++ writel(0x05ee0024, &fec->eth->r_cntrl); /* FIXME 0x05ee0004 */
++ /*
++ * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
++ * and do not drop the Preamble.
++ */
++ writel((((imx_get_ahbclk() /1000000)+2) / 5) << 1, &fec->eth->mii_speed); /* No MII for 7-wire mode */
++ PRINTF("fec_init: mii_speed %#lx\n", (((imx_get_ahbclk() /1000000)+2) / 5) << 1);
++ }
++ /*
++ * Set Opcode/Pause Duration Register
++ */
++ writel(0x00010020, &fec->eth->op_pause); /* FIXME 0xffff0020; */
++ writel(0x2, &fec->eth->x_wmrk);
++ /*
++ * Set multicast address filter
++ */
++ writel(0x00000000, &fec->eth->gaddr1);
++ writel(0x00000000, &fec->eth->gaddr2);
++
++
++ /* clear MIB RAM */
++ long* mib_ptr = (long*)(IMX_FEC_BASE + 0x200);
++ while (mib_ptr <= (long*)(IMX_FEC_BASE + 0x2FC)) {
++ *mib_ptr++ = 0;
++ }
++
++ /* FIFO receive start register */
++ writel(0x520, &fec->eth->r_fstart);
++
++ /* size and address of each buffer */
++ writel(FEC_MAX_PKT_SIZE, &fec->eth->emrbr);
++ writel((uint32_t)fec->tbd_base, &fec->eth->etdsr);
++ writel((uint32_t)fec->rbd_base, &fec->eth->erdsr);
++
++ /*
++ * Initialize RxBD/TxBD rings
++ */
++ fec_rbd_init(fec, FEC_RBD_NUM, FEC_MAX_PKT_SIZE, once);
++ fec_tbd_init(fec);
++
++
++ if (fec->xcv_type != SEVENWIRE)
++ miiphy_restart_aneg(&fec->miiphy);
++
++ once = 1; /* malloc done now (and once) */
++
++ fec_open(dev);
++ return 0;
++}
++
++/**
++ * Halt the FEC engine
++ * @param[in] dev Our device to handle
++ */
++static void fec_halt(struct eth_device *dev)
++{
++ fec_priv *fec = &gfec;
++ int counter = 0xffff;
++
++ /*
++ * issue graceful stop command to the FEC transmitter if necessary
++ */
++ writel(FEC_ECNTRL_RESET | readl(&fec->eth->x_cntrl), &fec->eth->x_cntrl);
++
++ PRINTF("eth_halt: wait for stop regs\n");
++ /*
++ * wait for graceful stop to register
++ */
++ while ((counter--) && (!(readl(&fec->eth->ievent) & FEC_IEVENT_GRA)))
++ ; /* FIXME ensure time */
++
++ /*
++ * Disable SmartDMA tasks
++ */
++ fec_tx_task_disable(fec);
++ fec_rx_task_disable(fec);
++
++ /*
++ * Disable the Ethernet Controller
++ * Note: this will also reset the BD index counter!
++ */
++ writel(0, &fec->eth->ecntrl);
++ fec->rbd_index = 0;
++ fec->tbd_index = 0;
++ PRINTF("eth_halt: done\n");
++}
++
++/**
++ * Transmit one frame
++ * @param[in] dev Our ethernet device to handle
++ * @param[in] packet Pointer to the data to be transmitted
++ * @param[in] length Data count in bytes
++ * @return 0 on success
++ */
++static int fec_send(struct eth_device *dev, volatile void* packet, int length)
++{
++ unsigned int status;
++
++ /*
++ * This routine transmits one frame. This routine only accepts
++ * 6-byte Ethernet addresses.
++ */
++ fec_priv *fec = (fec_priv *)dev->priv;
++
++ /*
++ * Check for valid length of data.
++ */
++ if ((length > 1500) || (length <= 0)) {
++ printf("Payload (%d) to large!\n", length);
++ return -1;
++ }
++
++ /*
++ * Setup the transmitt buffer
++ * Note: We are always using the first buffer for transmission,
++ * the second will be empty and only used to stop the DMA engine
++ */
++/* {
++ int i;
++ PRINTF("fec_send %d bytes:", length);
++ for (i=0;i<length;i++)
++ PRINTF(" %02x", ((char*)packet)[i]);
++ PRINTF("\n");
++ }
++*/ writew(length, &fec->tbd_base[fec->tbd_index].data_length);
++ writel((uint32_t)packet, &fec->tbd_base[fec->tbd_index].data_pointer);
++ /*
++ * update BD's status now
++ * This block:
++ * - is always the last in a chain (means no chain)
++ * - should transmitt the CRC
++ * - might be the last BD in the list, so the address counter should
++ * wrap (-> keep the WRAP flag)
++ */
++ status = readw(&fec->tbd_base[fec->tbd_index].status) & FEC_TBD_WRAP;
++ status |= FEC_TBD_LAST | FEC_TBD_TC | FEC_TBD_READY;
++ writew(status, &fec->tbd_base[fec->tbd_index].status);
++
++ /*
++ * Enable SmartDMA transmit task
++ */
++ fec_tx_task_enable(fec);
++
++ /*
++ * wait until frame is sent .
++ */
++ while (readw(&fec->tbd_base[fec->tbd_index].status) & FEC_TBD_READY) {
++ /* FIXME: Timeout */
++ }
++ PRINTF("fec_send: status 0x%x index %d\n", readw(&fec->tbd_base[fec->tbd_index].status), fec->tbd_index);
++ /* for next transmission use the other buffer */
++ if (fec->tbd_index)
++ fec->tbd_index = 0;
++ else
++ fec->tbd_index = 1;
++
++ return 0;
++}
++
++/**
++ * Pull one frame from the card
++ * @param[in] dev Our ethernet device to handle
++ * @return Length of packet read
++ */
++static int fec_recv(struct eth_device *dev)
++{
++ fec_priv *fec = (fec_priv *)dev->priv;
++ FEC_BD *rbd = &fec->rbd_base[fec->rbd_index];
++ unsigned long ievent;
++ int frame_length, len = 0;
++ NBUF *frame;
++ uint16_t bd_status;
++ uchar buff[FEC_MAX_PKT_SIZE];
++
++ /*
++ * Check if any critical events have happened
++ */
++ ievent = readl(&fec->eth->ievent);
++ writel(ievent, &fec->eth->ievent);
++ PRINTF("fec_recv: ievent 0x%x\n", ievent );
++ if (ievent & FEC_IEVENT_BABR) {
++ fec_halt(dev);
++ fec_init(dev, fec->bd);
++ printf("some error: 0x%08lx\n", ievent);
++ return 0;
++ }
++ if (ievent & FEC_IEVENT_HBERR) {
++ /* Heartbeat error */
++ writel(0x00000001 | readl(&fec->eth->x_cntrl), &fec->eth->x_cntrl);
++ }
++ if (ievent & FEC_IEVENT_GRA) {
++ /* Graceful stop complete */
++ if (readl(&fec->eth->x_cntrl) & 0x00000001) {
++ fec_halt(dev);
++ writel(~0x00000001 & readl(&fec->eth->x_cntrl), &fec->eth->x_cntrl);
++ fec_init(dev, fec->bd);
++ }
++ }
++
++ /*
++ * ensure reading the right buffer status
++ */
++ bd_status = readw(&rbd->status);
++ PRINTF("fec_recv: status 0x%x\n", bd_status );
++
++ if (!(bd_status & FEC_RBD_EMPTY)) {
++ if ((bd_status & FEC_RBD_LAST) && !(bd_status & FEC_RBD_ERR) &&
++ ((readw(&rbd->data_length) - 4) > 14)) {
++ /*
++ * Get buffer address and size
++ */
++ frame = (NBUF *)readl(&rbd->data_pointer);
++ frame_length = readw(&rbd->data_length) - 4;
++ /*
++ * Fill the buffer and pass it to upper layers
++ */
++ memcpy(buff, frame->data, frame_length);
++/* PRINTF("fec_recv %d bytes:", frame_length);
++ for (len=0;len<frame_length;len++)
++ PRINTF(" %02x", buff[len]);
++ PRINTF("\n");
++*/ NetReceive(buff, frame_length);
++ len = frame_length;
++ } else {
++ if (bd_status & FEC_RBD_ERR) {
++ printf("error frame: 0x%08lx 0x%08x\n", (ulong)rbd->data_pointer, bd_status);
++ }
++ }
++ /*
++ * free the current buffer, restart the engine
++ * and move forward to the next buffer
++ */
++ fec_rbd_clean(fec->rbd_index == (FEC_RBD_NUM - 1) ? 1 : 0, rbd);
++ fec_rx_task_enable(fec);
++ fec->rbd_index = (fec->rbd_index + 1) % FEC_RBD_NUM;
++ }
++ PRINTF("fec_recv: stop\n");
++
++ return len;
++}
++
++static int fec_probe(bd_t * bd)
++{
++ /*struct fec_platform_data *pdata = (struct fec_platform_data *)dev->platform_data;*/
++ struct eth_device *edev;
++ fec_priv *fec = &gfec;
++ unsigned char ethaddr_str[20];
++ unsigned char ethaddr[6];
++ char *tmp = getenv ("ethaddr");
++ char *end;
++
++ /* enable FEC clock */
++ PCCR1 |= PCCR1_HCLK_FEC;
++ PCCR0 |= PCCR0_FEC_EN;
++
++ /*create and fill edev struct*/
++ edev = (struct eth_device *)malloc(sizeof(struct eth_device));
++ edev->priv = fec;
++ edev->init = fec_init;
++ edev->send = fec_send;
++ edev->recv = fec_recv;
++ edev->halt = fec_halt;
++
++ fec->eth = (ethernet_regs *)IMX_FEC_BASE;
++ fec->bd = bd;
++
++ /* Reset chip. */
++ writel(FEC_ECNTRL_RESET, &fec->eth->ecntrl);
++ while(readl(&fec->eth->ecntrl) & 1) {
++ udelay(10);
++ }
++
++ fec->xcv_type = MII100; /*pdata->xcv_type;*/
++
++ sprintf(edev->name, "FEC ETHERNET");
++
++ if (fec->xcv_type != SEVENWIRE) {
++ fec->miiphy.read = fec_miiphy_read;
++ fec->miiphy.write = fec_miiphy_write;
++ fec->miiphy.address = CONFIG_PHY_ADDR;
++ fec->miiphy.flags = fec->xcv_type == MII10 ? MIIPHY_FORCE_10 : 0;
++ fec->miiphy.edev = edev;
++
++ /* if multiple PHY have to be supported */
++ /*miiphy_register (edev_>name, fec_miiphy_read, fec_miiphy_write);*/
++ }
++
++ //eth_register(edev);
++
++ if (( NULL != tmp ) && (12 <= strlen(tmp))) {
++ int i;
++ /* convert MAC from string to int */
++ for (i=0; i<6; i++) {
++ ethaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
++ if (tmp)
++ tmp = (*end) ? end+1 : end;
++ }
++ }
++ else if (fec_get_hwaddr(edev, ethaddr) == 0) {
++ sprintf ((char*)ethaddr_str, "%02X:%02X:%02X:%02X:%02X:%02X",
++ ethaddr[0], ethaddr[1], ethaddr[2], ethaddr[3],
++ ethaddr[4], ethaddr[5]);
++ printf("got MAC address from EEPROM: %s\n",ethaddr_str);
++ setenv ("ethaddr", (char*)ethaddr_str);
++ }
++ memcpy(edev->enetaddr, ethaddr, 6);
++ fec_set_hwaddr(edev, ethaddr);
++
++ return 0;
++}
++
++static int once = 0;
++
++int eth_init(bd_t * bd)
++{
++
++ if (!once)
++ {
++ PRINTF("eth_init: fec_probe(bd)\n");
++ fec_probe(bd);
++ once = 1;
++ }
++ PRINTF("eth_init: fec_init(gfec.miiphy.edev, bd)\n");
++ return fec_init(gfec.miiphy.edev, bd);
++};
++
++int fec_eth_initialize(bd_t *bd)
++{
++int lout=1;
++
++ if (!once)
++ {
++ PRINTF("eth_init: fec_probe(bd)\n");
++ lout = fec_probe(bd);
++ once = 1;
++ }
++ return lout;
++}
++
++int eth_send(volatile void *packet, int length)
++{
++ PRINTF("eth_send: fec_send(gfec.miiphy.edev, packet 0x%08lx, length)\n", packet);
++ return fec_send(gfec.miiphy.edev, packet, length);
++};
++
++int eth_rx(void){
++ PRINTF("eth_rcv: fec_rcv(gfec.miiphy.edev)\n");
++ return fec_recv(gfec.miiphy.edev);
++};
++
++
++void eth_halt(void)
++{
++ PRINTF("eth_halt: fec_halt(gfec)\n");
++ fec_halt(NULL);
++ return;
++};
++
++/**
++ * @file
++ * @brief Network driver for FreeScale's FEC implementation.
++ * This type of hardware can be found on i.MX27 CPUs
++ */
++
++#endif /* CONFIG_DRIVER_FEC_IMX27 */
++
+--- ref/u-boot-1.3.4/cpu/arm926ejs/imx27/fec_imx27.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-1.3.4/cpu/arm926ejs/imx27/fec_imx27.h 2008-12-29 16:27:49.000000000 +0100
+@@ -0,0 +1,306 @@
++/*
++ * (C) Copyright 2008 Armadeus Systems, nc
++ * (C) Copyright 2008 Eric Jarrige <eri...@ar...>
++ * (C) Copyright 2007 Pengutronix, Sascha Hauer <s....@pe...>
++ * (C) Copyright 2007 Pengutronix, Juergen Beisert <j.b...@pe...>
++ *
++ * (C) Copyright 2003
++ * Wolfgang Denk, DENX Software Engineering, wd...@de....
++ *
++ * This file is based on mpc4200fec.h
++ * (C) Copyright Motorola, Inc., 2000
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++
++#ifdef CONFIG_DRIVER_FEC_IMX27
++
++#ifndef __IMX27_FEC_H
++#define __IMX27_FEC_H
++
++/**
++ * Layout description of the FEC
++ */
++typedef struct ethernet_register_set {
++
++/* [10:2]addr = 00 */
++
++/* Control and status Registers (offset 000-1FF) */
++
++ uint32_t RES0[1]; /* MBAR_ETH + 0x000 */
++ uint32_t ievent; /* MBAR_ETH + 0x004 */
++ uint32_t imask; /* MBAR_ETH + 0x008 */
++
++ uint32_t RES1[1]; /* MBAR_ETH + 0x00C */
++ uint32_t r_des_active; /* MBAR_ETH + 0x010 */
++ uint32_t x_des_active; /* MBAR_ETH + 0x014 */
++ uint32_t RES2[3]; /* MBAR_ETH + 0x018-20 */
++ uint32_t ecntrl; /* MBAR_ETH + 0x024 */
++
++ uint32_t RES3[6]; /* MBAR_ETH + 0x028-03C */
++ uint32_t mii_data; /* MBAR_ETH + 0x040 */
++ uint32_t mii_speed; /* MBAR_ETH + 0x044 */
++ uint32_t RES4[7]; /* MBAR_ETH + 0x048-60 */
++ uint32_t mib_control; /* MBAR_ETH + 0x064 */
++
++ uint32_t RES5[7]; /* MBAR_ETH + 0x068-80 */
++ uint32_t r_cntrl; /* MBAR_ETH + 0x084 */
++ uint32_t RES6[15]; /* MBAR_ETH + 0x088-C0 */
++ uint32_t x_cntrl; /* MBAR_ETH + 0x0C4 */
++ uint32_t RES7[7]; /* MBAR_ETH + 0x0C8-E0 */
++ uint32_t paddr1; /* MBAR_ETH + 0x0E4 */
++ uint32_t paddr2; /* MBAR_ETH + 0x0E8 */
++ uint32_t op_pause; /* MBAR_ETH + 0x0EC */
++
++ uint32_t RES8[10]; /* MBAR_ETH + 0x0F0-114 */
++ uint32_t iaddr1; /* MBAR_ETH + 0x118 */
++ uint32_t iaddr2; /* MBAR_ETH + 0x11C */
++ uint32_t gaddr1; /* MBAR_ETH + 0x120 */
++ uint32_t gaddr2; /* MBAR_ETH + 0x124 */
++ uint32_t RES9[7]; /* MBAR_ETH + 0x128-140 */
++
++ uint32_t x_wmrk; /* MBAR_ETH + 0x144 */
++ uint32_t RES10[1]; /* MBAR_ETH + 0x148 */
++ uint32_t r_bound; /* MBAR_ETH + 0x14C */
++ uint32_t r_fstart; /* MBAR_ETH + 0x150 */
++ uint32_t RES11[11]; /* MBAR_ETH + 0x154-17C */
++ uint32_t erdsr; /* MBAR_ETH + 0x180 */
++ uint32_t etdsr; /* MBAR_ETH + 0x184 */
++ uint32_t emrbr; /* MBAR_ETH + 0x188 */
++ uint32_t RES12[29]; /* MBAR_ETH + 0x18C-1FC */
++
++/* MIB COUNTERS (Offset 200-2FF) */
++
++ uint32_t rmon_t_drop; /* MBAR_ETH + 0x200 */
++ uint32_t rmon_t_packets; /* MBAR_ETH + 0x204 */
++ uint32_t rmon_t_bc_pkt; /* MBAR_ETH + 0x208 */
++ uint32_t rmon_t_mc_pkt; /* MBAR_ETH + 0x20C */
++ uint32_t rmon_t_crc_align; /* MBAR_ETH + 0x210 */
++ uint32_t rmon_t_undersize; /* MBAR_ETH + 0x214 */
++ uint32_t rmon_t_oversize; /* MBAR_ETH + 0x218 */
++ uint32_t rmon_t_frag; /* MBAR_ETH + 0x21C */
++ uint32_t rmon_t_jab; /* MBAR_ETH + 0x220 */
++ uint32_t rmon_t_col; /* MBAR_ETH + 0x224 */
++ uint32_t rmon_t_p64; /* MBAR_ETH + 0x228 */
++ uint32_t rmon_t_p65to127; /* MBAR_ETH + 0x22C */
++ uint32_t rmon_t_p128to255; /* MBAR_ETH + 0x230 */
++ uint32_t rmon_t_p256to511; /* MBAR_ETH + 0x234 */
++ uint32_t rmon_t_p512to1023; /* MBAR_ETH + 0x238 */
++ uint32_t rmon_t_p1024to2047; /* MBAR_ETH + 0x23C */
++ uint32_t rmon_t_p_gte2048; /* MBAR_ETH + 0x240 */
++ uint32_t rmon_t_octets; /* MBAR_ETH + 0x244 */
++ uint32_t ieee_t_drop; /* MBAR_ETH + 0x248 */
++ uint32_t ieee_t_frame_ok; /* MBAR_ETH + 0x24C */
++ uint32_t ieee_t_1col; /* MBAR_ETH + 0x250 */
++ uint32_t ieee_t_mcol; /* MBAR_ETH + 0x254 */
++ uint32_t ieee_t_def; /* MBAR_ETH + 0x258 */
++ uint32_t ieee_t_lcol; /* MBAR_ETH + 0x25C */
++ uint32_t ieee_t_excol; /* MBAR_ETH + 0x260 */
++ uint32_t ieee_t_macerr; /* MBAR_ETH + 0x264 */
++ uint32_t ieee_t_cserr; /* MBAR_ETH + 0x268 */
++ uint32_t ieee_t_sqe; /* MBAR_ETH + 0x26C */
++ uint32_t t_fdxfc; /* MBAR_ETH + 0x270 */
++ uint32_t ieee_t_octets_ok; /* MBAR_ETH + 0x274 */
++
++ uint32_t RES13[2]; /* MBAR_ETH + 0x278-27C */
++ uint32_t rmon_r_drop; /* MBAR_ETH + 0x280 */
++ uint32_t rmon_r_packets; /* MBAR_ETH + 0x284 */
++ uint32_t rmon_r_bc_pkt; /* MBAR_ETH + 0x288 */
++ uint32_t rmon_r_mc_pkt; /* MBAR_ETH + 0x28C */
++ uint32_t rmon_r_crc_align; /* MBAR_ETH + 0x290 */
++ uint32_t rmon_r_undersize; /* MBAR_ETH + 0x294 */
++ uint32_t rmon_r_oversize; /* MBAR_ETH + 0x298 */
++ uint32_t rmon_r_frag; /* MBAR_ETH + 0x29C */
++ uint32_t rmon_r_jab; /* MBAR_ETH + 0x2A0 */
++
++ uint32_t rmon_r_resvd_0; /* MBAR_ETH + 0x2A4 */
++
++ uint32_t rmon_r_p64; /* MBAR_ETH + 0x2A8 */
++ uint32_t rmon_r_p65to127; /* MBAR_ETH + 0x2AC */
++ uint32_t rmon_r_p128to255; /* MBAR_ETH + 0x2B0 */
++ uint32_t rmon_r_p256to511; /* MBAR_ETH + 0x2B4 */
++ uint32_t rmon_r_p512to1023; /* MBAR_ETH + 0x2B8 */
++ uint32_t rmon_r_p1024to2047; /* MBAR_ETH + 0x2BC */
++ uint32_t rmon_r_p_gte2048; /* MBAR_ETH + 0x2C0 */
++ uint32_t rmon_r_octets; /* MBAR_ETH + 0x2C4 */
++ uint32_t ieee_r_drop; /* MBAR_ETH + 0x2C8 */
++ uint32_t ieee_r_frame_ok; /* MBAR_ETH + 0x2CC */
++ uint32_t ieee_r_crc; /* MBAR_ETH + 0x2D0 */
++ uint32_t ieee_r_align; /* MBAR_ETH + 0x2D4 */
++ uint32_t r_macerr; /* MBAR_ETH + 0x2D8 */
++ uint32_t r_fdxfc; /* MBAR_ETH + 0x2DC */
++ uint32_t ieee_r_octets_ok; /* MBAR_ETH + 0x2E0 */
++
++ uint32_t RES14[6]; /* MBAR_ETH + 0x2E4-2FC */
++
++ uint32_t RES15[64]; /* MBAR_ETH + 0x300-3FF */
++} ethernet_regs;
++
++#define FEC_IEVENT_HBERR 0x80000000
++#define FEC_IEVENT_BABR 0x40000000
++#define FEC_IEVENT_BABT 0x20000000
++#define FEC_IEVENT_GRA 0x10000000
++#define FEC_IEVENT_TXF 0x08000000
++#define FEC_IEVENT_TXB 0x04000000
++#define FEC_IEVENT_RXF 0x02000000
++#define FEC_IEVENT_RXB 0x01000000
++#define FEC_IEVENT_MII 0x00800000
++#define FEC_IEVENT_EBERR 0x00400000
++#define FEC_IEVENT_LC 0x00200000
++#define FEC_IEVENT_RL 0x00100000
++#define FEC_IEVENT_UN 0x00080000
++
++#define FEC_IMASK_HBERR 0x80000000
++#define FEC_IMASK_BABR 0x40000000
++#define FEC_IMASKT_BABT 0x20000000
++#define FEC_IMASK_GRA 0x10000000
++#define FEC_IMASKT_TXF 0x08000000
++#define FEC_IMASK_TXB 0x04000000
++#define FEC_IMASKT_RXF 0x02000000
++#define FEC_IMASK_RXB 0x01000000
++#define FEC_IMASK_MII 0x00800000
++#define FEC_IMASK_EBERR 0x00400000
++#define FEC_IMASK_LC 0x00200000
++#define FEC_IMASKT_RL 0x00100000
++#define FEC_IMASK_UN 0x00080000
++
++
++#define FEC_RCNTRL_MAX_FL_SHIFT 16
++#define FEC_RCNTRL_LOOP 0x00000001
++#define FEC_RCNTRL_DRT 0x00000002
++#define FEC_RCNTRL_MII_MODE 0x00000004
++#define FEC_RCNTRL_PROM 0x00000008
++#define FEC_RCNTRL_BC_REJ 0x00000010
++#define FEC_RCNTRL_FCE 0x00000020
++
++#define FEC_TCNTRL_GTS 0x00000001
++#define FEC_TCNTRL_HBC 0x00000002
++#define FEC_TCNTRL_FDEN 0x00000004
++#define FEC_TCNTRL_TFC_PAUSE 0x00000008
++#define FEC_TCNTRL_RFC_PAUSE 0x00000010
++
++#define FEC_ECNTRL_RESET 0x00000001 /**< reset the FEC */
++#define FEC_ECNTRL_ETHER_EN 0x00000002 /**< enable the FEC */
++
++/**
++ * @brief Descriptor buffer alignment
++ *
++ * i.MX27 requires a 16 byte alignment (but for the first element only)
++ */
++#define DB_ALIGNMENT 16
++
++/**
++ * @brief Data buffer alignment
++ *
++ * i.MX27 requires a four byte alignment for transmit and 16 bits
++ * alignment for receive so take 16
++ * Note: Valid for member data_pointer in struct buffer_descriptor
++ */
++#define DB_DATA_ALIGNMENT 16
++
++/**
++ * @brief Receive & Transmit Buffer Descriptor definitions
++ *
++ * Note: The first BD must be aligned (see DB_ALIGNMENT)
++ */
++typedef struct buffer_descriptor {
++ uint16_t data_length; /**< payload's length in bytes */
++ uint16_t status; /**< BD's staus (see datasheet) */
++ uint32_t data_pointer; /**< payload's buffer address */
++} FEC_BD;
++
++/**
++ * Supported phy types on this platform
++ */
++typedef enum {
++ SEVENWIRE, /**< 7-wire */
++ MII10, /**< MII 10Mbps */
++ MII100 /**< MII 100Mbps */
++} xceiver_type;
++
++/**
++ * @brief i.MX27-FEC private structure
++ */
++typedef struct {
++ ethernet_regs *eth; /**< pointer to register'S base */
++ xceiver_type xcv_type; /**< transceiver type */
++ FEC_BD *rbd_base; /**< RBD ring */
++ int rbd_index; /**< next receive BD to read */
++ FEC_BD *tbd_base; /**< TBD ring */
++ int tbd_index; /**< next transmit BD to write */
++ struct miiphy_device miiphy;
++ bd_t * bd;
++} fec_priv;
++
++/**
++ * @brief Numbers of buffer descriptors for receiving
++ *
++ * The number defines the stocked memory buffers for the receiving task.
++ * Larger values makes no sense in this limited environment.
++ */
++#define FEC_RBD_NUM 64
++
++/**
++ * @brief Define the ethernet packet size limit in memory
++ *
++ * Note: Do not shrink this number. This will force the FEC to spread larger
++ * frames in more than one BD. This is nothing to worry about, but the current
++ * driver can't handle it.
++ */
++#define FEC_MAX_PKT_SIZE 1536
++
++/* Receive BD status bits */
++#define FEC_RBD_EMPTY 0x8000 /**< Receive BD status: Buffer is empty */
++#define FEC_RBD_WRAP 0x2000 /**< Receive BD status: Last BD in ring */
++#define FEC_RBD_LAST 0x0800 /**< Receive BD status: Buffer is last in frame (useless here!) */
++#define FEC_RBD_MISS 0x0100 /**< Receive BD status: Miss bit for prom mode */
++#define FEC_RBD_BC 0x0080 /**< Receive BD status: The received frame is broadcast frame */
++#define FEC_RBD_MC 0x0040 /**< Receive BD status: The received frame is multicast frame */
++#define FEC_RBD_LG 0x0020 /**< Receive BD status: Frame length violation */
++#define FEC_RBD_NO 0x0010 /**< Receive BD status: Nonoctet align frame */
++#define FEC_RBD_CR 0x0004 /**< Receive BD status: CRC error */
++#define FEC_RBD_OV 0x0002 /**< Receive BD status: Receive FIFO overrun */
++#define FEC_RBD_TR 0x0001 /**< Receive BD status: Frame is truncated */
++#define FEC_RBD_ERR (FEC_RBD_LG | FEC_RBD_NO | FEC_RBD_CR | \
++ FEC_RBD_OV | FEC_RBD_TR)
++
++/* Transmit BD status bits */
++#define FEC_TBD_READY 0x8000 /**< Tansmit BD status: Buffer is ready */
++#define FEC_TBD_WRAP 0x2000 /**< Tansmit BD status: Mark as last BD in ring */
++#define FEC_TBD_LAST 0x0800 /**< Tansmit BD status: Buffer is last in frame */
++#define FEC_TBD_TC 0x0400 /**< Tansmit BD status: Transmit the CRC */
++#define FEC_TBD_ABC 0x0200 /**< Tansmit BD status: Append bad CRC */
++
++/* MII-related definitios */
++#define FEC_MII_DATA_ST 0x40000000 /**< Start of frame delimiter */
++#define FEC_MII_DATA_OP_RD 0x20000000 /**< Perform a read operation */
++#define FEC_MII_DATA_OP_WR 0x10000000 /**< Perform a write operation */
++#define FEC_MII_DATA_PA_MSK 0x0f800000 /**< PHY Address field mask */
++#define FEC_MII_DATA_RA_MSK 0x007c0000 /**< PHY Register field mask */
++#define FEC_MII_DATA_TA 0x00020000 /**< Turnaround */
++#define FEC_MII_DATA_DATAMSK 0x0000ffff /**< PHY data field */
++
++#define FEC_MII_DATA_RA_SHIFT 18 /* MII Register address bits */
++#define FEC_MII_DATA_PA_SHIFT 23 /* MII PHY address bits */
++
++#endif /* __IMX27_FEC_H */
++
++#endif /* CONFIG_DRIVER_FEC_IMX27 */
++/**
++ * @file
++ * @brief Definitions for the FEC driver (i.MX27)
++ */
+--- ref/u-boot-1.3.4/cpu/arm926ejs/imx27/generic.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-1.3.4/cpu/arm926ejs/imx27/generic.c 2008-12-29 16:27:49.000000000 +0100
+@@ -0,0 +1,289 @@
++/*
++ * Copyright (c) 2008 Eric Jarrige <eri...@ar...>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/imx-regs.h>
++/*#include <asm/arch/clock.h>
++#include <asm-generic/div64.h>
++#include <init.h>
++*/
++/*
++ * get the system pll clock in Hz
++ *
++ * mfi + mfn / (mfd +1)
++ * f = 2 * f_ref * --------------------
++ * pd + 1
++ */
++unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
++{
++/* unsigned long long ll;
++ unsigned int quot;
++*/
++ unsigned int mfi = (pll >> 10) & 0xf;
++ unsigned int mfn = pll & 0x3ff;
++ unsigned int mfd = (pll >> 16) & 0x3ff;
++ unsigned int pd = (pll >> 26) & 0xf;
++
++ mfi = mfi <= 5 ? 5 : mfi;
++
++/* ll = 2 * (unsigned long long)f_ref * ( (mfi << 16) + (mfn << 16) / (mfd + 1));
++ quot = (pd + 1) * (1 << 16);
++ ll += quot / 2;
++ do_div(ll, quot);
++ return (unsigned int) ll;*/
++ return (2*(u64)f_ref* (mfi*(mfd+1) + mfn))/((mfd+1)*(pd+1));
++}
++
++static ulong clk_in_32k(void)
++{
++ return 1024 * CFG_OSC32;
++}
++
++static ulong clk_in_26m(void)
++{
++ if (CSCR & CSCR_OSC26M_DIV1P5) {
++ /* divide by 1.5 */
++ return 26000000 / 1.5;
++ } else {
++ /* divide by 1 */
++ return 26000000;
++ }
++}
++
++ulong imx_get_mpllclk(void)
++{
++ ulong cscr = CSCR;
++ ulong fref;
++
++ if (cscr & CSCR_MCU_SEL)
++ fref = clk_in_26m();
++ else
++ fref = clk_in_32k();
++
++ return imx_decode_pll(MPCTL0, fref);
++}
++
++ulong imx_get_armclk(void)
++{
++ ulong cscr = CSCR;
++ ulong fref = imx_get_mpllclk();
++ ulong div;
++
++ if (!(cscr & CSCR_ARM_SRC_MPLL))
++ fref = (fref * 2) / 3;
++
++ div = ((cscr >> 12) & 0x3) + 1;
++
++ return fref / div;
++}
++
++ulong imx_get_ahbclk(void)
++{
++ ulong cscr = CSCR;
++ ulong fref = imx_get_mpllclk();
++ ulong div;
++
++ div = ((cscr >> 8) & 0x3) + 1;
++
++ return fref * 2 / 3 / div;
++
++}
++
++ulong imx_get_spllclk(void)
++{
++ ulong cscr = CSCR;
++ ulong fref;
++
++ if (cscr & CSCR_SP_SEL)
++ fref = clk_in_26m();
++ else
++ fref = clk_in_32k();
++
++ return imx_decode_pll(SPCTL0, fref);
++}
++
++static ulong imx_get_usbclk(void)
++{
++ return (imx_get_spllclk() / (((CSCR >> 28) & 0x07) + 1));
++}
++
++static ulong imx_get_nfcclk(void)
++{
++ return (imx_get_ahbclk() / (((PCDR0 >> 6) & 0x0f) + 1));
++}
++
++static ulong imx_get_mshcclk(void)
++{
++ return (imx_get_mpllclk() * 2 / (((PCDR0 >> 0) & 0x3f) + 1) / 3);
++}
++
++static ulong imx_get_h264clk(void)
++{
++ return ((imx_get_mpllclk() * 4 ) / (((PCDR0 >> 10) & 0x3f) + 4) / 3);
++}
++
++static ulong imx_get_ssi1clk(void)
++{
++ return ((imx_get_mpllclk() * 4 ) / (((PCDR0 >> 16) & 0x3f) + 4) / 3);
++}
++
++static ulong imx_get_ssi2clk(void)
++{
++ return ((imx_get_mpllclk() * 4) / (((PCDR0 >> 26) & 0x3f) + 4) / 3);
++}
++
++static ulong imx_decode_perclk(ulong div)
++{
++ return (imx_get_mpllclk() * 2) / (div * 3);
++}
++
++ulong imx_get_perclk1(void)
++{
++ return imx_decode_perclk((PCDR1 & 0x3f) + 1);
++}
++
++ulong imx_get_perclk2(void)
++{
++ return imx_decode_perclk(((PCDR1 >> 8) & 0x3f) + 1);
++}
++
++ulong imx_get_perclk3(void)
++{
++ return imx_decode_perclk(((PCDR1 >> 16) & 0x3f) + 1);
++}
++
++ulong imx_get_perclk4(void)
++{
++ return imx_decode_perclk(((PCDR1 >> 24) & 0x3f) + 1);
++}
++
++int imx_dump_clocks(void)
++{
++ printf("mpll : %10ld Hz\n", imx_get_mpllclk());
++ printf("spll : %10ld Hz\n", imx_get_spllclk());
++ printf("arm : %10ld Hz\n", imx_get_armclk());
++ printf("hclk : %10ld Hz\n", imx_get_ahbclk());
++ printf("perclk1: %10ld Hz\n", imx_get_perclk1());
++ printf("perclk2: %10ld Hz\n", imx_get_perclk2());
++ printf("perclk3: %10ld Hz\n", imx_get_perclk3());
++ printf("perclk4: %10ld Hz\n", imx_get_perclk4());
++ printf("usbclk : %10ld Hz\n", imx_get_usbclk());
++ printf("nfcclk : %10ld Hz\n", imx_get_nfcclk());
++ printf("mshcclk: %10ld Hz\n", imx_get_mshcclk());
++ printf("h264clk: %10ld Hz\n", imx_get_h264clk());
++ printf("ssi1clk: %10ld Hz\n", imx_get_ssi1clk());
++ printf("ssi2clk: %10ld Hz\n", imx_get_ssi2clk());
++ printf("clkin26: %10ld Hz\n", clk_in_26m());
++ printf("clkin32: %10d Hz\n", CFG_OSC32);
++ printf("ESDCTL0: %#x ESDCTL1: %#x\n", ESDCTL0, ESDCTL1);
++ printf("ESDCFG0: %#x ESDCFG1: %#x\n", ESDCFG0,ESDCFG1);
++ printf("SDmdreg: %#x\n", CFG_SDRAM_1_BASE+CFG_SDRAM_MODE_REGISTER_VAL);
++ printf("SDemdreg: %#x\n", CFG_SDRAM_1_BASE+CFG_SDRAM_EXT_MODE_REGISTER_VAL);
++ printf("SDprech: %#x\n", CFG_SDRAM_PRECHARGE_ALL_VAL);
++ printf("SPL Saved boot: %#lx\n", *((long*)(0xa0200004)));
++ printf("uboot Saved boot: %#lx\n", *((long*)(0xa0200008)));
++
++ return 0;
++}
++
++
++/*void imx_gpio_mux(unsigned long mode)
++{
++ unsigned long reg, shift, tmp;
++
++ reg = IOMUXC_BASE + (mode & 0xfc);
++ shift = (~mode & 0x3) * 8;
++
++ tmp = __REG(reg);
++ tmp &= ~(0xff << shift);
++ tmp |= ((mode >> 8) & 0xff) << shift;
++ __REG(reg) = tmp;
++}
++*/
++#if defined(CONFIG_DISPLAY_CPUINFO)
++int print_cpuinfo (void)
++{
++ printf("CPU: Freescale i.MX27 at %ld MHz\n",
++ imx_get_mpllclk() / 1000000);
++ imx_dump_clocks();
++ printf("\n");
++ return 0;
++}
++#endif
++
++void imx_gpio_mode(int gpio_mode)
++{
++ unsigned int pin = gpio_mode & GPIO_PIN_MASK;
++ unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
++ unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
++ unsigned int aout = (gpio_mode & GPIO_AOUT_MASK) >> GPIO_AOUT_SHIFT;
++ unsigned int bout = (gpio_mode & GPIO_BOUT_MASK) >> GPIO_BOUT_SHIFT;
++ unsigned int tmp;
++
++ /* Pullup enable */
++ if(gpio_mode & GPIO_PUEN)
++ PUEN(port) |= (1 << pin);
++ else
++ PUEN(port) &= ~(1 << pin);
++
++ /* Data direction */
++ if(gpio_mode & GPIO_OUT)
++ DDIR(port) |= 1 << pin;
++ else
++ DDIR(port) &= ~(1 << pin);
++
++ /* Primary / alternate function */
++ if(gpio_mode & GPIO_AF)
++ GPR(port) |= (1 << pin);
++ else
++ GPR(port) &= ~(1 << pin);
++
++ /* use as gpio? */
++ if(!(gpio_mode & (GPIO_PF | GPIO_AF)))
++ GIUS(port) |= (1 << pin);
++ else
++ GIUS(port) &= ~(1 << pin);
++
++ /* Output / input configuration */
++ if (pin < 16) {
++ tmp = OCR1(port);
++ tmp &= ~(3 << (pin * 2));
++ tmp |= (ocr << (pin * 2));
++ OCR1(port) = tmp;
++
++ ICONFA1(port) &= ~(3 << (pin * 2));
++ ICONFA1(port) |= aout << (pin * 2);
++ ICONFB1(port) &= ~(3 << (pin * 2));
++ ICONFB1(port) |= bout << (pin * 2);
++ } else {
++ pin -= 16;
++
++ tmp = OCR2(port);
++ tmp &= ~(3 << (pin * 2));
++ tmp |= (ocr << (pin * 2));
++ OCR2(port) = tmp;
++
++ ICONFA2(port) &= ~(3 << (pin * 2));
++ ICONFA2(port) |= aout << (pin * 2);
++ ICONFB2(port) &= ~(3 << (pin * 2));
++ ICONFB2(port) |= bout << (pin * 2);
++ }
++
++}
++
+--- ref/u-boot-1.3.4/cpu/arm926ejs/imx27/i2c.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-1.3.4/cpu/arm926ejs/imx27/i2c.c 2008-12-29 16:27:49.000000000 +0100
+@@ -0,0 +1,407 @@
++/*
++ * Eric Jarrige <jo...@us...>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ *
++ */
++
++#include <common.h>
++
++#ifdef CONFIG_HARD_I2C
++
++#include <asm/io.h>
++#include <asm/arch/clock.h>
++#include <asm/arch/imx-regs.h>
++#include <i2c.h>
++#include "i2c.h"
++
++/*#define DEBUG_I2C*/
++
++/* current active I2C bus */
++static unsigned int bus_num = 0;
++
++static int hclk_dividers[] = {
++ 30, 32, 36, 42, 48, 52, 60, 72,
++ 80, 88, 104, 128, 144, 160, 192, 240,
++ 288, 320, 384, 480, 576, 640, 768, 960,
++ 1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840,
++ 22, 24, 26, 26, 32, 36, 40, 44,
++ 48, 56, 64, 72, 80, 96, 112, 128,
++ 160, 192, 224, 256, 320, 384, 448, 512,
++ 640, 768, 896, 1024, 1280, 1536, 1792, 2048
++};
++
++unsigned long i2c_bases[] = {IMX_I2C1_BASE, IMX_I2C2_BASE};
++
++extern void imx_gpio_mode (int gpio_mode);
++
++/*-----------------------------------------------------------------------
++ * Definitions
++ */
++
++#define I2C_ACK 0 /* level to ack a byte */
++#define I2C_NOACK 1 /* level to noack a byte */
++
++
++#ifdef DEBUG_I2C
++#define PRINTD(fmt,args...) do { \
++ DECLARE_GLOBAL_DATA_PTR; \
++ if (gd->have_console) \
++ printf (fmt ,##args); \
++ } while (0)
++#else
++#define PRINTD(fmt,args...)
++#endif
++
++/*-----------------------------------------------------------------------
++ * Local functions
++ */
++
++/*-----------------------------------------------------------------------
++ * START: High -> Low on SDA while SCL is High
++ * after check for a bus free
++ */
++static void
++imxi2c_send_start (void)
++{
++ while ((I2SR(bus_num) & I2SR_IBB)) ;
++ I2CR(bus_num) |= I2CR_MSTA;
++ I2SR(bus_num) &= ~I2SR_IIF;
++}
++
++/*-----------------------------------------------------------------------
++ * STOP: Low -> High on SDA while SCL is High
++ * after the end of previous transfer
++ */
++static void
++imxi2c_send_stop (void)
++{
++ while (!(I2SR(bus_num) & I2SR_ICF)) ;
++ I2CR(bus_num) &= ~I2CR_MSTA;
++}
++
++/*-----------------------------------------------------------------------
++ * Send 8 bits and look for an acknowledgement.
++ */
++static int
++imxi2c_write_byte (uchar data)
++{
++ while (!(I2SR(bus_num) & I2SR_ICF)) ; /* Wait end of transfer */
++
++ I2CR(bus_num) |= I2CR_MTX;
++ I2SR(bus_num) &= ~I2SR_IIF;
++ I2DR(bus_num) = data;
++
++ while (!(I2SR(bus_num) & I2SR_IIF)) ; /* checking IIF before ICF seems required */
++
++ I2SR(bus_num) &= ~I2SR_IIF;
++
++ while (!(I2SR(bus_num) & I2SR_ICF)) ; /* Wait end of transfer */
++
++ return (I2SR(bus_num) & I2SR_RXAK); /* not a nack is an ack */
++}
++
++/*-----------------------------------------------------------------------
++ * if ack == I2C_ACK, ACK the byte so can continue reading, else
++ * send I2C_NOACK to end the read.
++ */
++static uchar
++imxi2c_read_byte (int ack)
++{
++ int data;
++
++ while (!(I2SR(bus_num) & I2SR_ICF)) ;
++ I2CR(bus_num) &= ~I2CR_MTX;
++
++ if (ack)
++ {
++ I2CR(bus_num) |= I2CR_TXAK;
++ }
++ else
++ {
++ I2CR(bus_num) &= ~I2CR_TXAK;
++ }
++
++ data = I2DR(bus_num);
++ return (data);
++}
++
++/* ------------------------------------------------------------------------
++ * API Functions
++ * ------------------------------------------------------------------------
++ */
++
++/*-----------------------------------------------------------------------
++ * i2c_init compute the i2c divider to reach the requested speed
++ * see mxl reference manual
++ */
++void
++i2c_init (int speed, int slaveaddr)
++{
++ int i;
++
++#ifdef CONFIG_I2C_MULTI_BUS
++ imx_gpio_mode (PC5_PF_I2C2_DATA);
++ imx_gpio_mode (PC6_PF_I2C2_CLK);
++ PCCR0 |= PCCR0_I2C2_EN; /*enable I2C2 clock*/
++#endif
++ imx_gpio_mode (PD17_PF_I2C_DATA);
++ imx_gpio_mode (PD18_PF_I2C_CLK);
++ PCCR0 |= PCCR0_I2C1_EN; /*enable I2C2 clock*/
++
++
++ for(i = 0; i < CONFIG_I2C_MULTI_BUS; i++){
++
++ i2c_set_bus_num(i);
++ I2CR(bus_num) = 0;
++
++ i2c_set_bus_speed(speed);
++
...
[truncated message content] |
|
From: <th...@us...> - 2009-02-23 14:14:58
|
Revision: 1082
http://armadeus.svn.sourceforge.net/armadeus/?rev=1082&view=rev
Author: thom25
Date: 2009-02-23 14:14:56 +0000 (Mon, 23 Feb 2009)
Log Message:
-----------
[KERNEL] allow tsc, max and mcp to be compiled as kernel module
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-02-23 13:46:17 UTC (rev 1081)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-02-23 14:14:56 UTC (rev 1082)
@@ -1060,7 +1060,7 @@
+ /* force LCD data/control lines to 0 before powering the LCD
+ otherwise start up conditions may not be respected */
+ int i;
-+ for( i=5; i <= 31; i++ ){
++ for( i=5; i <= 23; i++ ){
+ mxc_gpio_mode( GPIO_PORTA | i | GPIO_OUT| GPIO_GPIO );
+ gpio_set_value(GPIO_PORTA | i, 0);
+ }
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|
