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From: Fabien M <fa...@us...> - 2010-04-15 08:55:35
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 1888c2241743dca857bd5bc6142e2eeb77ccf5a5 (commit)
via f918572e9efdc63a7aa155c9e2efdb274fea2ae8 (commit)
via cb7f44c3ec61dfea3223efd672e08abf8e8780e8 (commit)
from 99ff779260bf47bbd60ab99cf391609d3ebc1550 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 1888c2241743dca857bd5bc6142e2eeb77ccf5a5
Author: Fabien Marteau <fab...@ar...>
Date: Thu Apr 15 10:55:11 2010 +0200
[linux] Add comments in 347x patches
commit f918572e9efdc63a7aa155c9e2efdb274fea2ae8
Merge: cb7f44c3ec61dfea3223efd672e08abf8e8780e8 99ff779260bf47bbd60ab99cf391609d3ebc1550
Author: Fabien Marteau <fab...@ar...>
Date: Thu Apr 15 09:39:45 2010 +0200
Merge branch 'master' of ssh://fabm@armadeus.git.sourceforge.net/gitroot/armadeus/armadeus
commit cb7f44c3ec61dfea3223efd672e08abf8e8780e8
Author: Fabien Marteau <fab...@ar...>
Date: Wed Apr 14 10:07:55 2010 +0200
[linux][module] Adding irq configuration capability and suppress trailling white space
-----------------------------------------------------------------------
Summary of changes:
...-lan95xx-add_additionnal_USB_products_IDs.patch | 12 +++++
...c-armadeus-lan95xx-activate_blinking_leds.patch | 11 ++++
target/linux/modules/gpio/core.c | 49 +++++++++++--------
3 files changed, 51 insertions(+), 21 deletions(-)
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347b-smsc-lan95xx-add_additionnal_USB_products_IDs.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347b-smsc-lan95xx-add_additionnal_USB_products_IDs.patch
index 4027ee8..175bd64 100644
--- a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347b-smsc-lan95xx-add_additionnal_USB_products_IDs.patch
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347b-smsc-lan95xx-add_additionnal_USB_products_IDs.patch
@@ -1,3 +1,15 @@
+author Steve Glendinning <ste...@sm...>
+ Tue, 22 Sep 2009 05:13:02 +0000 (05:13 +0000)
+committer David S. Miller <da...@da...>
+ Tue, 22 Sep 2009 21:00:06 +0000 (14:00 -0700)
+
+smsc95xx: add additional USB product IDs
+
+Signed-off-by: Steve Glendinning <ste...@sm...>
+Signed-off-by: David S. Miller <da...@da...>
+
+---
+
Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.c
===================================================================
--- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.c 2010-04-13 16:23:57.000000000 +0200
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347c-armadeus-lan95xx-activate_blinking_leds.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347c-armadeus-lan95xx-activate_blinking_leds.patch
index d360c21..58dfe7f 100644
--- a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347c-armadeus-lan95xx-activate_blinking_leds.patch
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347c-armadeus-lan95xx-activate_blinking_leds.patch
@@ -1,3 +1,14 @@
+author Steve Glendinning <ste...@sm...>
+ Tue, 22 Sep 2009 05:13:02 +0000 (05:13 +0000)
+committer David S. Miller <da...@da...>
+ Tue, 22 Sep 2009 21:00:06 +0000 (14:00 -0700)
+
+smsc95xx: Separe link led and activity led
+
+Signed-off-by: Fabien Marteau <fab...@ar...>
+
+----
+
Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.c
===================================================================
--- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.c 2010-04-13 16:27:42.000000000 +0200
diff --git a/target/linux/modules/gpio/core.c b/target/linux/modules/gpio/core.c
index c4ab1f9..2f2b327 100755
--- a/target/linux/modules/gpio/core.c
+++ b/target/linux/modules/gpio/core.c
@@ -30,9 +30,9 @@
#include <asm/io.h>
#include <asm/uaccess.h>
#include <linux/interrupt.h> /* request_irq */
-#include <linux/irq.h> /* set_irq_type */
+#include <linux/irq.h> /* set_irq_type */
#include <asm/gpio.h> /* imx_gpio_... */
-#include <linux/cdev.h> /* struct cdev */
+#include <linux/cdev.h> /* struct cdev */
#include <mach/hardware.h>
#include <asm/mach/map.h>
#ifdef CONFIG_ARCH_MX2
@@ -218,7 +218,7 @@ static unsigned long fromString(char* buffer, int number_of_bits, int base)
/* Create WORD to write from the string */
for (i=0, j=1; j<=number_of_bits; i++) {
//printk("%x j=%d i=%d\n", buffer[i], j, i);
- if (buffer[i] == '\0')
+ if (buffer[i] == '\0')
break; /* EOC */
ret_val <<= base;
@@ -347,17 +347,17 @@ static void setPortMode(unsigned int aPort, unsigned int aModeMask)
{
int i;
int ocr1, ocr2, gius;
-
+
ocr1 = __raw_readl(VA_GPIO_BASE + MXC_OCR1(aPort));
ocr2 = __raw_readl(VA_GPIO_BASE + MXC_OCR2(aPort));
gius = __raw_readl(VA_GPIO_BASE + MXC_GIUS(aPort));
aModeMask = aModeMask & PORT_MASK[aPort]; /* only sets the allowed pins */
- for (i=0; i < number_of_pins[aPort]; i++) {
+ for (i=0; i < number_of_pins[aPort]; i++) {
if (i < 16) {
- if ((aModeMask>>i) & 1)
+ if ((aModeMask>>i) & 1)
ocr1 = ocr1 | (3<<(i*2));
} else {
- if ((aModeMask>>i) & 1)
+ if ((aModeMask>>i) & 1)
ocr2 = ocr2 | (3<<((i-16)*2));
}
}
@@ -500,7 +500,7 @@ static ssize_t armadeus_gpio_dev_read(struct file *file, char *buf,
value = gpio_get_value(minor);
pr_debug("Single pin read: %d\n", value);
}
-
+
value = readFromPort(minor);
port_status = (char)(value & 0xFF);
@@ -523,7 +523,7 @@ static irqreturn_t armadeus_gpio_interrupt(int irq, void *dev_id)
u32 old_state, new_state;
pr_debug("IT for pin %d %d\n", gpio->port, gpio->number);
-
+
old_state = gpio->pin_state;
new_state = gpio_get_value(gpio->port|gpio->number);
gpio->pin_state = new_state;
@@ -607,7 +607,7 @@ static int armadeus_gpio_dev_open(struct inode *inode, struct file *file)
if (ret)
goto err_irq;
switch (gpio->irq_value) {
- case (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING):
+ case (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING):
;
case IRQF_TRIGGER_RISING:
set_irq_type(irq, IRQF_TRIGGER_RISING);
@@ -659,6 +659,7 @@ int armadeus_gpio_dev_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
{
int err = 0, ret = 0, value = 0;
+ u64 value64;
unsigned int minor;
pr_debug(DRIVER_NAME " ## IOCTL received: (0x%x) ##\n", cmd);
@@ -733,24 +734,30 @@ int armadeus_gpio_dev_ioctl(struct inode *inode, struct file *filp,
break;
case GPIORDIRQMODE:
- /* TODO */
+ value64 = (u64)(shadows_irq2[MAX_MINOR - minor] & 0xFFFFFFFF);
+ value64 |= (u64)(shadows_irq<<32);
+ ret = __put_user(value64, (u64 *)arg);
break;
- case GPIOWRIRQMODE:
- /* TODO */
- break;
+ case GPIOWRIRQMODE:
+ ret = __get_user(value64, (u64 *)arg);
+ if(ret == 0) {
+ shadows_irq[MAX_MINOR - minor] = (value64>>32);
+ shadows_irq2[MAX_MINOR - minor] = (value64&0xFFFFFFFF);
+ }
+ break;
- case GPIORDPULLUP:
+ case GPIORDPULLUP:
value = getPortPullUp(MAX_MINOR - minor);
ret = __put_user(value, (unsigned int *)arg);
- break;
+ break;
- case GPIOWRPULLUP:
+ case GPIOWRPULLUP:
ret = __get_user(value, (unsigned int *)arg);
if (ret == 0) {
setPortPullUp(MAX_MINOR - minor, value);
}
- break;
+ break;
default:
printk("IOCTL not supported\n");
@@ -918,13 +925,13 @@ static int armadeus_gpio_proc_write( __attribute__ ((unused)) struct file *file,
} else {
pr_debug("/proc wrote 0x%x 0x%x", gpio_state, gpio_state2);
}
- pr_debug(" on %s %s register\n", port_name[port_ID],
+ pr_debug(" on %s %s register\n", port_name[port_ID],
port_setting_name[settings->type]);
}
up(&gpio_sema);
- /* Makes as if we take all the data sent even if we can't handle more
+ /* Makes as if we take all the data sent even if we can't handle more
than register size */
return count;
}
@@ -1087,7 +1094,7 @@ static void print_port_params(int port, int nb, int* params)
printk(" %s Parameters (%i): ", port_name[port], nb);
for (i = 0; i < NB_CONFIG_REGS; i++) {
- printk(" 0x%x", params[i]);
+ printk(" 0x%x", params[i]);
}
printk("\n");
}
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2010-04-14 00:19:29
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 99ff779260bf47bbd60ab99cf391609d3ebc1550 (commit)
from a3f16b73b73a1b10b1e3d506a119ed0d590c81e5 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 99ff779260bf47bbd60ab99cf391609d3ebc1550
Author: jorasse <jo...@ar...>
Date: Wed Apr 14 02:19:00 2010 +0200
[U-Boot] set active partition on rootsfs to support fsload, ls..
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf27/apf27-u-boot-1.3.4.h | 4 ++--
buildroot/target/device/armadeus/apf27/apf27.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/buildroot/target/device/armadeus/apf27/apf27-u-boot-1.3.4.h b/buildroot/target/device/armadeus/apf27/apf27-u-boot-1.3.4.h
index 0746c9e..7126904 100644
--- a/buildroot/target/device/armadeus/apf27/apf27-u-boot-1.3.4.h
+++ b/buildroot/target/device/armadeus/apf27/apf27-u-boot-1.3.4.h
@@ -32,7 +32,7 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_ENV_VERSION "1.6"
+#define CONFIG_ENV_VERSION "1.7"
#define CONFIG_IDENT_STRING " apf27 patch 2.1"
#define CONFIG_ARM926EJS 1 /* this is an ARM926EJS CPU */
@@ -130,7 +130,7 @@
"filesize=" MK_STR(CFG_MONITOR_LEN) "\0" \
"console=" CONFIG_CONSOLE "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
- "partition=nand0,3\0" \
+ "partition=nand0,4\0" \
"uboot_offset=" MK_STR(CFG_MONITOR_OFFSET) "\0" \
"uboot_len=" MK_STR(CFG_MONITOR_LEN) "\0" \
"env_offset=" MK_STR(CFG_ENV_OFFSET) "\0" \
diff --git a/buildroot/target/device/armadeus/apf27/apf27.h b/buildroot/target/device/armadeus/apf27/apf27.h
index 0746c9e..7126904 100644
--- a/buildroot/target/device/armadeus/apf27/apf27.h
+++ b/buildroot/target/device/armadeus/apf27/apf27.h
@@ -32,7 +32,7 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_ENV_VERSION "1.6"
+#define CONFIG_ENV_VERSION "1.7"
#define CONFIG_IDENT_STRING " apf27 patch 2.1"
#define CONFIG_ARM926EJS 1 /* this is an ARM926EJS CPU */
@@ -130,7 +130,7 @@
"filesize=" MK_STR(CFG_MONITOR_LEN) "\0" \
"console=" CONFIG_CONSOLE "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
- "partition=nand0,3\0" \
+ "partition=nand0,4\0" \
"uboot_offset=" MK_STR(CFG_MONITOR_OFFSET) "\0" \
"uboot_len=" MK_STR(CFG_MONITOR_LEN) "\0" \
"env_offset=" MK_STR(CFG_ENV_OFFSET) "\0" \
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2010-04-13 23:22:55
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via a3f16b73b73a1b10b1e3d506a119ed0d590c81e5 (commit)
via 5b45fff2f7dad2132c073b9b531f8eed4c1998c5 (commit)
via a6ec92e579bcda51b675edb3e8404dc0b6e52813 (commit)
from 1c39d3aadfc01811a23d135e691ba9e7a62b62a6 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit a3f16b73b73a1b10b1e3d506a119ed0d590c81e5
Merge: 5b45fff2f7dad2132c073b9b531f8eed4c1998c5 1c39d3aadfc01811a23d135e691ba9e7a62b62a6
Author: jorasse <jo...@ar...>
Date: Wed Apr 14 01:22:16 2010 +0200
Merge branch 'master' of ssh://jorasse@armadeus.git.sourceforge.net/gitroot/armadeus/armadeus
commit 5b45fff2f7dad2132c073b9b531f8eed4c1998c5
Author: jorasse <jo...@ar...>
Date: Wed Apr 14 01:20:43 2010 +0200
[BIULDROOT] support ubifs with buildroot 2010.02
commit a6ec92e579bcda51b675edb3e8404dc0b6e52813
Author: jorasse <jo...@ar...>
Date: Wed Apr 14 01:15:56 2010 +0200
[BUILDROOT] Fixed buildroot 2010.02 compilation failure on Ubuntu
-----------------------------------------------------------------------
Summary of changes:
.../mtd-utils-all-targets.patch | 0
buildroot/target/device/armadeus/u-boot/u-boot.mk | 3 +-
.../2010.02/{076-ubifs.to_fix => 076-ubifs.patch} | 25 +++---
.../2010.02/082-mtd-utils_with_ubi-utils.patch | 65 ++++++++++++++
.../2010.02/082-mtd-utils_with_ubi-utils.to_fix | 92 --------------------
5 files changed, 80 insertions(+), 105 deletions(-)
copy buildroot/package/mtd/{mtd-utils20090824.git => }/mtd-utils-all-targets.patch (100%)
rename patches/buildroot/2010.02/{076-ubifs.to_fix => 076-ubifs.patch} (72%)
create mode 100644 patches/buildroot/2010.02/082-mtd-utils_with_ubi-utils.patch
delete mode 100644 patches/buildroot/2010.02/082-mtd-utils_with_ubi-utils.to_fix
diff --git a/buildroot/package/mtd/mtd-utils20090824.git/mtd-utils-all-targets.patch b/buildroot/package/mtd/mtd-utils-all-targets.patch
similarity index 100%
copy from buildroot/package/mtd/mtd-utils20090824.git/mtd-utils-all-targets.patch
copy to buildroot/package/mtd/mtd-utils-all-targets.patch
diff --git a/buildroot/target/device/armadeus/u-boot/u-boot.mk b/buildroot/target/device/armadeus/u-boot/u-boot.mk
index 858c8b9..24f2022 100644
--- a/buildroot/target/device/armadeus/u-boot/u-boot.mk
+++ b/buildroot/target/device/armadeus/u-boot/u-boot.mk
@@ -30,9 +30,10 @@ u-boot-distclean: u-boot-clean
-C $(U_BOOT_DIR) distclean
rm -f $(U_BOOT_DIR)/.configured
+ifeq ($(BR2_VERSION),"0.10.0-svn")
$(MKIMAGE): $(BINARIES_DIR)/$(U_BOOT_BIN)
ln -fs $(MKIMAGE_BINLOC) $(MKIMAGE)
-
+endif
u-boot-patch: u-boot-distclean
-mkdir -p $(PROJECT_BUILD_DIR)/ref
rm -rf $(PROJECT_BUILD_DIR)/ref/u-boot-$(U_BOOT_VERSION)
diff --git a/patches/buildroot/2010.02/076-ubifs.to_fix b/patches/buildroot/2010.02/076-ubifs.patch
similarity index 72%
rename from patches/buildroot/2010.02/076-ubifs.to_fix
rename to patches/buildroot/2010.02/076-ubifs.patch
index e5171ca..ed840e2 100644
--- a/patches/buildroot/2010.02/076-ubifs.to_fix
+++ b/patches/buildroot/2010.02/076-ubifs.patch
@@ -1,8 +1,9 @@
--- buildrootref/target/ubifs/Config.in 2008-11-03 09:15:09.000000000 +0100
+++ buildroot/target/ubifs/Config.in 2009-10-03 17:07:32.000000000 +0200
-@@ -1,9 +1,15 @@
+@@ -1,10 +1,15 @@
config BR2_TARGET_ROOTFS_UBIFS
bool "ubifs root filesystem"
+- depends on BROKEN # upstream git gone, should use mtd-utils
select BR2_HOST_FAKEROOT
+ select BR2_PACKAGE_MTD
help
@@ -16,7 +17,7 @@
config BR2_TARGET_ROOTFS_UBIFS_LEBSIZE
hex "UBI logical erase block size"
depends on BR2_TARGET_ROOTFS_UBIFS
-@@ -16,6 +22,13 @@ config BR2_TARGET_ROOTFS_UBIFS_MINIOSIZE
+@@ -17,6 +23,13 @@ config BR2_TARGET_ROOTFS_UBIFS_MINIOSIZE
help
Some comment required here
@@ -32,7 +33,7 @@
depends on BR2_TARGET_ROOTFS_UBIFS
--- buildrootref/target/ubifs/ubifsroot.mk 2009-10-03 17:55:26.000000000 +0200
+++ buildroot/target/ubifs/ubifsroot.mk 2009-10-03 17:18:09.000000000 +0200
-@@ -76,7 +76,14 @@ else
+@@ -75,7 +75,14 @@ else
UBIFS_TARGET := $(UBIFS_BASE)
endif
@@ -45,19 +46,19 @@
+
+
+$(UBIFS_BASE): host-fakeroot makedevs
- -@find $(TARGET_DIR) -type f -perm +111 | xargs $(STRIPCMD) 2>/dev/null || true
- ifneq ($(BR2_HAVE_MANPAGES),y)
- @rm -rf $(TARGET_DIR)/usr/man
-@@ -102,11 +109,18 @@ ifneq ($(TARGET_DEVICE_TABLE),)
- >> $(PROJECT_BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
+ # Use fakeroot to pretend all target binaries are owned by root
+ rm -f $(BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
+ touch $(BUILD_DIR)/.fakeroot.00000
+@@ -80,11 +87,18 @@ ifneq ($(TARGET_DEVICE_TABLE),)
+ >> $(BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
endif
# Use fakeroot so mkfs.ubifs believes the previous fakery
- echo "$(MKFS_UBIFS_DIR)/mkfs.ubifs -d $(TARGET_DIR) " \
+ echo "$(MKFS_UBIFS) -d $(TARGET_DIR) " \
- "$(UBIFS_OPTS) -o $(UBIFS_BASE)" >> $(PROJECT_BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
- chmod a+x $(PROJECT_BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
- $(STAGING_DIR)/usr/bin/fakeroot -- $(PROJECT_BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
- -@rm -f $(PROJECT_BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
+ "$(UBIFS_OPTS) -o $(UBIFS_BASE)" >> $(BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
+ chmod a+x $(BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
+ $(HOST_DIR)/usr/bin/fakeroot -- $(BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
+ -@rm -f $(BUILD_DIR)/_fakeroot.$(notdir $(UBIFS_TARGET))
+ cp target/ubifs/ubinize.cfg .
+ echo "image=$(UBIFS_BASE)" \
+ >> ./ubinize.cfg
diff --git a/patches/buildroot/2010.02/082-mtd-utils_with_ubi-utils.patch b/patches/buildroot/2010.02/082-mtd-utils_with_ubi-utils.patch
new file mode 100644
index 0000000..6354e07
--- /dev/null
+++ b/patches/buildroot/2010.02/082-mtd-utils_with_ubi-utils.patch
@@ -0,0 +1,65 @@
+
+This patch update mtd-utils to build sme host UBI tools:
+* adds mkfs.ubifs tool
+* adds ubi-utils ubinize tool
+
+enable to build an UBI rootfs from scratch.
+
+Signed-off-by: jorasse <jo...@ar...>
+
+--- buildroot/package/mtd/mtd.mk.ori 2010-04-13 00:48:51.000000000 +0200
++++ buildroot/package/mtd/mtd.mk 2010-04-14 01:04:12.000000000 +0200
+@@ -18,6 +18,9 @@ MTD_CAT:=$(BZCAT)
+ #############################################################
+ MKFS_JFFS2 := $(HOST_DIR)/usr/sbin/mkfs.jffs2
+ SUMTOOL := $(HOST_DIR)/usr/sbin/sumtool
++MKFS_UBIFS:= $(HOST_DIR)/usr/sbin/mkfs.ubifs
++UBINIZE:= $(HOST_DIR)/usr/sbin/ubinize
++MTD_HOST_TARGETS:= $(MKFS_JFFS2) $(SUMTOOL) $(MKFS_UBIFS) $(UBINIZE)
+
+ $(DL_DIR)/$(MTD_SOURCE):
+ $(call DOWNLOAD,$(MTD_SITE),$(MTD_SOURCE))
+@@ -29,29 +32,35 @@ $(MTD_HOST_DIR)/.unpacked: $(DL_DIR)/$(M
+ package/mtd/ mtd-utils-\*.patch
+ touch $@
+
+-$(MTD_HOST_DIR)/mkfs.jffs2: $(MTD_HOST_DIR)/.unpacked
++$(MTD_HOST_DIR)/mkfs.jffs2 $(MTD_HOST_DIR)/sumtool $(MTD_HOST_DIR)/ubi-utils/ubinize : $(MTD_HOST_DIR)/.unpacked
+ CC="$(HOSTCC)" CFLAGS="$(HOST_CFLAGS)" LDFLAGS="$(HOST_LDFLAGS)" \
+ CROSS= $(MAKE) BUILDDIR=$(MTD_HOST_DIR) \
+- WITHOUT_XATTR=1 -C $(MTD_HOST_DIR) $@
++ WITHOUT_XATTR=1 -C $(MTD_HOST_DIR)
+
+ $(MKFS_JFFS2): $(MTD_HOST_DIR)/mkfs.jffs2
+ install -m 0755 -D $^ $@
+
+-$(MTD_HOST_DIR)/sumtool: $(MTD_HOST_DIR)/.unpacked
++$(SUMTOOL): $(MTD_HOST_DIR)/sumtool
++ install -m 0755 $^ $@
++
++$(UBINIZE): $(MTD_HOST_DIR)/ubi-utils/ubinize
++ install -m 0755 $^ $@
++
++$(MTD_HOST_DIR)/mkfs.ubifs/mkfs.ubifs: $(MTD_HOST_DIR)/mkfs.jffs2
+ CC="$(HOSTCC)" CFLAGS="$(HOST_CFLAGS)" LDFLAGS="$(HOST_LDFLAGS)" \
+- CROSS= $(MAKE) BUILDDIR=$(MTD_HOST_DIR) \
+- WITHOUT_XATTR=1 -C $(MTD_HOST_DIR) $@
++ CROSS= $(MAKE) BUILDDIR=$(MTD_HOST_DIR)/mkfs.ubifs \
++ WITHOUT_XATTR=1 -C $(MTD_HOST_DIR)/mkfs.ubifs
+
+-$(SUMTOOL): $(MTD_HOST_DIR)/sumtool
++$(MKFS_UBIFS): $(MTD_HOST_DIR)/mkfs.ubifs/mkfs.ubifs
+ install -m 0755 $^ $@
+
+-mtd-host: host-lzo $(MKFS_JFFS2) $(SUMTOOL)
++mtd-host: host-lzo $(MTD_HOST_TARGETS)
+
+ mtd-host-source: $(DL_DIR)/$(MTD_SOURCE)
+
+ mtd-host-clean:
+ -$(MAKE) -C $(MTD_HOST_DIR) clean
+- rm -f $(MKFS_JFFS2) $(SUMTOOL)
++ rm -f MTD_HOST_TARGETS
+
+ mtd-host-dirclean:
+ rm -rf $(MTD_HOST_DIR)
diff --git a/patches/buildroot/2010.02/082-mtd-utils_with_ubi-utils.to_fix b/patches/buildroot/2010.02/082-mtd-utils_with_ubi-utils.to_fix
deleted file mode 100644
index 31c060d..0000000
--- a/patches/buildroot/2010.02/082-mtd-utils_with_ubi-utils.to_fix
+++ /dev/null
@@ -1,92 +0,0 @@
-
-This patch update mtd-utils to the august 24, 2009 GIT revision:
-* adds mkfs.ubifs tool
-* adds ubi-utils tools
-
-enable to build an UBI rootfs from scratch.
-
-Signed-off-by: jorasse <jo...@ar...>
-
---- buildroot/package/mtd_ori/Config.in 2008-11-03 09:15:23.000000000 +0100
-+++ buildroot/package/mtd/Config.in 2009-09-13 23:18:56.000000000 +0200
-@@ -28,6 +28,11 @@ config BR2_PACKAGE_MTD_20050122
- help
- Use the stable release.
-
-+config BR2_PACKAGE_MTD_UTILS_20090824GIT
-+ bool "Use MTD-utils from GIT aug 24, 2009"
-+ help
-+ Use the 24 aug 2009 GIT revision.
-+
- config BR2_PACKAGE_MTD_UTILS_GIT
- bool "Use MTD-utils from GIT"
- help
-@@ -127,7 +132,7 @@ config BR2_PACKAGE_MTD_NANDDUMP
- config BR2_PACKAGE_MTD_NANDTEST
- bool "nandtest"
- default y
-- depends on BR2_PACKAGE_MTD_UTILS_GIT
-+ depends on BR2_PACKAGE_MTD_UTILS_GIT || BR2_PACKAGE_MTD_UTILS_20090824GIT
-
- config BR2_PACKAGE_MTD_NANDWRITE
- bool "nandwrite"
-@@ -152,17 +157,17 @@ config BR2_PACKAGE_MTD_SUMTOOL
- config BR2_PACKAGE_MTD_UBIATTACH
- bool "ubiattach"
- default y
-- depends on BR2_PACKAGE_MTD_UTILS_GIT
-+ depends on BR2_PACKAGE_MTD_UTILS_GIT || BR2_PACKAGE_MTD_UTILS_20090824GIT
-
- config BR2_PACKAGE_MTD_UBICRC32
- bool "ubicrc32"
- default y
-- depends on BR2_PACKAGE_MTD_UTILS_GIT
-+ depends on BR2_PACKAGE_MTD_UTILS_GIT || BR2_PACKAGE_MTD_UTILS_20090824GIT
-
- config BR2_PACKAGE_MTD_UBIDETACH
- bool "ubidetach"
- default y
-- depends on BR2_PACKAGE_MTD_UTILS_GIT
-+ depends on BR2_PACKAGE_MTD_UTILS_GIT || BR2_PACKAGE_MTD_UTILS_20090824GIT
-
- config BR2_PACKAGE_MTD_UBIMIRROR
- bool "ubimirror"
-@@ -172,22 +177,22 @@ config BR2_PACKAGE_MTD_UBIMIRROR
- config BR2_PACKAGE_MTD_UBIMKVOL
- bool "ubimkvol"
- default y
-- depends on BR2_PACKAGE_MTD_UTILS_GIT
-+ depends on BR2_PACKAGE_MTD_UTILS_GIT || BR2_PACKAGE_MTD_UTILS_20090824GIT
-
- config BR2_PACKAGE_MTD_UBINFO
- bool "ubinfo"
- default y
-- depends on BR2_PACKAGE_MTD_UTILS_GIT
-+ depends on BR2_PACKAGE_MTD_UTILS_GIT || BR2_PACKAGE_MTD_UTILS_20090824GIT
-
- config BR2_PACKAGE_MTD_UBIRMVOL
- bool "ubirmvol"
- default y
-- depends on BR2_PACKAGE_MTD_UTILS_GIT
-+ depends on BR2_PACKAGE_MTD_UTILS_GIT || BR2_PACKAGE_MTD_UTILS_20090824GIT
-
- config BR2_PACKAGE_MTD_UBIUPDATEVOL
- bool "ubiupdatevol"
- default y
-- depends on BR2_PACKAGE_MTD_UTILS_GIT
-+ depends on BR2_PACKAGE_MTD_UTILS_GIT || BR2_PACKAGE_MTD_UTILS_20090824GIT
-
- endif
-
---- buildroot/package/mtd_ori/mtd.mk 2008-11-03 09:15:23.000000000 +0100
-+++ buildroot/package/mtd/mtd.mk 2009-09-13 12:10:23.000000000 +0200
-@@ -7,6 +7,9 @@ endif
- ifeq ($(strip $(BR2_PACKAGE_MTD_20050122)),y)
- include package/mtd/20050122/mtd.mk
- endif
-+ifeq ($(strip $(BR2_PACKAGE_MTD_UTILS_20090824GIT)),y)
-+include package/mtd/mtd-utils20090824.git/mtd.mk
-+endif
- ifeq ($(strip $(BR2_PACKAGE_MTD_UTILS_GIT)),y)
- include package/mtd/mtd-utils.git/mtd.mk
- endif
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2010-04-13 15:36:32
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 1c39d3aadfc01811a23d135e691ba9e7a62b62a6 (commit)
via f1b67dca4cbdabdf2b9efdedad8e76b795899e47 (commit)
via 709f36d702108894db2d748efe0746c01dac604e (commit)
via a7277733d498062893a597c41c46df025e1dfb10 (commit)
via 631e9c9f3b735d5b188430bad15acc7491b465b7 (commit)
via 31b923f1167b6dae74a86986bea97346934af700 (commit)
via 5c0e49a0d712887b1d6303447ade59b29f94de18 (commit)
from 6dd9e4971715e380c05f8ab17937b60835b3a22e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 1c39d3aadfc01811a23d135e691ba9e7a62b62a6
Author: Fabien Marteau <fab...@ar...>
Date: Tue Apr 13 17:05:18 2010 +0200
Suppressing old faulty patch
commit f1b67dca4cbdabdf2b9efdedad8e76b795899e47
Merge: 709f36d702108894db2d748efe0746c01dac604e 6dd9e4971715e380c05f8ab17937b60835b3a22e
Author: Fabien Marteau <fab...@ar...>
Date: Tue Apr 13 16:44:20 2010 +0200
Merge branch 'master' of ssh://fabm@armadeus.git.sourceforge.net/gitroot/armadeus/armadeus
commit 709f36d702108894db2d748efe0746c01dac604e
Author: Fabien Marteau <fab...@ar...>
Date: Tue Apr 13 16:39:01 2010 +0200
[linux] shrink lan95xx patch
commit a7277733d498062893a597c41c46df025e1dfb10
Author: Fabien Marteau <fab...@ar...>
Date: Tue Apr 13 15:34:24 2010 +0200
[linux] smsc95xx: add additional USB product IDs
commit 631e9c9f3b735d5b188430bad15acc7491b465b7
Author: Fabien Marteau <fab...@ar...>
Date: Tue Apr 13 15:28:52 2010 +0200
Revert "[linux] Fix smsc95xx led output"
This reverts commit fa36febaac9894dd49fe3ff7fc6425a6b8378489.
commit 31b923f1167b6dae74a86986bea97346934af700
Author: Fabien Marteau <fab...@ar...>
Date: Tue Apr 13 15:28:25 2010 +0200
Revert "[linux] Adding lan9500A in smsc95xx driver"
This reverts commit bd04f667a89b3cce44d655f80a1c06ac4b5ed7ac.
commit 5c0e49a0d712887b1d6303447ade59b29f94de18
Author: Fabien Marteau <fab...@ar...>
Date: Tue Apr 13 14:53:00 2010 +0200
[linux] Adding ioctl for gpio pullup resistor
-----------------------------------------------------------------------
Summary of changes:
.../346-smsc-lan95xx-activates_led_outputs.patch | 57 ++++++++++++++
...activates_led_outputs_and_adding_lan9500A.patch | 73 ------------------
...-lan95xx-add_additionnal_USB_products_IDs.patch | 81 ++++++++++++++++++++
...c-armadeus-lan95xx-activate_blinking_leds.patch | 38 +++++++++
target/linux/modules/gpio/core.c | 29 +++++++-
target/linux/modules/gpio/core.h | 4 +
6 files changed, 207 insertions(+), 75 deletions(-)
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch
delete mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs_and_adding_lan9500A.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347b-smsc-lan95xx-add_additionnal_USB_products_IDs.patch
create mode 100644 buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347c-armadeus-lan95xx-activate_blinking_leds.patch
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch
new file mode 100644
index 0000000..f7aa8c0
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch
@@ -0,0 +1,57 @@
+From f293501c61c50b014ad2347661c6acd951c80fed Mon Sep 17 00:00:00 2001
+From: Steve Glendinning <ste...@sm...>
+Date: Fri, 1 May 2009 05:46:51 +0000
+Subject: [PATCH] smsc95xx: configure LED outputs
+
+SMSC LAN9500 has dual purpose GPIO/LED pins, and by default at power-on
+these are configured as GPIOs. This means that if LEDs are fitted they
+won't ever light.
+
+This patch sets them to be LED outputs for speed, duplex and
+link/activity.
+
+Signed-off-by: Steve Glendinning <ste...@sm...>
+Signed-off-by: David S. Miller <da...@da...>
+---
+ drivers/net/usb/smsc95xx.c | 10 ++++++++++
+ drivers/net/usb/smsc95xx.h | 3 +++
+ 2 files changed, 13 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c
+index dc16653..0fd68a5 100644
+--- a/drivers/net/usb/smsc95xx.c
++++ b/drivers/net/usb/smsc95xx.c
+@@ -941,6 +941,16 @@ static int smsc95xx_reset(struct usbnet *dev)
+ if (netif_msg_ifup(dev))
+ devdbg(dev, "ID_REV = 0x%08x", read_buf);
+
++ /* Configure GPIO pins as LED outputs */
++ write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
++ LED_GPIO_CFG_FDX_LED;
++ ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
++ if (ret < 0) {
++ devwarn(dev, "Failed to write LED_GPIO_CFG register, ret=%d",
++ ret);
++ return ret;
++ }
++
+ /* Init Tx */
+ write_buf = 0;
+ ret = smsc95xx_write_reg(dev, FLOW, write_buf);
+diff --git a/drivers/net/usb/smsc95xx.h b/drivers/net/usb/smsc95xx.h
+index 66b5c84..86bc449 100644
+--- a/drivers/net/usb/smsc95xx.h
++++ b/drivers/net/usb/smsc95xx.h
+@@ -99,6 +99,9 @@
+ #define PM_CTL_WUPS_MULTI_ (0x00000003)
+
+ #define LED_GPIO_CFG (0x24)
++#define LED_GPIO_CFG_SPD_LED (0x01000000)
++#define LED_GPIO_CFG_LNK_LED (0x00100000)
++#define LED_GPIO_CFG_FDX_LED (0x00010000)
+
+ #define GPIO_CFG (0x28)
+
+--
+1.6.6
+
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs_and_adding_lan9500A.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs_and_adding_lan9500A.patch
deleted file mode 100644
index d8041b6..0000000
--- a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs_and_adding_lan9500A.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From f293501c61c50b014ad2347661c6acd951c80fed Mon Sep 17 00:00:00 2001
-From: Steve Glendinning <ste...@sm...>
-Date: Fri, 1 May 2009 05:46:51 +0000
-Subject: [PATCH] smsc95xx: configure LED outputs
-
-SMSC LAN9500 has dual purpose GPIO/LED pins, and by default at power-on
-these are configured as GPIOs. This means that if LEDs are fitted they
-won't ever light.
-
-This patch sets them to be LED outputs for speed, duplex and
-link/activity.
-
-Signed-off-by: Steve Glendinning <ste...@sm...>
-Signed-off-by: David S. Miller <da...@da...>
----
- drivers/net/usb/smsc95xx.c | 10 ++++++++++
- drivers/net/usb/smsc95xx.h | 3 +++
- 2 files changed, 13 insertions(+), 0 deletions(-)
-
-Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.c
-===================================================================
---- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.c 2009-03-24 00:12:14.000000000 +0100
-+++ linux-2.6.29.6/drivers/net/usb/smsc95xx.c 2010-04-12 14:42:46.000000000 +0200
-@@ -945,6 +945,18 @@
- if (netif_msg_ifup(dev))
- devdbg(dev, "ID_REV = 0x%08x", read_buf);
-
-+ /* Configure GPIO pins as LED outputs */
-+ write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_SPD_POL |
-+ LED_GPIO_CFG_LNK_LED | LED_GPIO_CFG_LNK_POL |
-+ LED_GPIO_CFG_FDX_LED | LED_GPIO_CFG_FDX_POL |
-+ LED_GPIO_CFG_LED_SEL;
-+ ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
-+ if (ret < 0) {
-+ devwarn(dev, "Failed to write LED_GPIO_CFG register, ret=%d",
-+ ret);
-+ return ret;
-+ }
-+
- /* Init Tx */
- write_buf = 0;
- ret = smsc95xx_write_reg(dev, FLOW, write_buf);
-@@ -1224,6 +1236,11 @@
- USB_DEVICE(0x0424, 0x9500),
- .driver_info = (unsigned long) &smsc95xx_info,
- },
-+ {
-+ /* SMSC9500A USB Ethernet Device */
-+ USB_DEVICE(0x0424, 0x9E00),
-+ .driver_info = (unsigned long) &smsc95xx_info,
-+ },
- { }, /* END */
- };
- MODULE_DEVICE_TABLE(usb, products);
-Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.h
-===================================================================
---- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.h 2009-03-24 00:12:14.000000000 +0100
-+++ linux-2.6.29.6/drivers/net/usb/smsc95xx.h 2010-04-09 18:55:34.000000000 +0200
-@@ -99,6 +99,14 @@
- #define PM_CTL_WUPS_MULTI_ (0x00000003)
-
- #define LED_GPIO_CFG (0x24)
-+#define LED_GPIO_CFG_LED_SEL (0x80000000)
-+#define LED_GPIO_CFG_SPD_LED (0x01000000)
-+#define LED_GPIO_CFG_LNK_LED (0x00100000)
-+#define LED_GPIO_CFG_FDX_LED (0x00010000)
-+
-+#define LED_GPIO_CFG_SPD_POL (0x00000004)
-+#define LED_GPIO_CFG_LNK_POL (0x00000002)
-+#define LED_GPIO_CFG_FDX_POL (0x00000001)
-
- #define GPIO_CFG (0x28)
-
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347b-smsc-lan95xx-add_additionnal_USB_products_IDs.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347b-smsc-lan95xx-add_additionnal_USB_products_IDs.patch
new file mode 100644
index 0000000..4027ee8
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347b-smsc-lan95xx-add_additionnal_USB_products_IDs.patch
@@ -0,0 +1,81 @@
+Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.c
+===================================================================
+--- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.c 2010-04-13 16:23:57.000000000 +0200
++++ linux-2.6.29.6/drivers/net/usb/smsc95xx.c 2010-04-13 16:25:48.000000000 +0200
+@@ -1229,6 +1229,76 @@
+ USB_DEVICE(0x0424, 0x9500),
+ .driver_info = (unsigned long) &smsc95xx_info,
+ },
++ {
++ /* SMSC9505 USB Ethernet Device */
++ USB_DEVICE(0x0424, 0x9505),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9500A USB Ethernet Device */
++ USB_DEVICE(0x0424, 0x9E00),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9505A USB Ethernet Device */
++ USB_DEVICE(0x0424, 0x9E01),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9512/9514 USB Hub & Ethernet Device */
++ USB_DEVICE(0x0424, 0xec00),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9500 USB Ethernet Device (SAL10) */
++ USB_DEVICE(0x0424, 0x9900),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9505 USB Ethernet Device (SAL10) */
++ USB_DEVICE(0x0424, 0x9901),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9500A USB Ethernet Device (SAL10) */
++ USB_DEVICE(0x0424, 0x9902),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9505A USB Ethernet Device (SAL10) */
++ USB_DEVICE(0x0424, 0x9903),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
++ USB_DEVICE(0x0424, 0x9904),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9500A USB Ethernet Device (HAL) */
++ USB_DEVICE(0x0424, 0x9905),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9505A USB Ethernet Device (HAL) */
++ USB_DEVICE(0x0424, 0x9906),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9500 USB Ethernet Device (Alternate ID) */
++ USB_DEVICE(0x0424, 0x9907),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9500A USB Ethernet Device (Alternate ID) */
++ USB_DEVICE(0x0424, 0x9908),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
++ {
++ /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
++ USB_DEVICE(0x0424, 0x9909),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
+ { }, /* END */
+ };
+ MODULE_DEVICE_TABLE(usb, products);
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347c-armadeus-lan95xx-activate_blinking_leds.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347c-armadeus-lan95xx-activate_blinking_leds.patch
new file mode 100644
index 0000000..d360c21
--- /dev/null
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/347c-armadeus-lan95xx-activate_blinking_leds.patch
@@ -0,0 +1,38 @@
+Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.c
+===================================================================
+--- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.c 2010-04-13 16:27:42.000000000 +0200
++++ linux-2.6.29.6/drivers/net/usb/smsc95xx.c 2010-04-13 16:33:39.000000000 +0200
+@@ -941,8 +941,11 @@
+ devdbg(dev, "ID_REV = 0x%08x", read_buf);
+
+ /* Configure GPIO pins as LED outputs */
+- write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
+- LED_GPIO_CFG_FDX_LED;
++ write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_SPD_POL |
++ LED_GPIO_CFG_LNK_LED | LED_GPIO_CFG_LNK_POL |
++ LED_GPIO_CFG_FDX_LED | LED_GPIO_CFG_FDX_POL |
++ LED_GPIO_CFG_LED_SEL;
++
+ ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
+ if (ret < 0) {
+ devwarn(dev, "Failed to write LED_GPIO_CFG register, ret=%d",
+Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.h
+===================================================================
+--- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.h 2010-04-13 16:27:40.000000000 +0200
++++ linux-2.6.29.6/drivers/net/usb/smsc95xx.h 2010-04-13 16:36:41.000000000 +0200
+@@ -99,10 +99,15 @@
+ #define PM_CTL_WUPS_MULTI_ (0x00000003)
+
+ #define LED_GPIO_CFG (0x24)
++#define LED_GPIO_CFG_LED_SEL (0x80000000)
+ #define LED_GPIO_CFG_SPD_LED (0x01000000)
+ #define LED_GPIO_CFG_LNK_LED (0x00100000)
+ #define LED_GPIO_CFG_FDX_LED (0x00010000)
+
++#define LED_GPIO_CFG_SPD_POL (0x00000004)
++#define LED_GPIO_CFG_LNK_POL (0x00000002)
++#define LED_GPIO_CFG_FDX_POL (0x00000001)
++
+ #define GPIO_CFG (0x28)
+
+ #define AFC_CFG (0x2C)
diff --git a/target/linux/modules/gpio/core.c b/target/linux/modules/gpio/core.c
index a54348e..c4ab1f9 100755
--- a/target/linux/modules/gpio/core.c
+++ b/target/linux/modules/gpio/core.c
@@ -390,7 +390,12 @@ static unsigned int getPortMode(unsigned int aPort)
return value;
}
-static void setPortPull(unsigned int aPort, unsigned int aPullMask)
+static unsigned int getPortPullUp(unsigned int aPort)
+{
+ return __raw_readl(VA_GPIO_BASE + MXC_PUEN(aPort));
+}
+
+static void setPortPullUp(unsigned int aPort, unsigned int aPullMask)
{
__raw_writel(aPullMask & 0xffffffff, VA_GPIO_BASE + MXC_PUEN(aPort));
}
@@ -727,6 +732,26 @@ int armadeus_gpio_dev_ioctl(struct inode *inode, struct file *filp,
}
break;
+ case GPIORDIRQMODE:
+ /* TODO */
+ break;
+
+ case GPIOWRIRQMODE:
+ /* TODO */
+ break;
+
+ case GPIORDPULLUP:
+ value = getPortPullUp(MAX_MINOR - minor);
+ ret = __put_user(value, (unsigned int *)arg);
+ break;
+
+ case GPIOWRPULLUP:
+ ret = __get_user(value, (unsigned int *)arg);
+ if (ret == 0) {
+ setPortPullUp(MAX_MINOR - minor, value);
+ }
+ break;
+
default:
printk("IOCTL not supported\n");
ret = -ENOTTY;
@@ -875,7 +900,7 @@ static int armadeus_gpio_proc_write( __attribute__ ((unused)) struct file *file,
break;
case PULL_UP:
- setPortPull(port_ID, gpio_state);
+ setPortPullUp(port_ID, gpio_state);
break;
case INTERRUPT:
diff --git a/target/linux/modules/gpio/core.h b/target/linux/modules/gpio/core.h
index 2a243aa..8a9bc58 100755
--- a/target/linux/modules/gpio/core.h
+++ b/target/linux/modules/gpio/core.h
@@ -34,6 +34,10 @@
#define GPIOWRDATA _IOW(PP_IOCTL, 0xF3, int)
#define GPIORDMODE _IOR(PP_IOCTL, 0xF4, int)
#define GPIOWRMODE _IOW(PP_IOCTL, 0xF5, int)
+#define GPIORDIRQMODE _IOR(PP_IOCTL, 0xF6, u64)
+#define GPIOWRIRQMODE _IOW(PP_IOCTL, 0xF7, u64)
+#define GPIORDPULLUP _IOR(PP_IOCTL, 0xF8, int)
+#define GPIOWRPULLUP _IOR(PP_IOCTL, 0xF9, int)
/* Pretend we're PPDEV for IOCTL */
#include <linux/ppdev.h>
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2010-04-12 21:45:27
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 6dd9e4971715e380c05f8ab17937b60835b3a22e (commit)
from a973425916cfa0f662e9bf5b2d9a4e38fc9e91d2 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 6dd9e4971715e380c05f8ab17937b60835b3a22e
Author: jorasse <jo...@ar...>
Date: Mon Apr 12 23:44:32 2010 +0200
[UBoot] move to the U-Boot release 2010.03
-----------------------------------------------------------------------
Summary of changes:
.../051i-u-boot-multi-version-support.patch | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/patches/buildroot/2010.02/051i-u-boot-multi-version-support.patch b/patches/buildroot/2010.02/051i-u-boot-multi-version-support.patch
index 6973c6d..82efd9b 100644
--- a/patches/buildroot/2010.02/051i-u-boot-multi-version-support.patch
+++ b/patches/buildroot/2010.02/051i-u-boot-multi-version-support.patch
@@ -23,7 +23,7 @@
config BR2_UBOOT_VERSION
string
default "1.3.4" if BR2_TARGET_UBOOT_1_3_4
-+ default "2010.03-rc2" if BR2_TARGET_UBOOT_2010_03
++ default "2010.03" if BR2_TARGET_UBOOT_2010_03
default "2009.11" if BR2_TARGET_UBOOT_2009_11
default "2009.08" if BR2_TARGET_UBOOT_2009_08
default "2009.06" if BR2_TARGET_UBOOT_2009_06
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2010-04-12 20:37:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via a973425916cfa0f662e9bf5b2d9a4e38fc9e91d2 (commit)
via 1cc0a30dec4e444ae3ef34adb6134731059a7298 (commit)
from bd04f667a89b3cce44d655f80a1c06ac4b5ed7ac (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit a973425916cfa0f662e9bf5b2d9a4e38fc9e91d2
Merge: 1cc0a30dec4e444ae3ef34adb6134731059a7298 bd04f667a89b3cce44d655f80a1c06ac4b5ed7ac
Author: jorasse <jo...@ar...>
Date: Mon Apr 12 22:36:57 2010 +0200
Merge branch 'master' of ssh://jorasse@armadeus.git.sourceforge.net/gitroot/armadeus/armadeus
commit 1cc0a30dec4e444ae3ef34adb6134731059a7298
Author: jorasse <jo...@ar...>
Date: Mon Apr 12 22:36:02 2010 +0200
[UBoot] APF27 migration to U-Boot 2010.03
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf27/apf27-u-boot-2010.03.h | 972 +++++++++++++++++
...boot-2010.03-rc2.h => apf9328-u-boot-2010.03.h} | 0
...-100-imx.patch => u-boot-2010.03-100-imx.patch} | 0
...9328.patch => u-boot-2010.03-110-apf9328.patch} | 0
...tch => u-boot-2010.03-111-apf9328-DM9000.patch} | 0
...h => u-boot-2010.03-112-apf9328-makefile.patch} | 0
...atch => u-boot-2010.03-120-apf9328-tools.patch} | 0
...s1374.patch => u-boot-2010.03-140-ds1374.patch} | 0
...pf9328-fixes_gcc_4_4_EABI_linking_issues.patch} | 0
.../target/u-boot/u-boot-2010.03-300-imx27.patch | 1123 ++++++++++++++++++++
.../target/u-boot/u-boot-2010.03-301-nand.patch | 199 ++++
...-apf27.patch => u-boot-2010.03-310-apf27.patch} | 541 +++++-----
.../u-boot-2010.03-311-imx-nand-lock-unlock.patch | 82 ++
...-boot-2010.03-312-imx-nand-write-any-size.patch | 23 +
...rtan.patch => u-boot-2010.03-320-spartan.patch} | 21 +-
.../u-boot/u-boot-2010.03-330-fix-nand-debug.patch | 11 +
.../u-boot-2010.03-340-fix-fecmxc-debug.patch | 11 +
.../u-boot-2010.03-350-fix-jffs2-warns.patch | 13 +
18 files changed, 2708 insertions(+), 288 deletions(-)
create mode 100755 buildroot/target/device/armadeus/apf27/apf27-u-boot-2010.03.h
rename buildroot/target/device/armadeus/apf9328/{apf9328-u-boot-2010.03-rc2.h => apf9328-u-boot-2010.03.h} (100%)
rename buildroot/target/u-boot/{u-boot-2010.03-rc2-100-imx.patch => u-boot-2010.03-100-imx.patch} (100%)
rename buildroot/target/u-boot/{u-boot-2010.03-rc2-110-apf9328.patch => u-boot-2010.03-110-apf9328.patch} (100%)
rename buildroot/target/u-boot/{u-boot-2010.03-rc2-111-apf9328-DM9000.patch => u-boot-2010.03-111-apf9328-DM9000.patch} (100%)
rename buildroot/target/u-boot/{u-boot-2010.03-rc2-112-apf9328-makefile.patch => u-boot-2010.03-112-apf9328-makefile.patch} (100%)
rename buildroot/target/u-boot/{u-boot-2010.03-rc2-120-apf9328-tools.patch => u-boot-2010.03-120-apf9328-tools.patch} (100%)
rename buildroot/target/u-boot/{u-boot-2010.03-rc2-140-ds1374.patch => u-boot-2010.03-140-ds1374.patch} (100%)
rename buildroot/target/u-boot/{u-boot-2010.03-rc2-150-apf9328-fixes_gcc_4_4_EABI_linking_issues.patch => u-boot-2010.03-150-apf9328-fixes_gcc_4_4_EABI_linking_issues.patch} (100%)
create mode 100755 buildroot/target/u-boot/u-boot-2010.03-300-imx27.patch
create mode 100755 buildroot/target/u-boot/u-boot-2010.03-301-nand.patch
copy buildroot/target/u-boot/{u-boot-1.3.4-310-apf27.patch => u-boot-2010.03-310-apf27.patch} (73%)
mode change 100644 => 100755
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-311-imx-nand-lock-unlock.patch
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-312-imx-nand-write-any-size.patch
copy buildroot/target/u-boot/{u-boot-1.3.4-320-spartan.patch => u-boot-2010.03-320-spartan.patch} (51%)
mode change 100644 => 100755
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-330-fix-nand-debug.patch
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-340-fix-fecmxc-debug.patch
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-350-fix-jffs2-warns.patch
diff --git a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2010.03.h b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2010.03.h
new file mode 100755
index 0000000..50a3176
--- /dev/null
+++ b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2010.03.h
@@ -0,0 +1,972 @@
+/*
+ *
+ * Configuration settings for the Armadeus Project apf27 board.
+ *
+ * Copyright (c) 2008-2010 Eric Jarrige <eri...@ar...>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * 2008/08/19 Initial version based on apf9328 configuration file
+ * 2008/10/09 Release 1.0 support u-boot 1.3.4
+ * 2008/10/25 Release 1.1 added environment version
+ * 2008/11/01 Release 1.2 flash size independant
+ * 2008/11/09 Release 1.3 keep uboot partition locked & source clean-up
+ * 2010/03/31 U-Boot 2010.03 migration. TODO merge mxc_i2c..
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_ENV_VERSION "1.7"
+#define CONFIG_IDENT_STRING " apf27 patch 2.5"
+
+#define CONFIG_ARM926EJS 1 /* this is an ARM926EJS CPU */
+#define CONFIG_MX27 1 /* in a Freescale i.MX27 Chip */
+#define CONFIG_APF27 1 /* on a Armadeus project APF27 board */
+#undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */
+
+/*
+ * Enable the call to misc_init_r() for miscellaneous platform
+ * dependent initialization.
+ */
+
+#define CONFIG_MISC_INIT_R
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+
+/*
+ * Select serial console configuration
+ */
+#define CONFIG_MXC_UART
+#define CONFIG_SYS_MX27_UART1
+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+#define CONFIG_BAUDRATE 115200
+
+/*
+ * Definition of u-boot build in commands. Check out CONFIG_CMD_DFL if
+ * neccessary in include/cmd_confdefs.h file. (Un)comment for getting
+ * functionality or size of u-boot code.
+ */
+
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV /* ask for env variable */
+#define CONFIG_CMD_BSP /* Board Specific functions */
+#define CONFIG_CMD_CACHE /* icache, dcache */
+#define CONFIG_CMD_CDP /* Cisco Discovery Protocol */
+#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
+#define CONFIG_CMD_DHCP /* DHCP Support */
+#define CONFIG_CMD_DIAG /* Diagnostics */
+#define CONFIG_CMD_EEPROM /* EEPROM read/write support */
+#define CONFIG_CMD_ELF /* bootelf, bootvx */
+#define CONFIG_CMD_FAT /* FAT support */
+#define CONFIG_CMD_EXT2 /* EXT2 Support */
+#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
+#define CONFIG_CMD_I2C /* I2C serial bus support */
+#undef CONFIG_CMD_IMLS /* List all found images */
+#define CONFIG_CMD_IMMAP /* IMMR dump support */
+#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
+#define CONFIG_CMD_MII /* MII support */
+#define CONFIG_CMD_MTDPARTS /* MTD partition support */
+#define CONFIG_CMD_MMC /* MMC memory mapped support */
+#define CONFIG_CMD_NAND /* NAND support */
+#define CONFIG_CMD_NAND_LOCK_UNLOCK
+#define CONFIG_CMD_PING /* ping support */
+#define CONFIG_CMD_SAVES /* save S record dump */
+#define CONFIG_CMD_SETEXPR /* setexpr support */
+#define CONFIG_CMD_SNTP /* SNTP support */
+#define CONFIG_CMD_NFS /* NFS support */
+#define CONFIG_CMD_DNS
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_CMD_IMX_FUSE /* iMX fuse access commands */
+
+#undef CONFIG_DISPLAY_BOARDINFO
+#undef CONFIG_DISPLAY_CPUINFO
+
+/*
+ * Select some advanced features of the commande line parser
+ */
+#define CONFIG_AUTO_COMPLETE 1 /* Enable auto completion of */
+ /* commands using TAB */
+#define CONFIG_SYS_HUSH_PARSER 1 /* enable the "hush" shell */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* secondary prompt string */
+#define CONFIG_CMDLINE_EDITING 1
+
+/*
+ * Boot options. Setting delay to -1 stops autostart count down.
+ */
+#define CONFIG_BOOTDELAY 20
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#define CONFIG_BOOTARGS \
+ CONFIG_CONSOLE " root=/dev/mtdblock4 rootfstype=jffs2 " MTDPARTS_DEFAULT
+
+#define CONFIG_CONSOLE "console=ttySMX0,"MK_STR(CONFIG_BAUDRATE)
+#define CONFIG_MTDMAP "mxc_nand.0"
+#define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
+#define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP ":640k(U-boot)ro," \
+ "384k(U-boot_env),512k(firmware)," \
+ "5M(kernel)," \
+ "-(rootfs)"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "env_version=" CONFIG_ENV_VERSION "\0" \
+ "fileaddr=" MK_STR(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "filesize=" MK_STR(CONFIG_SYS_MONITOR_LEN) "\0" \
+ "console=" CONFIG_CONSOLE "\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
+ "partition=nand0,4\0" \
+ "uboot_offset=" MK_STR(CONFIG_SYS_MONITOR_OFFSET) "\0" \
+ "uboot_len=" MK_STR(CONFIG_SYS_MONITOR_LEN) "\0" \
+ "env_offset=" MK_STR(CONFIG_ENV_OFFSET) "\0" \
+ "env_len=" MK_STR(CONFIG_ENV_SIZE) "\0" \
+ "firmware_offset=" MK_STR(CONFIG_FIRMWARE_OFFSET) "\0" \
+ "firmware_len=" MK_STR(CONFIG_FIRMWARE_LEN) "\0" \
+ "kernel_offset=" MK_STR(CONFIG_KERNEL_OFFSET) "\0" \
+ "kernel_len=" MK_STR(CONFIG_KERNEL_LEN) "\0" \
+ "rootfs_offset=" MK_STR(CONFIG_ROOTFS_OFFSET) "\0" \
+ "rootfs_len=" MK_STR(CONFIG_ROOTFS_LEN) "\0" \
+ "board_name=" MK_STR(CONFIG_BOARD_NAME) "\0" \
+ "serverpath=" MK_STR(CONFIG_SRV_PATH) "\0" \
+ "ntpserverip=217.147.208.1\0" \
+ "mmcroot=/dev/mmcblk0p1\0" \
+ "mmcrootfstype=ext2\0" \
+ "quiet=1\0" \
+ "addnfsargs=setenv bootargs ${bootargs} " \
+ "root=/dev/nfs rw nfsroot=${serverip}:${rootpath}\0" \
+ "addjffsargs=setenv bootargs ${bootargs} " \
+ "root=/dev/mtdblock4 rootfstype=jffs2\0" \
+ "addubifsargs=setenv bootargs ${bootargs} " \
+ "ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
+ "addmmcargs=setenv bootargs ${bootargs} " \
+ "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \
+ "addipargs=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off \0"\
+ "nfsboot=setenv bootargs ${console} ${mtdparts};" \
+ "run addnfsargs addipargs; setenv autostart yes;" \
+ "nboot.jffs2 A0000000 0 ${kernel_offset}\0" \
+ "jffsboot=setenv bootargs ${console} ${mtdparts};" \
+ "run addjffsargs addipargs; setenv autostart yes;" \
+ "nboot.jffs2 A0000000 0 ${kernel_offset}\0" \
+ "ubifsboot=setenv bootargs ${console} ${mtdparts};" \
+ "run addubifsargs addipargs; setenv autostart yes;" \
+ "nboot.jffs2 A0000000 0 ${kernel_offset}\0" \
+ "mmcboot=setenv bootargs ${console} ${mtdparts};" \
+ "run addmmcargs addipargs; setenv autostart yes;" \
+ "nboot.jffs2 A0000000 0 ${kernel_offset}\0" \
+ "firmware_autoload=0\0" \
+ "flash_uboot=nand unlock ${uboot_offset} ${uboot_len};" \
+ "nand erase ${uboot_offset} ${uboot_len};" \
+ "if nand write.jffs2 ${fileaddr} ${uboot_offset} ${filesize};" \
+ "then nand lock; nand unlock ${env_offset};" \
+ "echo Flashing of uboot succeed;" \
+ "else echo Flashing of uboot failed;" \
+ "fi; \0" \
+ "flash_firmware=nand erase ${firmware_offset} ${firmware_len};"\
+ "if nand write.jffs2 ${fileaddr} ${firmware_offset} ${filesize} ;"\
+ "then echo Flashing of Firmware succeed;" \
+ "else echo Flashing of Firmware failed;" \
+ "fi\0" \
+ "fpga_config=tftpboot ${fileaddr} $firmware_name;"\
+ "run flash_firmware;"\
+ "fpga load 0 ${fileaddr} ${firmware_len};\0"\
+ "flash_kernel=nand erase ${kernel_offset} ${kernel_len};" \
+ "if nand write.jffs2 ${fileaddr} ${kernel_offset} ${filesize} ;"\
+ "then echo Flashing of kernel succeed;" \
+ "else echo Flashing of kernel failed;" \
+ "fi\0" \
+ "flash_rootfs=nand erase clean ${rootfs_offset} ${rootfs_len};" \
+ "if nand write.jffs2 ${fileaddr} ${rootfs_offset} ${filesize};"\
+ "then echo Flashing of rootfs succeed;" \
+ "else echo Flashing of rootfs failed;" \
+ "fi\0" \
+ "flash_reset_env=nand unlock ${env_offset} ${env_len};" \
+ "nand erase ${env_offset} ${env_len};" \
+ "echo Flash environment variables erased!\0" \
+ "download_uboot=tftpboot ${loadaddr} " \
+ " ${serverpath}${board_name}-u-boot.bin\0" \
+ "download_kernel=tftpboot ${loadaddr} " \
+ " ${serverpath}${board_name}-linux.bin\0" \
+ "download_rootfs=tftpboot ${loadaddr} " \
+ " ${serverpath}${board_name}-rootfs.arm.jffs2\0" \
+ "update_uboot=run download_uboot flash_uboot\0" \
+ "update_kernel=run download_kernel flash_kernel\0" \
+ "update_rootfs=run download_rootfs flash_rootfs\0" \
+ "update_all=run download_kernel flash_kernel download_rootfs " \
+ "flash_rootfs download_uboot flash_uboot\0" \
+ "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
+
+#define CONFIG_BOOTCOMMAND "run jffsboot"
+#define CONFIG_SYS_AUTOLOAD "no"
+
+#define CONFIG_MACH_TYPE MACH_TYPE_APF27
+#define CONFIG_BOOT_PARAMS_ADDR 0xa0000100
+
+#undef CONFIG_SHOW_BOOT_PROGRESS
+
+#define CONFIG_ETHADDR
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.0.10
+#define CONFIG_BOARD_NAME "apf27"
+#define CONFIG_HOSTNAME "apf27"
+#define CONFIG_GATEWAYIP 192.168.0.1
+#define CONFIG_SERVERIP 192.168.0.2
+#define CONFIG_SRV_PATH ""
+#define CONFIG_ROOTPATH "/tftpboot/apf27-root"
+
+/*
+ * General options for u-boot. Modify to save memory foot print
+ */
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT "BIOS> " /* prompt string */
+#define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* print buffer size */
+#define CONFIG_SYS_MAXARGS 16 /* max command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot args buf size */
+
+#define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
+#define CONFIG_SYS_MEMTEST_END 0xA0300000 /*64MiB -1MiB*/
+
+#define CONFIG_SYS_HZ 1000 /* incrementer freq: 1 MHz */
+
+/*
+ * Definitions related to passing arguments to kernel.
+ */
+
+#define CONFIG_CMDLINE_TAG 1 /* send commandline to Kernel */
+#define CONFIG_SETUP_MEMORY_TAGS 1 /* send memory definition to kernel */
+#define CONFIG_INITRD_TAG 1 /* send initrd params */
+#undef CONFIG_VFD /* do not send framebuffer setup */
+
+/*
+ * Malloc pool need to host env + 128 Kb reserve for other allocations.
+ */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10) )
+
+#define CONFIG_SYS_GBL_DATA_SIZE 256 /* size in bytes reserved for initial data */
+
+#define CONFIG_STACKSIZE (256<<10) /* stack size */
+
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4<<10) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4<<10) /* FIQ stack */
+#endif
+
+/*
+* Clocks configuration
+*/
+/*
+ * PLL configuration
+ *
+ * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
+ * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
+ */
+
+#define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
+#undef CONFIG_MX27_CLK26 /* there is no external 26MHz external clock */
+
+/* MPU CLOCK source before PLL */
+/* CONFIG_SYS_CLK_FREQ (2/3 MPLL clock or ext 266 MHZ) */
+#ifndef CONFIG_MX27_CLK26
+#if (CONFIG_MX27_CLK32 == 32000)
+#define CONFIG_SYS_MPCTL0_VAL 0x00211803 /* 398.998 MHz */
+#define CONFIG_SYS_MPCTL1_VAL 0
+#define CONFIG_MPLL_FREQ 399
+#else /* CONFIG_MX27_CLK32 == 32768*/
+#define CONFIG_SYS_MPCTL0_VAL 0x01EF15D5 /* 399.000 MHz */
+#define CONFIG_SYS_MPCTL1_VAL 0
+#define CONFIG_MPLL_FREQ 399
+#endif /* CONFIG_MX27_CLK32 */
+#else /* CONFIG_MX27_CLK26 in use*/
+#define CONFIG_SYS_MPCTL0_VAL 0x00331C23 /* 399.000 MHz */
+#define CONFIG_SYS_MPCTL1_VAL 0
+#define CONFIG_MPLL_FREQ 399
+#endif /* CONFIG_MX27_CLK26 */
+
+#define CONFIG_SYS_CLK_FREQ (CONFIG_MPLL_FREQ*2/3) /* 266 MHz */
+
+/* Serial clock source before PLL (should be named CONFIG_SYS_SYSPLL_CLK_FREQ) */
+#ifndef CONFIG_MX27_CLK26
+/*#define CONFIG_SYSPLL_CLK_FREQ (1024*CONFIG_MX27_CLK32)*/
+#if (CONFIG_MX27_CLK32 == 32000)
+#define CONFIG_SYS_SPCTL0_VAL 0x04A02419 /* 300.00020 MHz */
+#define CONFIG_SYS_SPCTL1_VAL 0
+#define CONFIG_SPLL_FREQ 300 /* MHz */
+#else /* CONFIG_MX27_CLK32 == 32768*/
+#define CONFIG_SYS_SPCTL0_VAL 0x0475206F /* 299.99937 MHz */
+#define CONFIG_SYS_SPCTL1_VAL 0
+#define CONFIG_SPLL_FREQ 300 /* MHz */
+#endif /* CONFIG_MX27_CLK32 */
+#else /* CONFIG_MX27_CLK26 in use*/
+/*#define CONFIG_SYSPLL_CLK_FREQ CONFIG_MX27_CLK26*/
+#define CONFIG_SYS_SPCTL0_VAL 0x040C2C07 /* 300 MHz */
+#define CONFIG_SYS_SPCTL1_VAL 0x0
+#define CONFIG_SPLL_FREQ 300 /* MHz */
+#endif /* CONFIG_MX27_CLK26 */
+
+/* ARM bus frequency (have to be a CONFIG_MPLL_FREQ ratio) */
+#define CONFIG_ARM_FREQ 399 /* up to 400 MHz */
+
+/* external bus frequency (have to be a CONFIG_SYS_CLK_FREQ ratio) */
+#define CONFIG_HCLK_FREQ 133 /* (CONFIG_SYS_CLK_FREQ/2) */
+
+#define CONFIG_PERIF1_FREQ 16 /* 16.625 MHz UART, GPT, PWM*/
+#define CONFIG_PERIF2_FREQ 33 /* 33.25 MHz CSPI and SDHC*/
+#define CONFIG_PERIF3_FREQ 33 /* 33.25 MHz LCD*/
+#define CONFIG_PERIF4_FREQ 33 /* 33.25 MHz CSI*/
+#define CONFIG_SSI1_FREQ 66 /* 66.50 MHz SSI1*/
+#define CONFIG_SSI2_FREQ 66 /* 66.50 MHz SSI2*/
+#define CONFIG_MSHC_FREQ 66 /* 66.50 MHz MSHC*/
+#define CONFIG_H264_FREQ 66 /* 66.50 MHz H264*/
+#define CONFIG_CLK0_DIV 3 /* Divide CLK0 by 4 */
+#define CONFIG_CLK0_EN 1 /* CLK0 enabled */
+
+/* external bus frequency (have to be a CONFIG_HCLK_FREQ ratio) */
+#define CONFIG_NFC_FREQ 44 /* NFC Clock up to 44 MHz wh 133MHz*/
+
+/* external serial bus frequency (have to be a CONFIG_SPLL_FREQ ratio) */
+#define CONFIG_USB_FREQ 60 /* 60 MHz */
+
+/*
+ * SDRAM definition parameter
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+
+#define CONFIG_SYS_SDRAM_MBYTE_SYZE 64
+
+#if (CONFIG_SYS_SDRAM_MBYTE_SYZE == 8)
+/* micron 8MB */
+#define CONFIG_SYS_SDRAM_1_BASE 0xA0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
+#define CONFIG_SYS_SDRAM_2_BASE 0xB0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
+#define CONFIG_SYS_SDRAM_NUM_COL 8 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 11 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
+#define CONFIG_SYS_SDRAM_EXIT_PWD 25 /* ns exit power down delay */
+#define CONFIG_SYS_SDRAM_W2R_DELAY 1 /* write to read cycle delay > 0 */
+#define CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY 18 /* ns */
+#define CONFIG_SYS_SDRAM_TMRD_DELAY 2 /* Load mode register cycle delay 1..4 */
+#define CONFIG_SYS_SDRAM_TWR_DELAY 1 /* LPDDR: 0=2ck 1=3ck; SDRAM: 0=1ck 1=2ck*/
+#define CONFIG_SYS_SDRAM_RAS_DELAY 42 /* ns ACTIVE-to-PRECHARGE delay */
+#define CONFIG_SYS_SDRAM_RRD_DELAY 12 /* ns ACTIVE-to-ACTIVE delay */
+#define CONFIG_SYS_SDRAM_RCD_DELAY 18 /* ns Row to Column delay */
+#define CONFIG_SYS_SDRAM_RC_DELAY 70 /* ns Row cycle delay (tRFC refresh to command)*/
+#define CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1 20 /* ns clock cycle time estimated fo CL=1 0=force 3 for lpddr*/
+#define CONFIG_SYS_SDRAM_PARTIAL_ARRAY_SR 0 /* 0=full 1=half 2=quater 3=Eighth 4=Sixteenth */
+#define CONFIG_SYS_SDRAM_DRIVE_STRENGH 0 /* 0=Full-strength 1=half 2=quater 3=Eighth */
+#define CONFIG_SYS_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
+#define CONFIG_SYS_SDRAM_SINGLE_ACCESS 0 /* 1= single access; 0 = Burst mode */
+#endif
+
+#if (CONFIG_SYS_SDRAM_MBYTE_SYZE == 16)
+/* micron 16MB */
+#define CONFIG_SYS_SDRAM_1_BASE 0xA0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
+#define CONFIG_SYS_SDRAM_2_BASE 0xB0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
+#define CONFIG_SYS_SDRAM_NUM_COL 8 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 12 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
+#define CONFIG_SYS_SDRAM_EXIT_PWD 25 /* ns exit power down delay */
+#define CONFIG_SYS_SDRAM_W2R_DELAY 1 /* write to read cycle delay > 0 */
+#define CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY 18 /* ns */
+#define CONFIG_SYS_SDRAM_TMRD_DELAY 2 /* Load mode register cycle delay 1..4 */
+#define CONFIG_SYS_SDRAM_TWR_DELAY 1 /* LPDDR: 0=2ck 1=3ck; SDRAM: 0=1ck 1=2ck*/
+#define CONFIG_SYS_SDRAM_RAS_DELAY 42 /* ns ACTIVE-to-PRECHARGE delay */
+#define CONFIG_SYS_SDRAM_RRD_DELAY 12 /* ns ACTIVE-to-ACTIVE delay */
+#define CONFIG_SYS_SDRAM_RCD_DELAY 18 /* ns Row to Column delay */
+#define CONFIG_SYS_SDRAM_RC_DELAY 70 /* ns Row cycle delay (tRFC refresh to command)*/
+#define CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1 0 /* ns clock cycle time estimated fo CL=1 0=force 3 for lpddr*/
+#define CONFIG_SYS_SDRAM_PARTIAL_ARRAY_SR 0 /* 0=full 1=half 2=quater 3=Eighth 4=Sixteenth */
+#define CONFIG_SYS_SDRAM_DRIVE_STRENGH 0 /* 0=Full-strength 1=half 2=quater 3=Eighth */
+#define CONFIG_SYS_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
+#define CONFIG_SYS_SDRAM_SINGLE_ACCESS 0 /* 1= single access; 0 = Burst mode */
+#endif
+
+#if (CONFIG_SYS_SDRAM_MBYTE_SYZE == 32)
+/* micron 32MB */
+#define CONFIG_SYS_SDRAM_1_BASE 0xA0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
+#define CONFIG_SYS_SDRAM_2_BASE 0xB0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_2_SIZE 0x02000000 /* 32 MB */
+#define CONFIG_SYS_SDRAM_NUM_COL 9 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 12 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
+#define CONFIG_SYS_SDRAM_EXIT_PWD 25 /* ns exit power down delay */
+#define CONFIG_SYS_SDRAM_W2R_DELAY 1 /* write to read cycle delay > 0 */
+#define CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY 18 /* ns */
+#define CONFIG_SYS_SDRAM_TMRD_DELAY 2 /* Load mode register cycle delay 1..4 */
+#define CONFIG_SYS_SDRAM_TWR_DELAY 1 /* LPDDR: 0=2ck 1=3ck; SDRAM: 0=1ck 1=2ck*/
+#define CONFIG_SYS_SDRAM_RAS_DELAY 42 /* ns ACTIVE-to-PRECHARGE delay */
+#define CONFIG_SYS_SDRAM_RRD_DELAY 12 /* ns ACTIVE-to-ACTIVE delay */
+#define CONFIG_SYS_SDRAM_RCD_DELAY 18 /* ns Row to Column delay */
+#define CONFIG_SYS_SDRAM_RC_DELAY 70 /* ns Row cycle delay (tRFC refresh to command)*/
+#define CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1 0 /* ns clock cycle time estimated fo CL=1 0=force 3 for lpddr*/
+#define CONFIG_SYS_SDRAM_PARTIAL_ARRAY_SR 0 /* 0=full 1=half 2=quater 3=Eighth 4=Sixteenth */
+#define CONFIG_SYS_SDRAM_DRIVE_STRENGH 0 /* 0=Full-strength 1=half 2=quater 3=Eighth */
+#define CONFIG_SYS_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
+#define CONFIG_SYS_SDRAM_SINGLE_ACCESS 0 /* 1= single access; 0 = Burst mode */
+#endif
+
+#if (CONFIG_SYS_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
+/* micron 64MB */
+#define CONFIG_SYS_SDRAM_1_BASE 0xA0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define CONFIG_SYS_SDRAM_2_BASE 0xB0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
+#define CONFIG_SYS_SDRAM_NUM_COL 9 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 13 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
+#define CONFIG_SYS_SDRAM_EXIT_PWD 25 /* ns exit power down delay */
+#define CONFIG_SYS_SDRAM_W2R_DELAY 1 /* write to read cycle delay > 0 */
+#define CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY 18 /* ns */
+#define CONFIG_SYS_SDRAM_TMRD_DELAY 2 /* Load mode register cycle delay 1..4 */
+#define CONFIG_SYS_SDRAM_TWR_DELAY 1 /* LPDDR: 0=2ck 1=3ck; SDRAM: 0=1ck 1=2ck*/
+#define CONFIG_SYS_SDRAM_RAS_DELAY 42 /* ns ACTIVE-to-PRECHARGE delay */
+#define CONFIG_SYS_SDRAM_RRD_DELAY 12 /* ns ACTIVE-to-ACTIVE delay */
+#define CONFIG_SYS_SDRAM_RCD_DELAY 18 /* ns Row to Column delay */
+#define CONFIG_SYS_SDRAM_RC_DELAY 70 /* ns Row cycle delay (tRFC refresh to command)*/
+#define CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1 0 /* ns clock cycle time estimated fo CL=1 0=force 3 for lpddr*/
+#define CONFIG_SYS_SDRAM_PARTIAL_ARRAY_SR 0 /* 0=full 1=half 2=quater 3=Eighth 4=Sixteenth */
+#define CONFIG_SYS_SDRAM_DRIVE_STRENGH 0 /* 0=Full-strength 1=half 2=quater 3=Eighth */
+#define CONFIG_SYS_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
+#define CONFIG_SYS_SDRAM_SINGLE_ACCESS 0 /* 1= single access; 0 = Burst mode */
+#endif
+
+#if (CONFIG_SYS_SDRAM_MBYTE_SYZE == 128)
+/* micron 128MB */
+#define CONFIG_SYS_SDRAM_1_BASE 0xA0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
+#define CONFIG_SYS_SDRAM_2_BASE 0xB0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
+#define CONFIG_SYS_SDRAM_NUM_COL 9 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 14 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
+#define CONFIG_SYS_SDRAM_EXIT_PWD 25 /* ns exit power down delay */
+#define CONFIG_SYS_SDRAM_W2R_DELAY 1 /* write to read cycle delay > 0 */
+#define CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY 18 /* ns */
+#define CONFIG_SYS_SDRAM_TMRD_DELAY 2 /* Load mode register cycle delay 1..4 */
+#define CONFIG_SYS_SDRAM_TWR_DELAY 1 /* LPDDR: 0=2ck 1=3ck; SDRAM: 0=1ck 1=2ck*/
+#define CONFIG_SYS_SDRAM_RAS_DELAY 42 /* ns ACTIVE-to-PRECHARGE delay */
+#define CONFIG_SYS_SDRAM_RRD_DELAY 12 /* ns ACTIVE-to-ACTIVE delay */
+#define CONFIG_SYS_SDRAM_RCD_DELAY 18 /* ns Row to Column delay */
+#define CONFIG_SYS_SDRAM_RC_DELAY 70 /* ns Row cycle delay (tRFC refresh to command)*/
+#define CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1 0 /* ns clock cycle time estimated fo CL=1 0=force 3 for lpddr*/
+#define CONFIG_SYS_SDRAM_PARTIAL_ARRAY_SR 0 /* 0=full 1=half 2=quater 3=Eighth 4=Sixteenth */
+#define CONFIG_SYS_SDRAM_DRIVE_STRENGH 0 /* 0=Full-strength 1=half 2=quater 3=Eighth */
+#define CONFIG_SYS_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
+#define CONFIG_SYS_SDRAM_SINGLE_ACCESS 0 /* 1= single access; 0 = Burst mode */
+#endif
+
+#if (CONFIG_SYS_SDRAM_MBYTE_SYZE == 256)
+/* micron 256MB */
+#define CONFIG_SYS_SDRAM_1_BASE 0xA0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
+#define CONFIG_SYS_SDRAM_2_BASE 0xB0000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
+#define CONFIG_SYS_SDRAM_NUM_COL 10 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 14 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
+#define CONFIG_SYS_SDRAM_EXIT_PWD 25 /* ns exit power down delay */
+#define CONFIG_SYS_SDRAM_W2R_DELAY 1 /* write to read cycle delay > 0 */
+#define CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY 18 /* ns */
+#define CONFIG_SYS_SDRAM_TMRD_DELAY 2 /* Load mode register cycle delay 1..4 */
+#define CONFIG_SYS_SDRAM_TWR_DELAY 1 /* LPDDR: 0=2ck 1=3ck; SDRAM: 0=1ck 1=2ck*/
+#define CONFIG_SYS_SDRAM_RAS_DELAY 42 /* ns ACTIVE-to-PRECHARGE delay */
+#define CONFIG_SYS_SDRAM_RRD_DELAY 12 /* ns ACTIVE-to-ACTIVE delay */
+#define CONFIG_SYS_SDRAM_RCD_DELAY 18 /* ns Row to Column delay */
+#define CONFIG_SYS_SDRAM_RC_DELAY 70 /* ns Row cycle delay (tRFC refresh to command)*/
+#define CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1 0 /* ns clock cycle time estimated fo CL=1 0=force 3 for lpddr*/
+#define CONFIG_SYS_SDRAM_PARTIAL_ARRAY_SR 0 /* 0=full 1=half 2=quater 3=Eighth 4=Sixteenth */
+#define CONFIG_SYS_SDRAM_DRIVE_STRENGH 0 /* 0=Full-strength 1=half 2=quater 3=Eighth */
+#define CONFIG_SYS_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
+#define CONFIG_SYS_SDRAM_SINGLE_ACCESS 0 /* 1= single access; 0 = Burst mode */
+#endif
+
+/*
+ * Configuration for no NOR FLASH memory
+ */
+#define CONFIG_SYS_NO_FLASH
+
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+#define CONFIG_NAND_MXC
+
+#define CONFIG_MXC_NAND_REGS_BASE (0xD8000000)
+#define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_MXC_NAND_HWECC
+#define CONFIG_SYS_NAND_LARGEPAGE
+//#define CONFIG_MTD_NAND_VERIFY_WRITE
+#define CONFIG_MTD_NAND_ECC_JFFS2
+
+//#define CONFIG_SYS_DIRECT_FLASH_TFTP 1
+#define CONFIG_FLASH_SHOW_PROGRESS 45
+#define IMX27_NAND_16BITS 1
+#define NAND_MAX_CHIPS 1
+
+#define CONFIG_BOOT_TRACE_REG 0xAFFFFFF8 /* Addr to store traces of SPL boot */
+//#define NAND_ALLOW_ERASE_ALL
+//#define CONFIG_MTD_NAND_VERIFY_WRITE 1
+//#define CONFIG_SYS_NAND_SELECT_DEVICE 0 /* nand driver supports mutipl. chips */
+//#define CONFIG_SYS_NFC_DEBUG
+//#define CONFIG_MTD_DEBUG
+//#define CONFIG_MTD_DEBUG_VERBOSE 3
+
+/*=====================*/
+
+#define CONFIG_NAND_U_BOOT
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_LOAD_ADDR /* Copy SPL+U-Boot here */
+#define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN /* Size is the partion size */
+/*
+ * Environment setup. Definitions of monitor location and size with
+ * definition of environment setup ends up in 2 possibilities.
+ * 1. Embeded environment - in u-boot code is space for environment
+ * 2. Environment is read from predefined sector of flash
+ * Right now we support 2. possiblity, but expecting no env placed
+ * on mentioned address right now. This also needs to provide whole
+ * sector for it - for us 256Kb is really waste of memory. U-boot uses
+ * default env. and until kernel parameters could be sent to kernel
+ * env. has no sense to us.
+ */
+
+#define CONFIG_SYS_MONITOR_BASE 0xAFF00000
+#define CONFIG_SYS_MONITOR_OFFSET 0x00000000
+#define CONFIG_SYS_MONITOR_LEN 0x000A0000 /* 640kB ( 5 flash blocks ) */
+#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_OFFSET 0x000A0000 /* NAND offset address for now*/
+#define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
+#define CONFIG_ENV_RANGE 0X00060000 /* 384kB ( 3 flash blocks ) */
+#define CONFIG_ENV_OVERWRITE 1 /* env is writable now */
+#define CONFIG_FIRMWARE_OFFSET 0x00100000
+#define CONFIG_FIRMWARE_LEN 0x00080000 /* 512kB ( 4 flash blocks ) */
+#define CONFIG_KERNEL_OFFSET 0x00180000
+#define CONFIG_KERNEL_LEN 0x00500000 /* 5.0MB */
+#define CONFIG_ROOTFS_OFFSET 0x00680000
+#define CONFIG_ROOTFS_LEN /* entire flash if not specified ~116MB*/
+
+/*
+ * Default load address for user programs and kernel
+ */
+#define CONFIG_SYS_LOAD_ADDR 0xA0000000
+#define CONFIG_LOADADDR 0xA0000000
+#define CONFIG_SYS_TFTP_LOADADDR 0xA0000000
+
+/*
+ * Partitions & Filsystems
+ */
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+#define CONFIG_SUPPORT_VFAT
+
+#define CONFIG_SUPPORT_VFAT
+
+/*
+ * JFFS2
+ */
+#define CONFIG_JFFS2_NAND 1
+#define CONFIG_JFFS2_CMDLINE 1
+
+/*
+ * This is setting for JFFS2 support in u-boot.
+ * NOTE: Enable CONFIG_SYS_CMD_JFFS2 for JFFS2 support.
+ */
+#define CONFIG_SYS_JFFS_CUSTOM_PART
+
+/*
+ * UBIFS
+ */
+#define CONFIG_RBTREE
+#define CONFIG_LZO
+
+/*
+ * Hardware drivers
+ */
+
+/* FEC IMX27 ethernet chipset */
+#define CONFIG_FEC_MXC
+#undef CONFIG_FEC_IMX27_DEBUG
+
+#define CONFIG_NET_MULTI
+#define CONFIG_FEC_MXC_PHYADDR 0x1f
+#define CONFIG_MII 1 /* MII PHY management */
+
+/*-----------------------------------------------------------------------
+ * FPGA stuff
+ */
+#define CONFIG_FPGA CONFIG_SYS_SPARTAN3
+//#define FPGA_DEBUG
+#define CONFIG_FPGA_COUNT 1
+#define CONFIG_FPGA_XILINX
+#define CONFIG_FPGA_SPARTAN3
+#define CONFIG_SYS_FPGA_WAIT 20000 /* 20 ms */
+#define CONFIG_SYS_FPGA_PROG_FEEDBACK
+#define CONFIG_SYS_FPGA_CHECK_CTRLC
+#define CONFIG_SYS_FPGA_CHECK_ERROR
+//#define CONFIG_SYS_FPGA_IS_PROTO /* to be defined with apf27 board prototype*/
+
+/* FPGA program pin configuration */
+#define CONFIG_SYS_FPGA_PWR (GPIO_PORTF | 19) /* FPGA prog pin */
+#define CONFIG_SYS_FPGA_PRG (GPIO_PORTF | 11) /* FPGA prog pin */
+#define CONFIG_SYS_FPGA_CLK (GPIO_PORTF | 15) /* FPGA clk pin */
+#define CONFIG_SYS_FPGA_RDATA 0xD6000000 /* FPGA data addr */
+#define CONFIG_SYS_FPGA_WDATA 0xD6000000 /* FPGA data addr */
+#define CONFIG_SYS_FPGA_INIT (GPIO_PORTF | 12) /* FPGA init pin */
+#define CONFIG_SYS_FPGA_DONE (GPIO_PORTF | 9) /* FPGA done pin */
+#define CONFIG_SYS_FPGA_RW (GPIO_PORTF | 21) /* FPGA done pin */
+#define CONFIG_SYS_FPGA_CS (GPIO_PORTF | 22) /* FPGA done pin */
+#define CONFIG_SYS_FPGA_SUSPEND (GPIO_PORTF | 10) /* FPGA done pin */
+#define CONFIG_SYS_FPGA_RESET (GPIO_PORTF | 7) /* FPGA done pin */
+
+/*
+ * I2C bus
+ */
+
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+
+#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+
+#define CONFIG_I2C_CMD_TREE
+#define CONFIG_I2C_MULTI_BUS 2
+#define CONFIG_SYS_I2C_NOPROBES { }
+
+# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
+# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
+/* mask of address bits that overflow into the "EEPROM chip address" */
+/*#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x00*/
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* takes up to 10 msec */
+
+/*
+ * RTC
+ */
+#define CONFIG_RTC_DS1374
+#define CONFIG_SYS_RTC_BUS_NUM 0
+//#define DEBUG_RTC
+
+/*
+ * SD/MMC
+ */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE 0x10014000
+
+/*
+ * External interfaces module
+ *
+ * CSCRxU_VAL:
+ * 31| x | x | x x |x x x x| x x | x | x |x x x x|16
+ * |SP |WP | BCD | BCS | PSZ |PME|SYNC| DOL |
+ *
+ * 15| x x | x x x x x x | x | x x x x | x x x x |0
+ * | CNC | WSC |EW | WWS | EDC |
+ *
+ * CSCRxL_VAL:
+ * 31| x x x x | x x x x | x x x x | x x x x |16
+ * | OEA | OEN | EBWA | EBWN |
+ * 15|x x x x| x |x x x |x x x x| x | x | x | x | 0
+ * | CSA |EBC| DSZ | CSN |PSR|CRE|WRAP|CSEN|
+ *
+ * CSCRxA_VAL:
+ * 31| x x x x | x x x x | x x x x | x x x x |16
+ * | EBRA | EBRN | RWA | RWN |
+ * 15| x | x x |x x x|x x|x x|x x| x | x | x | x | 0
+ * |MUM| LAH | LBN |LBA|DWW|DCT|WWU|AGE|CNC2|FCE|
+ */
+
+/* CS0 configuration for 16 bit nor flash */
+#define CONFIG_SYS_CS0U_VAL 0x0000CC03
+#define CONFIG_SYS_CS0L_VAL 0xa0330D01
+#define CONFIG_SYS_CS0A_VAL 0x00220800
+
+#define CONFIG_SYS_CS1U_VAL 0
+#define CONFIG_SYS_CS1L_VAL 0
+#define CONFIG_SYS_CS1A_VAL 0
+
+#define CONFIG_SYS_CS2U_VAL 0
+#define CONFIG_SYS_CS2L_VAL 0
+#define CONFIG_SYS_CS2A_VAL 0
+
+#define CONFIG_SYS_CS3U_VAL 0
+#define CONFIG_SYS_CS3L_VAL 0
+#define CONFIG_SYS_CS3A_VAL 0
+
+#define CONFIG_SYS_CS4U_VAL 0
+#define CONFIG_SYS_CS4L_VAL 0
+#define CONFIG_SYS_CS4A_VAL 0
+
+/* FPGA 16 bit data bus */
+#define CONFIG_SYS_CS5U_VAL 0x00000600
+#define CONFIG_SYS_CS5L_VAL 0x00000D01
+#define CONFIG_SYS_CS5A_VAL 0
+
+#define CONFIG_SYS_EIM_VAL 0x00002000
+
+/* FPGA specific settings */
+/* CLKO */
+#define CONFIG_SYS_CCSR_VAL 0x00000305
+/* drive strength CLKO set to 2*/
+#define CONFIG_SYS_DSCR10_VAL 0x00020000
+/* drive strength A1..A12 set to 2*/
+#define CONFIG_SYS_DSCR3_VAL 0x02AAAAA8
+/* drive strength ctrl*/
+#define CONFIG_SYS_DSCR7_VAL 0x00020880
+/* drive strength data*/
+#define CONFIG_SYS_DSCR2_VAL 0xAAAAAAAA
+
+
+/*
+ * Default configuration for GPIOs and peripherals
+ */
+#define CONFIG_SYS_DDIR_A_VAL 0x00000000
+#define CONFIG_SYS_OCR1_A_VAL 0x00000000
+#define CONFIG_SYS_OCR2_A_VAL 0x00000000
+#define CONFIG_SYS_ICFA1_A_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFA2_A_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB1_A_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB2_A_VAL 0xFFFFFFFF
+#define CONFIG_SYS_DR_A_VAL 0x00000000
+#define CONFIG_SYS_GIUS_A_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICR1_A_VAL 0x00000000
+#define CONFIG_SYS_ICR2_A_VAL 0x00000000
+#define CONFIG_SYS_IMR_A_VAL 0x00000000
+#define CONFIG_SYS_GPR_A_VAL 0x00000000
+#define CONFIG_SYS_PUEN_A_VAL 0xFFFFFFFF
+
+#define CONFIG_SYS_DDIR_B_VAL 0x00000000
+#define CONFIG_SYS_OCR1_B_VAL 0x00000000
+#define CONFIG_SYS_OCR2_B_VAL 0x00000000
+#define CONFIG_SYS_ICFA1_B_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFA2_B_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB1_B_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB2_B_VAL 0xFFFFFFFF
+#define CONFIG_SYS_DR_B_VAL 0x00000000
+#define CONFIG_SYS_GIUS_B_VAL 0xFF3FFFF0
+#define CONFIG_SYS_ICR1_B_VAL 0x00000000
+#define CONFIG_SYS_ICR2_B_VAL 0x00000000
+#define CONFIG_SYS_IMR_B_VAL 0x00000000
+#define CONFIG_SYS_GPR_B_VAL 0x00000000
+#define CONFIG_SYS_PUEN_B_VAL 0xFFFFFFFF
+
+#define CONFIG_SYS_DDIR_C_VAL 0x00000000
+#define CONFIG_SYS_OCR1_C_VAL 0x00000000
+#define CONFIG_SYS_OCR2_C_VAL 0x00000000
+#define CONFIG_SYS_ICFA1_C_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFA2_C_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB1_C_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB2_C_VAL 0xFFFFFFFF
+#define CONFIG_SYS_DR_C_VAL 0x00000000
+#define CONFIG_SYS_GIUS_C_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICR1_C_VAL 0x00000000
+#define CONFIG_SYS_ICR2_C_VAL 0x00000000
+#define CONFIG_SYS_IMR_C_VAL 0x00000000
+#define CONFIG_SYS_GPR_C_VAL 0x00000000
+#define CONFIG_SYS_PUEN_C_VAL 0xFFFFFF87
+
+#define CONFIG_SYS_DDIR_D_VAL 0x00000000
+#define CONFIG_SYS_OCR1_D_VAL 0x00000000
+#define CONFIG_SYS_OCR2_D_VAL 0x00000000
+#define CONFIG_SYS_ICFA1_D_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFA2_D_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB1_D_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB2_D_VAL 0xFFFFFFFF
+#define CONFIG_SYS_DR_D_VAL 0x00000000
+#define CONFIG_SYS_GIUS_D_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICR1_D_VAL 0x00000000
+#define CONFIG_SYS_ICR2_D_VAL 0x00000000
+#define CONFIG_SYS_IMR_D_VAL 0x00000000
+#define CONFIG_SYS_GPR_D_VAL 0x00000000
+#define CONFIG_SYS_PUEN_D_VAL 0xFFFFFFFF
+
+#define CONFIG_SYS_DDIR_E_VAL 0x00000000
+#define CONFIG_SYS_OCR1_E_VAL 0x00000000
+#define CONFIG_SYS_OCR2_E_VAL 0x00000000
+#define CONFIG_SYS_ICFA1_E_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFA2_E_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB1_E_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB2_E_VAL 0xFFFFFFFF
+#define CONFIG_SYS_DR_E_VAL 0x00000000
+#define CONFIG_SYS_GIUS_E_VAL 0xFFFFCCF8
+#define CONFIG_SYS_ICR1_E_VAL 0x00000000
+#define CONFIG_SYS_ICR2_E_VAL 0x00000000
+#define CONFIG_SYS_IMR_E_VAL 0x00000000
+#define CONFIG_SYS_GPR_E_VAL 0x00000000
+#define CONFIG_SYS_PUEN_E_VAL 0xFFFFFFFF
+
+#define CONFIG_SYS_DDIR_F_VAL 0x00000000
+#define CONFIG_SYS_OCR1_F_VAL 0x00000000
+#define CONFIG_SYS_OCR2_F_VAL 0x00000000
+#define CONFIG_SYS_ICFA1_F_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFA2_F_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB1_F_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB2_F_VAL 0xFFFFFFFF
+#define CONFIG_SYS_DR_F_VAL 0x00000000
+#define CONFIG_SYS_GIUS_F_VAL 0xFF7F8000
+#define CONFIG_SYS_ICR1_F_VAL 0x00000000
+#define CONFIG_SYS_ICR2_F_VAL 0x00000000
+#define CONFIG_SYS_IMR_F_VAL 0x00000000
+#define CONFIG_SYS_GPR_F_VAL 0x00000000
+#define CONFIG_SYS_PUEN_F_VAL 0xFFFFFFFF
+
+/* Enforce DDR signal strengh & enable USB/PP/DMA burst override bits */
+#define CONFIG_SYS_GPCR_VAL 0x0003000F
+
+/* LPDDR enable. latency hiding behavior enabled */
+//#define CONFIG_SYS_ESDMISC_VAL ESDMISC_MA10_SHARE+ESDMISC_MDDREN
+/*
+ * safe value in case of erratic crash during boot
+ * (seen with some prototype boards)*/
+#define CONFIG_SYS_ESDMISC_VAL ESDMISC_LHD+ESDMISC_MDDREN
+
+/* FMCR select num LPDDR RAMs and nand 16bits, 2KB pages */
+#if (CONFIG_NR_DRAM_BANKS == 1)
+#define CONFIG_SYS_FMCR_VAL 0xFFFFFFF9
+#elif (CONFIG_NR_DRAM_BANKS == 2)
+#define CONFIG_SYS_FMCR_VAL 0xFFFFFFFB
+#endif
+
+#define CONFIG_SYS_AIPI1_PSR0_VAL 0x20040304
+#define CONFIG_SYS_AIPI1_PSR1_VAL 0xDFFBFCFB
+#define CONFIG_SYS_AIPI2_PSR0_VAL 0x00000000
+#define CONFIG_SYS_AIPI2_PSR1_VAL 0xFFFFFFFF
+
+/* PCCR enable DMA FEC I2C1 IIM SDHC1 */
+#define CONFIG_SYS_PCCR0_VAL 0x05070410
+#define CONFIG_SYS_PCCR1_VAL 0xA14A0408
+
+/* CONFIG_SKIP_LOWLEVEL_INIT bypass lowlevel init in bootstrap mode */
+#undef CONFIG_SKIP_LOWLEVEL_INIT
+
+/*
+ * From here, there should not be any user configuration.
+ * All Equations are automatic
+ */
+
+/* fixme none integer value (7.5ns) => 2*hclock = 15ns */
+#define CONFIG_SYS_2XHCLK_LGTH (2000/CONFIG_HCLK_FREQ) /* ns */
+
+/* USB 60 MHz ; ARM up to 400; HClK up to 133MHz*/
+#ifdef CONFIG_MX27_CLK26
+#define CSCR_MASK 0x0303800D
+#else
+#define CSCR_MASK 0x0300800D
+#endif
+#define CONFIG_SYS_CSCR_VAL\
+ (CSCR_MASK \
+ |((((CONFIG_SPLL_FREQ/CONFIG_USB_FREQ)-1)&0x07)<<28) \
+ |((((CONFIG_MPLL_FREQ/CONFIG_ARM_FREQ)-1)&0x03)<<12) \
+ |((((CONFIG_SYS_CLK_FREQ/CONFIG_HCLK_FREQ)-1)&0x03)<<8))
+
+/* SSIx CLKO NFC H264 MSHC */
+#define CONFIG_SYS_PCDR0_VAL\
+ (((((CONFIG_SYS_CLK_FREQ/CONFIG_MSHC_FREQ)-1)&0x3F)<<0) \
+ |((((CONFIG_HCLK_FREQ/CONFIG_NFC_FREQ)-1)&0x0F)<<6) \
+ |(((((CONFIG_SYS_CLK_FREQ/CONFIG_H264_FREQ)-2)*2)&0x3F)<<10)\
+ |(((((CONFIG_SYS_CLK_FREQ/CONFIG_SSI1_FREQ)-2)*2)&0x3F)<<16)\
+ |(((CONFIG_CLK0_DIV)&0x07)<<22)\
+ |(((CONFIG_CLK0_EN)&0x01)<<25)\
+ |(((((CONFIG_SYS_CLK_FREQ/CONFIG_SSI2_FREQ)-2)*2)&0x3F)<<26))
+
+/* PERCLKx */
+#define CONFIG_SYS_PCDR1_VAL\
+ (((((CONFIG_SYS_CLK_FREQ/CONFIG_PERIF1_FREQ)-1)&0x3F)<<0) \
+ |((((CONFIG_SYS_CLK_FREQ/CONFIG_PERIF2_FREQ)-1)&0x3F)<<8) \
+ |((((CONFIG_SYS_CLK_FREQ/CONFIG_PERIF3_FREQ)-1)&0x3F)<<16) \
+ |((((CONFIG_SYS_CLK_FREQ/CONFIG_PERIF4_FREQ)-1)&0x3F)<<24))
+
+/* SDRAM controller programming Values */
+#if (((2*CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1)>(3*CONFIG_SYS_2XHCLK_LGTH))\
+ ||(CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1<1))
+#define REG_FIELD_SCL_VAL 3
+#define REG_FIELD_SCLIMX_VAL 0
+#else
+#define REG_FIELD_SCL_VAL\
+ ((2*CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1+CONFIG_SYS_2XHCLK_LGTH-1)/CONFIG_SYS_2XHCLK_LGTH)
+#define REG_FIELD_SCLIMX_VAL REG_FIELD_SCL_VAL
+#endif
+
+//#define REG_FIELD_SCL_VAL 3
+//#define REG_FIELD_SCLIMX_VAL 3
+
+#if ((2*CONFIG_SYS_SDRAM_RC_DELAY)>(16*CONFIG_SYS_2XHCLK_LGTH))
+#define REG_FIELD_SRC_VAL 0
+#else
+#define REG_FIELD_SRC_VAL\
+ ((2*CONFIG_SYS_SDRAM_RC_DELAY+CONFIG_SYS_2XHCLK_LGTH-1)/CONFIG_SYS_2XHCLK_LGTH)
+#endif
+
+/* TBD Power down timer ; PRCT Bit Field Encoding; burst length 8 ; FP = 0*/
+#define REG_ESDCTL_BASE_CONFIG (0x80020485\
+ | (((CONFIG_SYS_SDRAM_NUM_ROW-11)&0x7)<<24)\
+ | (((CONFIG_SYS_SDRAM_NUM_COL-8)&0x3)<<20)\
+ | (((CONFIG_SYS_SDRAM_REFRESH)&0x7)<<13))
+
+#define CONFIG_SYS_NORMAL_RW_CMD ((0x0<<28)+REG_ESDCTL_BASE_CONFIG)
+#define CONFIG_SYS_PRECHARGE_CMD ((0x1<<28)+REG_ESDCTL_BASE_CONFIG)
+#define CONFIG_SYS_AUTOREFRESH_CMD ((0x2<<28)+REG_ESDCTL_BASE_CONFIG)
+#define CONFIG_SYS_SET_MODE_REG_CMD ((0x3<<28)+REG_ESDCTL_BASE_CONFIG)
+
+/* ESDRAMC Configuration Registers : force CL=3 to lpddr */
+#define CONFIG_SYS_SDRAM_ESDCFG_REGISTER_VAL (0x0\
+ | (((((2*CONFIG_SYS_SDRAM_EXIT_PWD+CONFIG_SYS_2XHCLK_LGTH-1)/CONFIG_SYS_2XHCLK_LGTH)-1)&0x3)<<21)\
+ | (((CONFIG_SYS_SDRAM_W2R_DELAY-1)&0x1)<<20)\
+ | (((((2*CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY+CONFIG_SYS_2XHCLK_LGTH-1)/CONFIG_SYS_2XHCLK_LGTH)-1)&0x3)<<18)\
+ | (((CONFIG_SYS_SDRAM_TMRD_DELAY-1)&0x3)<<16)\
+ | (((CONFIG_SYS_SDRAM_TWR_DELAY)&0x1)<<15)\
+ | (((((2*CONFIG_SYS_SDRAM_RAS_DELAY+CONFIG_SYS_2XHCLK_LGTH-1)/CONFIG_SYS_2XHCLK_LGTH)-1)&0x7)<<12)\
+ | (((((2*CONFIG_SYS_SDRAM_RRD_DELAY+CONFIG_SYS_2XHCLK_LGTH-1)/CONFIG_SYS_2XHCLK_LGTH)-1)&0x3)<<10)\
+ | (((REG_FIELD_SCLIMX_VAL)&0x3)<<8)\
+ | (((((2*CONFIG_SYS_SDRAM_RCD_DELAY+CONFIG_SYS_2XHCLK_LGTH-1)/CONFIG_SYS_2XHCLK_LGTH)-1)&0x7)<<4)\
+ | (((REG_FIELD_SRC_VAL)&0x0F)<<0))
+
+/* Issue Mode register Command to SDRAM*/
+#define CONFIG_SYS_SDRAM_MODE_REGISTER_VAL\
+ ((((CONFIG_SYS_SDRAM_BURST_LENGTH)&0x7)<<(0))\
+ | (((REG_FIELD_SCL_VAL)&0x7)<<(4))\
+ | ((0)<<(3)) /* sequentiql access */ \
+ /*| (((CONFIG_SYS_SDRAM_SINGLE_ACCESS)&0x1)<<(1))*/)
+
+/* Issue Extended Mode register Command to SDRAM*/
+#define CONFIG_SYS_SDRAM_EXT_MODE_REGISTER_VAL\
+ ((CONFIG_SYS_SDRAM_PARTIAL_ARRAY_SR<<0)\
+ | (CONFIG_SYS_SDRAM_DRIVE_STRENGH<<(5))\
+ | (1<<(CONFIG_SYS_SDRAM_NUM_COL+CONFIG_SYS_SDRAM_NUM_ROW+1+2)))
+
+/* Issue Precharge all Command to SDRAM*/
+#define CONFIG_SYS_SDRAM_PRECHARGE_ALL_VAL (1<<10)
+
+#endif /* __CONFIG_H */
diff --git a/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2010.03-rc2.h b/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2010.03.h
similarity index 100%
rename from buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2010.03-rc2.h
rename to buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2010.03.h
diff --git a/buildroot/target/u-boot/u-boot-2010.03-rc2-100-imx.patch b/buildroot/target/u-boot/u-boot-2010.03-100-imx.patch
similarity index 100%
rename from buildroot/target/u-boot/u-boot-2010.03-rc2-100-imx.patch
rename to buildroot/target/u-boot/u-boot-2010.03-100-imx.patch
diff --git a/buildroot/target/u-boot/u-boot-2010.03-rc2-110-apf9328.patch b/buildroot/target/u-boot/u-boot-2010.03-110-apf9328.patch
similarity index 100%
rename from buildroot/target/u-boot/u-boot-2010.03-rc2-110-apf9328.patch
rename to buildroot/target/u-boot/u-boot-2010.03-110-apf9328.patch
diff --git a/buildroot/target/u-boot/u-boot-2010.03-rc2-111-apf9328-DM9000.patch b/buildroot/target/u-boot/u-boot-2010.03-111-apf9328-DM9000.patch
similarity index 100%
rename from buildroot/target/u-boot/u-boot-2010.03-rc2-111-apf9328-DM9000.patch
rename to buildroot/target/u-boot/u-boot-2010.03-111-apf9328-DM9000.patch
diff --git a/buildroot/target/u-boot/u-boot-2010.03-rc2-112-apf9328-makefile.patch b/buildroot/target/u-boot/u-boot-2010.03-112-apf9328-makefile.patch
similarity index 100%
rename from buildroot/target/u-boot/u-boot-2010.03-rc2-112-apf9328-makefile.patch
rename to buildroot/target/u-boot/u-boot-2010.03-112-apf9328-makefile.patch
diff --git a/buildroot/target/u-boot/u-boot-2010.03-rc2-120-apf9328-tools.patch b/buildroot/target/u-boot/u-boot-2010.03-120-apf9328-tools.patch
similarity index 100%
rename from buildroot/target/u-boot/u-boot-2010.03-rc2-120-apf9328-tools.patch
rename to buildroot/target/u-boot/u-boot-2010.03-120-apf9328-tools.patch
diff --git a/buildroot/target/u-boot/u-boot-2010.03-rc2-140-ds1374.patch b/buildroot/target/u-boot/u-boot-2010.03-140-ds1374.patch
similarity index 100%
rename from buildroot/target/u-boot/u-boot-2010.03-rc2-140-ds1374.patch
rename to buildroot/target/u-boot/u-boot-2010.03-140-ds1374.patch
diff --git a/buildroot/target/u-boot/u-boot-2010.03-rc2-150-apf9328-fixes_gcc_4_4_EABI_linking_issues.patch b/buildroot/target/u-boot/u-boot-2010.03-150-apf9328-fixes_gcc_4_4_EABI_linking_issues.patch
similarity index 100%
rename from buildroot/target/u-boot/u-boot-2010.03-rc2-150-apf9328-fixes_gcc_4_4_EABI_linking_issues.patch
rename to buildroot/target/u-boot/u-boot-2010.03-150-apf9328-fixes_gcc_4_4_EABI_linking_issues.patch
diff --git a/buildroot/target/u-boot/u-boot-2010.03-300-imx27.patch b/buildroot/target/u-boot/u-boot-2010.03-300-imx27.patch
new file mode 100755
index 0000000..f7339ce
--- /dev/null
+++ b/buildroot/target/u-boot/u-boot-2010.03-300-imx27.patch
@@ -0,0 +1,1123 @@
+--- u-boot-2010.03-rc2/cpu/arm926ejs/mx27/cmd_imxfuse.c 2010-04-02 14:52:13.000000000 +0200
++++ u-boot-2010.03-rc2/cpu/arm926ejs/mx27/cmd_imxfuse.c 2010-04-02 14:50:11.000000000 +0200
+@@ -0,0 +1,331 @@
++/*
++ * cmd_imxfuse-c Interface to iMX IC Identification Module
++ * Based on Freescale iMX27 Board Support Package
++ *
++ * (C) Copyright 2008,2009 Eric Jarrige <eri...@ar...>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <config.h>
++#include <common.h>
++#include <command.h>
++
++#ifdef CONFIG_CMD_IMX_FUSE
++
++#include <asm/arch/imx-regs.h>
++#include <asm/io.h>
++
++#define IIM_ERR_SHIFT 8
++#define POLL_FUSE_PRGD (IIM_STAT_PRGD | (IIM_ERR_PRGE << IIM_ERR_SHIFT))
++#define POLL_FUSE_SNSD (IIM_STAT_SNSD | (IIM_ERR_SNSE << IIM_ERR_SHIFT))
++
++static void imx_fuse_op_start(void)
++{
++ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
++ /* Do not generate interrupt */
++ writel(0x00, &iim->iim_statm);
++ // clear the status bits and error bits
++ writel(0x03, &iim->iim_stat);
++ writel(0xFE, &iim->iim_err);
++}
++
++/*
++ * The action should be either:
++ * POLL_FUSE_PRGD
++ * or:
++ * POLL_FUSE_SNSD
++ */
++static int imx_poll_fuse_op_done(int action)
++{
++ u32 status, error;
++ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
++
++ if (action != POLL_FUSE_PRGD && action != POLL_FUSE_SNSD) {
++ printf("%s(%d) invalid operation\n", __FUNCTION__, action);
++ return -1;
++ }
++
++ /* Poll busy bit till it is NOT set */
++ while ((readl(&iim->iim_stat) & IIM_STAT_BUSY) != 0 ) {
++ }
++
++ /* Test for successful write */
++ status = readl(&iim->iim_stat);
++ error = readl(&iim->iim_err);
++
++ if ((status & action) != 0 && (error & (action >> IIM_ERR_SHIFT)) == 0) {
++ if (error) {
++ printf("Even though the operation seems successful...\n");
++ printf("There are some error(s) at addr=0x%x: 0x%x\n",
++ readl(&iim->iim_err), error);
++ }
++ return 0;
++ }
++ printf("%s(0x%x) failed\n", __FUNCTION__, action);
++ printf("status address=0x%x, value=0x%x\n",
++ readl(&iim->iim_stat), status);
++ printf("There are some error(s) at addr=0x%x: 0x%x\n",
++ readl(&iim->iim_err), error);
++ return -1;
++}
++
++static int imx_read_shadow_fuse(int bank, int row, int bit)
++{
++ printf("Shadow fuses at (bank:%d, row:%d) = 0x%x\n",
++ bank, row, readl((long*)IIM_BANK_REG(bank,row)));
++ return 0;
++}
++
++static int imx_sense_fuse(int bank, int row, int bit)
++{
++ int addr, addr_l, addr_h;
++ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
++
++ imx_fuse_op_start();
++
++ /* Enable IIM Program Protect */
++ writel(0x0,&iim->iim_prog_p);
++
++ addr = ((bank << 11) | (row << 3) | (bit & 0x7));
++ /* Set IIM Program Upper Address */
++ addr_h = (addr >> 8) & 0x000000FF;
++ /* Set IIM Program Lower Address */
++ addr_l = (addr & 0x000000FF);
++
++#ifdef IIM_FUSE_DEBUG
++ printf("%s: addr_h=0x%x, addr_l=0x%x\n",
++ __FUNCTION__, addr_h, addr_l);
++#endif
++ writel(addr_h, &iim->iim_ua);
++ writel(addr_l, &iim->iim_la);
++
++ /* Start sensing */
++ writel(0x08, &iim->iim_fctl);
++ if (imx_poll_fuse_op_done(POLL_FUSE_SNSD) != 0) {
++ printf("%s(bank: %d, row: %d, bit: %d failed\n",
++ __FUNCTION__, bank, row, bit);
++ }
++
++ printf("fuses at (bank:%d, row:%d) = 0x%x\n",
++ bank, row, readl(&iim->iim_sdat));
++ return 0;
++}
++
++/* Blow fuses based on the bank, row and bit positions (all 0-based)
++*/
++static int imx_fuse_blow(int bank,int row,int bit)
++{
++ int addr, addr_l, addr_h, ret = 1;
++ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
++
++ imx_fuse_op_start();
++
++ /* Disable IIM Program Protect */
++ writel(0xAA, &iim->iim_prog_p);
++
++ addr = ((bank << 11) | (row << 3) | (bit & 0x7));
++ /* Set IIM Program Upper Address */
++ addr_h = (addr >> 8) & 0x000000FF;
++ /* Set IIM Program Lower Address */
++ addr_l = (addr & 0x000000FF);
++
++#ifdef IIM_FUSE_DEBUG
++ printf("blowing addr_h=0x%x, addr_l=0x%x\n", addr_h, addr_l);
++#endif
++
++ writel(addr_h, &iim->iim_ua);
++ writel(addr_l, &iim->iim_la);
++ /* Start Programming */
++ writel(0x31, &iim->iim_fctl);
++ if (imx_poll_fuse_op_done(POLL_FUSE_PRGD) == 0) {
++ ret = 0;
++ }
++
++ /* Enable IIM Program Protect */
++ writel(0x0, &iim->iim_prog_p);
++ return ret;
++}
++
++/* Blow byte fuses based on the bank and row positions (all 0-based)
++*/
++static int imx_fuse_blow_byte(int bank,int row,unsigned char value)
++{
++ int i, ret = 0;
++
++ for (i = 0; i < 8; i++) {
++ if (((value >> i) & 0x1) == 0) {
++ continue;
++ }
++ ret |= imx_fuse_blow(bank, row, i);
++ }
++
++ return ret;
++}
++
++static int imx_mac_read(unsigned char pmac[6])
++{
++ int i;
++ int uninitialized = 0;
++
++ for (i=0;i<6;i++) {
++ pmac[6-1-i] = readl((long*)IIM_BANK_REG(0,(IIM0_MAC+i)));
++ }
++
++ /* uninitialized if all 00 */
++ if ((pmac[0] == 0) && (pmac[1] == 0) && (pmac[2] == 0) &&
++ (pmac[3] == 0) && (pmac[4] == 0) && (pmac[5] == 0))
++ uninitialized = 1;
++
++ /* uninitialized if all FF (could be safe) */
++ if ((pmac[0] == 0xff) && (pmac[1] == 0xff) && (pmac[2] == 0xff) &&
++ (pmac[3] == 0xff) && (pmac[4] == 0xff) && (pmac[5] == 0xff))
++ uninitialized = 1;
++
++ return uninitialized;
++}
++
++static int imx_mac_blow(unsigned char pmac[6])
++{
++ int i, ret = 1;
++ unsigned char mac[6];
++ int uninitialized = 0;
++
++ uninitialized = imx_mac_read(mac);
++
++ if (uninitialized) {
++ ret = 0;
++ for(i=0;i<6;i++) {
++ ret |= imx_fuse_blow_byte(0, (IIM0_MAC+i), pmac[6 - 1 -i]);
++ }
++ }
++
++ return ret;
++}
++
++
++int do_imx_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
++{
++ uint32_t bank, row, value, i;
++ int ret = 1;
++
++ if (argc < 2) {
++ printf("It is too dangeous for you to use this command.\n");
++ printf("Usage:\n%s\n", cmdtp->usage);
++ return ret;
++ }
++
++ if ((!strcmp(argv[1], "sense"))&&((argc == 4))) {
++ bank = simple_strtoul(argv[2], NULL, 16);
++ row = simple_strtoul(argv[3], NULL, 16);
++
++ printf("Sense read fuse at bank:%d row:%d\n", bank, row);
++ ret = imx_sense_fuse(bank, row, 0);
++ }else if ((!strcmp(argv[1], "read"))&&((argc == 4))) {
++ bank = simple_strtoul(argv[2], NULL, 16);
++ row = simple_strtoul(argv[3], NULL, 16);
++
++ printf("Shadow read fuse at bank:%d row:%d\n", bank, row);
++ ret = imx_read_shadow_fuse(bank, row, 0);
++ }else if ((!strcmp(argv[1], "blow"))&&(argc == 5)) {
++ bank = simple_strtoul(argv[2], NULL, 16);
++ row = simple_strtoul(argv[3], NULL, 16);
++ value = simple_strtoul(argv[4], NULL, 16);
++
++ printf("Blowing fuse at bank:%d row:%d value:%d\n",
++ bank, row, value);
++ for (i = 0; i < 8; i++) {
++ if (((value >> i) & 0x1) == 0) {
++ continue;
++ }
++ if (imx_fuse_blow(bank, row, i) != 0) {
++ printf("fuse_blow(bank: %d, row: %d, bit:"
++ " %d failed\n", bank, row, i);
++ } else {
++ printf("fuse_blow(bank: %d, row: %d, bit:"
++ " %d successful\n", bank, row, i);
++ ret = 0;
++ }
++ }
++
++ /* read back fuse by shadow register if applicable */
++ ret |= imx_read_shadow_fuse(bank, row, 0);
++
++ }else if ((!strcmp(argv[1], "mac"))&&(argc == 2)) {
++ unsigned char mac[6];
++ ret = imx_mac_read(mac);
++
++ printf("%siMX mac_addr in fuse: %02X:%02X:%02X:%02X:%02X:%02X\n",
++ ret?"No ":"",
++ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
++ }else if ((!strcmp(argv[1], "mac"))&&(argc == 3)) {
++ unsigned char mac[6];
++ char *tmp, *end;
++
++ tmp = argv[2];
++ /* convert MAC from string to int */
++ for (i=0; i<6; i++) {
++ mac[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
++ if (tmp)
++ tmp = (*end) ? end+1 : end;
++ }
++
++ ret = imx_mac_blow(mac);
++ if (ret) {
++ printf("Failed to blow mac_addr in fuse: "
++ "%02X:%02X:%02X:%02X:%02X:%02X\n",
++ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
++ } else {
++ imx_mac_read(mac);
++ printf("Mac_addr blowed in fuse: "
++ "%02X:%02X:%02X:%02X:%02X:%02X\n",
++ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
++ }
++ }else if ((!strcmp(argv[1], "suid"))&&(argc == 2)) {
++
++ printf("iMX SUID: ");
++ for (i=0;i<6;i++) {
++ printf("%02x", readl((long*)IIM_BANK_REG(1,(IIM1_SUID+i))));
++ }
++ printf("\n");
++ ret = 0;
++ }else if ((!strcmp(argv[1], "scc_key"))&&(argc == 2)) {
++
++ printf("iMX SCC_KEY: ");
++ for (i=0;i<21;i++) {
++ printf("%02x", readl((long*)IIM_BANK_REG(0,(IIM0_SCC_KEY+i))));
++ }
++ printf("\n");
++ ret = 0;
++ } else { printf("arc:%d\n", argc);
++ printf("Usage:\n%s\n", cmdtp->usage);
++ return 1;
++ }
++
++ return ret;
++}
++
++U_BOOT_CMD(imxfuse, 5, 0, do_imx_fuse,
++ "imxfuse - Read/Blow some iMX fuses\n",\
++ "sense <bank> <row> - sense read iMX fuses at <bank>/<row>\n" \
++ "imxfuse read <bank> <row> - shadow read iMX fuses at <bank>/<row>\n" \
++ "imxfuse blow <bank> <row> <value> - blow <value> at <bank>/<row>\n"\
++ " - Read/Blow 8 bits <Value> for some iMX fuses at <bank>/<row>\n"\
++ "imxfuse mac [<mac_addr>] - read/blow <mac_addr> in iMX fuses\n"\
++ "imxfuse suid - read iMX SUID\n"\
++ "imxfuse scc_key - read iMX SCC_KEY\n");
++
++#endif /* CONFIG_CMD_IMX_FUSE */
+--- ref/u-boot-1.3.4/cpu/arm926ejs/mx27/i2c.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot-1.3.4/cpu/arm926ejs/mx27/i2c.c 2008-12-29 16:27:49.000000000 +0100
+@@ -0,0 +1,407 @@
++/*
++ * Eric Jarrige <jo...@us...>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ *
++ */
++
++#include <common.h>
++
++#ifdef CONFIG_HARD_I2C
++
++#include <asm/io.h>
++#include <asm/arch/clock.h>
++#include <asm/arch/imx-regs.h>
++#include <i2c.h>
++#include "i2c.h"
++
++/*#define DEBUG_I2C*/
++
++/* current active I2C bus */
++static unsigned int bus_num = 0;
++
++static int hclk_dividers[] = {
++ 30, 32, 36, 42, 48, 52, 60, 72,
++ 80, 88, 104, 128, 144, 160, 192, 240,
++ 288, 320, 384, 480, 576, 640, 768, 960,
++ 1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840,
++ 22, 24, 26, 26, 32, 36, 40, 44,
++ 48, 56, 64, 72, 80, 96, 112, 128,
++ 160, 192, 224, 256, 320, 384, 448, 512,
++ 640, 768, 896, 1024, 1280, 1536, 1792, 2048
++};
++
++unsigned long i2c_bases[] = {IMX_I2C1_BASE, IMX_I2C2_BASE};
++
++extern void imx_gpio_mode (int gpio_mode);
++
++/*-----------------------------------------------------------------------
++ * Definitions
++ */
++
++#define I2C_ACK 0 /* level to ack a byte */
++#define I2C_NOACK 1 /* level to noack a byte */
++
++
++#ifdef DEBUG_I2C
++#define PRINTD(fmt,args...) do { \
++ DECLARE_GLOBAL_DATA_PTR; \
++ if (gd->have_console) \
++ printf (fmt ,##args); \
++ } while (0)
++#else
++#define PRINTD(fmt,args...)
++#endif
++
++/*---...
[truncated message content] |
|
From: Fabien M <fa...@us...> - 2010-04-12 12:46:31
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via bd04f667a89b3cce44d655f80a1c06ac4b5ed7ac (commit)
from fa36febaac9894dd49fe3ff7fc6425a6b8378489 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit bd04f667a89b3cce44d655f80a1c06ac4b5ed7ac
Author: Fabien Marteau <fab...@ar...>
Date: Mon Apr 12 14:45:48 2010 +0200
[linux] Adding lan9500A in smsc95xx driver
-----------------------------------------------------------------------
Summary of changes:
...ctivates_led_outputs_and_adding_lan9500A.patch} | 17 ++++++++++-------
1 files changed, 10 insertions(+), 7 deletions(-)
rename buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/{346-smsc-lan95xx-activates_led_outputs.patch => 346-smsc-lan95xx-activates_led_outputs_and_adding_lan9500A.patch} (89%)
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs_and_adding_lan9500A.patch
similarity index 89%
rename from buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch
rename to buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs_and_adding_lan9500A.patch
index e2e5eca..d8041b6 100644
--- a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs_and_adding_lan9500A.patch
@@ -20,7 +20,7 @@ Signed-off-by: David S. Miller <da...@da...>
Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.c
===================================================================
--- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.c 2009-03-24 00:12:14.000000000 +0100
-+++ linux-2.6.29.6/drivers/net/usb/smsc95xx.c 2010-04-09 18:53:56.000000000 +0200
++++ linux-2.6.29.6/drivers/net/usb/smsc95xx.c 2010-04-12 14:42:46.000000000 +0200
@@ -945,6 +945,18 @@
if (netif_msg_ifup(dev))
devdbg(dev, "ID_REV = 0x%08x", read_buf);
@@ -40,15 +40,18 @@ Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.c
/* Init Tx */
write_buf = 0;
ret = smsc95xx_write_reg(dev, FLOW, write_buf);
-@@ -1221,7 +1233,7 @@
- static const struct usb_device_id products[] = {
- {
- /* SMSC9500 USB Ethernet Device */
-- USB_DEVICE(0x0424, 0x9500),
-+ USB_DEVICE(0x0424, 0x9e00),
+@@ -1224,6 +1236,11 @@
+ USB_DEVICE(0x0424, 0x9500),
.driver_info = (unsigned long) &smsc95xx_info,
},
++ {
++ /* SMSC9500A USB Ethernet Device */
++ USB_DEVICE(0x0424, 0x9E00),
++ .driver_info = (unsigned long) &smsc95xx_info,
++ },
{ }, /* END */
+ };
+ MODULE_DEVICE_TABLE(usb, products);
Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.h
===================================================================
--- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.h 2009-03-24 00:12:14.000000000 +0100
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2010-04-09 16:57:25
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via fa36febaac9894dd49fe3ff7fc6425a6b8378489 (commit)
from b8bbe5906f1048f5e3ffe1be48f836194dce94e3 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit fa36febaac9894dd49fe3ff7fc6425a6b8378489
Author: Fabien Marteau <fab...@ar...>
Date: Fri Apr 9 18:57:04 2010 +0200
[linux] Fix smsc95xx led output
-----------------------------------------------------------------------
Summary of changes:
.../346-smsc-lan95xx-activates_led_outputs.patch | 43 +++++++++++++-------
1 files changed, 28 insertions(+), 15 deletions(-)
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch
index f7aa8c0..e2e5eca 100644
--- a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/346-smsc-lan95xx-activates_led_outputs.patch
@@ -17,17 +17,19 @@ Signed-off-by: David S. Miller <da...@da...>
drivers/net/usb/smsc95xx.h | 3 +++
2 files changed, 13 insertions(+), 0 deletions(-)
-diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c
-index dc16653..0fd68a5 100644
---- a/drivers/net/usb/smsc95xx.c
-+++ b/drivers/net/usb/smsc95xx.c
-@@ -941,6 +941,16 @@ static int smsc95xx_reset(struct usbnet *dev)
+Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.c
+===================================================================
+--- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.c 2009-03-24 00:12:14.000000000 +0100
++++ linux-2.6.29.6/drivers/net/usb/smsc95xx.c 2010-04-09 18:53:56.000000000 +0200
+@@ -945,6 +945,18 @@
if (netif_msg_ifup(dev))
devdbg(dev, "ID_REV = 0x%08x", read_buf);
+ /* Configure GPIO pins as LED outputs */
-+ write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
-+ LED_GPIO_CFG_FDX_LED;
++ write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_SPD_POL |
++ LED_GPIO_CFG_LNK_LED | LED_GPIO_CFG_LNK_POL |
++ LED_GPIO_CFG_FDX_LED | LED_GPIO_CFG_FDX_POL |
++ LED_GPIO_CFG_LED_SEL;
+ ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
+ if (ret < 0) {
+ devwarn(dev, "Failed to write LED_GPIO_CFG register, ret=%d",
@@ -38,20 +40,31 @@ index dc16653..0fd68a5 100644
/* Init Tx */
write_buf = 0;
ret = smsc95xx_write_reg(dev, FLOW, write_buf);
-diff --git a/drivers/net/usb/smsc95xx.h b/drivers/net/usb/smsc95xx.h
-index 66b5c84..86bc449 100644
---- a/drivers/net/usb/smsc95xx.h
-+++ b/drivers/net/usb/smsc95xx.h
-@@ -99,6 +99,9 @@
+@@ -1221,7 +1233,7 @@
+ static const struct usb_device_id products[] = {
+ {
+ /* SMSC9500 USB Ethernet Device */
+- USB_DEVICE(0x0424, 0x9500),
++ USB_DEVICE(0x0424, 0x9e00),
+ .driver_info = (unsigned long) &smsc95xx_info,
+ },
+ { }, /* END */
+Index: linux-2.6.29.6/drivers/net/usb/smsc95xx.h
+===================================================================
+--- linux-2.6.29.6.orig/drivers/net/usb/smsc95xx.h 2009-03-24 00:12:14.000000000 +0100
++++ linux-2.6.29.6/drivers/net/usb/smsc95xx.h 2010-04-09 18:55:34.000000000 +0200
+@@ -99,6 +99,14 @@
#define PM_CTL_WUPS_MULTI_ (0x00000003)
#define LED_GPIO_CFG (0x24)
++#define LED_GPIO_CFG_LED_SEL (0x80000000)
+#define LED_GPIO_CFG_SPD_LED (0x01000000)
+#define LED_GPIO_CFG_LNK_LED (0x00100000)
+#define LED_GPIO_CFG_FDX_LED (0x00010000)
++
++#define LED_GPIO_CFG_SPD_POL (0x00000004)
++#define LED_GPIO_CFG_LNK_POL (0x00000002)
++#define LED_GPIO_CFG_FDX_POL (0x00000001)
#define GPIO_CFG (0x28)
---
-1.6.6
-
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2010-04-09 12:24:27
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via b8bbe5906f1048f5e3ffe1be48f836194dce94e3 (commit)
from 63a2bc12c36b4e546aeb52293b652de0b09cb738 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit b8bbe5906f1048f5e3ffe1be48f836194dce94e3
Author: Fabien Marteau <fab...@ar...>
Date: Fri Apr 9 14:23:54 2010 +0200
[linux] Suppress i2c debuging messages from i2c-mxc.c
-----------------------------------------------------------------------
Summary of changes:
.../2.6.29/292-apf27-armadeus-i2c-fix.patch | 53 +++++++++++++++++--
1 files changed, 47 insertions(+), 6 deletions(-)
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/292-apf27-armadeus-i2c-fix.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/292-apf27-armadeus-i2c-fix.patch
index 980b724..24d8d65 100644
--- a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/292-apf27-armadeus-i2c-fix.patch
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/292-apf27-armadeus-i2c-fix.patch
@@ -1,7 +1,7 @@
-Index: linux-2.6.29/drivers/i2c/busses/i2c-mxc.c
+Index: linux-2.6.29.6/drivers/i2c/busses/i2c-mxc.c
===================================================================
---- linux-2.6.29.orig/drivers/i2c/busses/i2c-mxc.c 2009-04-02 13:31:21.000000000 +0200
-+++ linux-2.6.29/drivers/i2c/busses/i2c-mxc.c 2009-04-02 13:39:00.000000000 +0200
+--- linux-2.6.29.6.orig/drivers/i2c/busses/i2c-mxc.c 2010-04-09 14:11:51.000000000 +0200
++++ linux-2.6.29.6/drivers/i2c/busses/i2c-mxc.c 2010-04-09 14:20:50.000000000 +0200
@@ -30,6 +30,7 @@
#include <linux/clk.h>
#include <asm/irq.h>
@@ -10,7 +10,17 @@ Index: linux-2.6.29/drivers/i2c/busses/i2c-mxc.c
#include <mach/clock.h>
#include <mach/imx_i2c.h>
-@@ -115,7 +116,7 @@
+@@ -100,7 +101,9 @@
+ unsigned int sr = readw(dev->membase + MXC_I2SR);
+ if ((sr & MXC_I2SR_IBB) == 0) break;
+ if (retry-- <= 0) {
++#ifdef I2C_DEBUG
+ printk(KERN_DEBUG "Bus busy\n");
++#endif
+ break;
+ }
+ udelay(3);
+@@ -115,7 +118,7 @@
*/
static int imx_i2c_wait_for_tc(imx_i2c_device * dev, int trans_flag)
{
@@ -19,7 +29,7 @@ Index: linux-2.6.29/drivers/i2c/busses/i2c-mxc.c
while (retry-- && !transfer_done) {
wait_event_interruptible_timeout(dev->wq,
-@@ -125,15 +126,13 @@
+@@ -125,15 +128,17 @@
transfer_done = false;
if (retry <= 0) {
@@ -30,16 +40,47 @@ Index: linux-2.6.29/drivers/i2c/busses/i2c-mxc.c
if (!tx_success) {
- /* An ACK was not received for transmitted byte */
+ /* An ACK was not received */
++#ifdef I2C_DEBUG
printk(KERN_DEBUG "ACK not received \n");
- return -1;
++#endif
}
+ /* Unable to send data */
++#ifdef I2C_DEBUG
+ printk(KERN_DEBUG "Data not transmitted\n");
++#endif
+ return -1;
}
return 0;
-@@ -441,10 +440,15 @@
+@@ -167,7 +172,9 @@
+ sr = readw(dev->membase + MXC_I2SR);
+ }
+ if (retry <= 0) {
++#ifdef I2C_DEBUG
+ printk(KERN_DEBUG "Could not grab Bus ownership\n");
++#endif
+ }
+
+ /* Set the Transmit bit */
+@@ -335,7 +342,9 @@
+ /* Check bus state */
+ if (sr & MXC_I2SR_IBB) {
+ imx_i2c_module_dis(dev);
++#ifdef I2C_DEBUG
+ printk(KERN_DEBUG "Bus busy\n");
++#endif
+ return -EREMOTEIO;
+ }
+
+@@ -436,15 +445,22 @@
+ writew(0x0, dev->membase + MXC_I2SR);
+
+ if (sr & MXC_I2SR_IAL) {
++#ifdef I2C_DEBUG
+ printk(KERN_DEBUG "Bus Arbitration lost\n");
++#endif
+ } else {
/* Interrupt due byte transfer completion */
tx_success = false;
/* Check if RXAK is received in Transmit mode */
hooks/post-receive
--
armadeus
|
|
From: Julien B a. A. <ar...@us...> - 2010-04-07 13:28:05
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 63a2bc12c36b4e546aeb52293b652de0b09cb738 (commit)
from f0fb346f8781f0cd9df0d97c2885937ae628b52b (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 63a2bc12c36b4e546aeb52293b652de0b09cb738
Author: Julien Boibessot <jul...@ar...>
Date: Wed Apr 7 15:27:22 2010 +0200
[BUILDROOT] Convert toolchain makefiles to DOWNLOAD helper (uClibc 0.9.29 archive moved)
-----------------------------------------------------------------------
Summary of changes:
.../104-toolchain-convert_to_DOWNLOAD_helper.patch | 107 ++++++++++++++++++++
1 files changed, 107 insertions(+), 0 deletions(-)
create mode 100644 patches/buildroot/104-toolchain-convert_to_DOWNLOAD_helper.patch
diff --git a/patches/buildroot/104-toolchain-convert_to_DOWNLOAD_helper.patch b/patches/buildroot/104-toolchain-convert_to_DOWNLOAD_helper.patch
new file mode 100644
index 0000000..ff50b60
--- /dev/null
+++ b/patches/buildroot/104-toolchain-convert_to_DOWNLOAD_helper.patch
@@ -0,0 +1,107 @@
+From 0ef35d5d5efed2d323c1fc7a3f2cc7b1ed977da3 Mon Sep 17 00:00:00 2001
+From: Peter Korsgaard <ja...@su...>
+Date: Fri, 16 Jan 2009 11:47:05 +0000
+Subject: toolchain/: convert to DOWNLOAD helper
+
+---
+diff --git a/toolchain/binutils/binutils.mk b/toolchain/binutils/binutils.mk
+index a9ec7d3..c285c6a 100644
+--- a/toolchain/binutils/binutils.mk
++++ b/toolchain/binutils/binutils.mk
+@@ -81,7 +81,7 @@ BINUTILS_DIR1:=$(TOOL_BUILD_DIR)/binutils-$(BINUTILS_VERSION)-build
+
+ $(DL_DIR)/$(BINUTILS_SOURCE):
+ mkdir -p $(DL_DIR)
+- $(WGET) -P $(DL_DIR) $(BINUTILS_SITE)/$(BINUTILS_SOURCE)
++ $(call DOWNLOAD,$(BINUTILS_SITE),$(BINUTILS_SOURCE))
+
+ binutils-unpacked: $(BINUTILS_DIR)/.patched
+ $(BINUTILS_DIR)/.unpacked: $(DL_DIR)/$(BINUTILS_SOURCE)
+diff --git a/toolchain/ccache/ccache.mk b/toolchain/ccache/ccache.mk
+index d34bfb3..723b871 100644
+--- a/toolchain/ccache/ccache.mk
++++ b/toolchain/ccache/ccache.mk
+@@ -13,7 +13,7 @@ CCACHE_BINARY:=ccache
+ CCACHE_TARGET_BINARY:=usr/bin/ccache
+
+ $(DL_DIR)/$(CCACHE_SOURCE):
+- $(WGET) -P $(DL_DIR) $(CCACHE_SITE)/$(CCACHE_SOURCE)
++ $(call DOWNLOAD,$(CCACHE_SITE),$(CCACHE_SOURCE))
+
+ $(CCACHE_DIR1)/.unpacked: $(DL_DIR)/$(CCACHE_SOURCE)
+ $(CCACHE_CAT) $(DL_DIR)/$(CCACHE_SOURCE) | tar -C $(TOOL_BUILD_DIR) $(TAR_OPTIONS) -
+diff --git a/toolchain/gcc/gcc-uclibc-3.x.mk b/toolchain/gcc/gcc-uclibc-3.x.mk
+index 3f1a3ca..fc59b6b 100644
+--- a/toolchain/gcc/gcc-uclibc-3.x.mk
++++ b/toolchain/gcc/gcc-uclibc-3.x.mk
+@@ -138,7 +138,7 @@ GCC_BUILD_DIR1:=$(TOOL_BUILD_DIR)/gcc-$(GCC_VERSION)-initial
+
+ $(DL_DIR)/$(GCC_SOURCE):
+ mkdir -p $(DL_DIR)
+- $(WGET) -P $(DL_DIR) $(GCC_SITE)/$(GCC_SOURCE)
++ $(call DOWNLOAD,$(GCC_SITE),$(GCC_SOURCE))
+
+ gcc-unpacked: $(GCC_DIR)/.patched
+ $(GCC_DIR)/.unpacked: $(DL_DIR)/$(GCC_SOURCE)
+diff --git a/toolchain/gcc/gcc-uclibc-4.x.mk b/toolchain/gcc/gcc-uclibc-4.x.mk
+index 793e368..88878a8 100644
+--- a/toolchain/gcc/gcc-uclibc-4.x.mk
++++ b/toolchain/gcc/gcc-uclibc-4.x.mk
+@@ -149,7 +149,7 @@ HOST_SOURCE+=gcc-source
+
+ $(DL_DIR)/$(GCC_SOURCE):
+ mkdir -p $(DL_DIR)
+- $(WGET) -P $(DL_DIR) $(GCC_SITE)/$(GCC_SOURCE)
++ $(call DOWNLOAD,$(GCC_SITE),$(GCC_SOURCE))
+
+ gcc-unpacked: $(GCC_DIR)/.patched
+ $(GCC_DIR)/.unpacked: $(DL_DIR)/$(GCC_SOURCE)
+diff --git a/toolchain/gdb/gdb.mk b/toolchain/gdb/gdb.mk
+index f239dba..6e46c0b 100644
+--- a/toolchain/gdb/gdb.mk
++++ b/toolchain/gdb/gdb.mk
+@@ -46,7 +46,7 @@ endif
+ endif
+
+ $(DL_DIR)/$(GDB_SOURCE):
+- $(WGET) -P $(DL_DIR) $(GDB_SITE)/$(GDB_SOURCE)
++ $(call DOWNLOAD,$(GDB_SITE),$(GDB_SOURCE))
+
+ gdb-unpacked: $(GDB_DIR)/.unpacked
+ $(GDB_DIR)/.unpacked: $(DL_DIR)/$(GDB_SOURCE)
+diff --git a/toolchain/kernel-headers/kernel-headers.mk b/toolchain/kernel-headers/kernel-headers.mk
+index 50326c6..dd81555 100644
+--- a/toolchain/kernel-headers/kernel-headers.mk
++++ b/toolchain/kernel-headers/kernel-headers.mk
+@@ -32,7 +32,7 @@ include toolchain/kernel-headers/kernel-headers-new.makefile
+ include toolchain/kernel-headers/kernel-headers-old.makefile
+
+ $(DL_DIR)/$(LINUX_HEADERS_SOURCE):
+- $(WGET) -P $(DL_DIR) $(LINUX_HEADERS_SITE)/$(LINUX_HEADERS_SOURCE)
++ $(call DOWNLOAD,$(LINUX_HEADERS_SITE),$(LINUX_HEADERS_SOURCE))
+
+ kernel-headers: $(LINUX_HEADERS_DIR)/.configured
+
+diff --git a/toolchain/uClibc/uclibc.mk b/toolchain/uClibc/uclibc.mk
+index af35e33..b595b22 100644
+--- a/toolchain/uClibc/uclibc.mk
++++ b/toolchain/uClibc/uclibc.mk
+@@ -91,14 +91,14 @@ UCLIBC_SPARC_TYPE:=CONFIG_SPARC_$(strip $(subst ",, $(BR2_SPARC_TYPE)))
+ #"))
+
+ $(DL_DIR)/$(UCLIBC_SOURCE):
+- $(WGET) -P $(DL_DIR) $(UCLIBC_SITE)/$(UCLIBC_SOURCE)
++ $(call DOWNLOAD,$(UCLIBC_SITE),$(UCLIBC_SOURCE))
+
+ ifneq ($(BR2_ENABLE_LOCALE),)
+ UCLIBC_SITE_LOCALE:=http://www.uclibc.org/downloads
+ UCLIBC_SOURCE_LOCALE:=uClibc-locale-030818.tgz
+
+ $(DL_DIR)/$(UCLIBC_SOURCE_LOCALE):
+- $(WGET) -P $(DL_DIR) $(UCLIBC_SITE_LOCALE)/$(UCLIBC_SOURCE_LOCALE)
++ $(call DOWNLOAD,$(UCLIBC_SITE_LOCALE),$(UCLIBC_SOURCE_LOCALE))
+
+ UCLIBC_LOCALE_DATA:=$(DL_DIR)/$(UCLIBC_SOURCE_LOCALE)
+ else
+--
+cgit v0.8.2.1
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2010-04-05 13:49:46
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via f0fb346f8781f0cd9df0d97c2885937ae628b52b (commit)
from 5a7e266ff75a4e7fc99b2ba565c2db7342eb2cb6 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f0fb346f8781f0cd9df0d97c2885937ae628b52b
Author: jorasse <jorasse@ubuntu.(none)>
Date: Mon Apr 5 06:49:10 2010 -0700
Fixed default uboot configuration with regular buildroot release
-----------------------------------------------------------------------
Summary of changes:
.../target/device/armadeus/apf27/apf27_defconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/buildroot/target/device/armadeus/apf27/apf27_defconfig b/buildroot/target/device/armadeus/apf27/apf27_defconfig
index bbc6a84..02805ee 100644
--- a/buildroot/target/device/armadeus/apf27/apf27_defconfig
+++ b/buildroot/target/device/armadeus/apf27/apf27_defconfig
@@ -772,7 +772,7 @@ BR2_TARGET_ROOTFS_TAR_COPYTO=""
#
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-uboot-$(BR2_UBOOT_VERSION).h"
+BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME).h"
BR2_TARGET_UBOOT_CUSTOM_PATCH=""
BR2_TARGET_UBOOT_SERVERIP=""
BR2_TARGET_UBOOT_IPADDR=""
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2010-04-01 08:31:37
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 5a7e266ff75a4e7fc99b2ba565c2db7342eb2cb6 (commit)
via b95b36b2438cee8601d0f67dd839175c45f23e89 (commit)
from 9f82a44fded13f6391e9bbdb1cc99c7f66550488 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 5a7e266ff75a4e7fc99b2ba565c2db7342eb2cb6
Merge: b95b36b2438cee8601d0f67dd839175c45f23e89 9f82a44fded13f6391e9bbdb1cc99c7f66550488
Author: Fabien Marteau <fab...@ar...>
Date: Thu Apr 1 10:31:05 2010 +0200
Merge branch 'master' of ssh://fabm@armadeus.git.sourceforge.net/gitroot/armadeus/armadeus
commit b95b36b2438cee8601d0f67dd839175c45f23e89
Author: Fabien Marteau <fab...@ar...>
Date: Thu Apr 1 10:30:11 2010 +0200
[linux] Correcting comments in loadgpio.sh
-----------------------------------------------------------------------
Summary of changes:
target/linux/modules/gpio/loadgpio.sh | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/linux/modules/gpio/loadgpio.sh b/target/linux/modules/gpio/loadgpio.sh
index c644d8b..1c13b89 100755
--- a/target/linux/modules/gpio/loadgpio.sh
+++ b/target/linux/modules/gpio/loadgpio.sh
@@ -73,15 +73,15 @@ fi
if [ "$BOARD" == "APF27" ]; then
# PortA[0-31]
create_dev A 0 31 0
- # PortB[8-31]
+ # PortB[0-31]
create_dev B 0 31 32
- # PortC[3-17]
+ # PortC[5-31]
create_dev C 5 31 64
- # PortD[6-31]
+ # PortD[16-31]
create_dev D 16 31 96
- # PortE[6-31]
+ # PortE[3-23]
create_dev E 3 23 128
- # PortF[6-31]
+ # PortF[7-22]
create_dev F 7 22 160
echo
fi
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2010-03-31 22:07:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 9f82a44fded13f6391e9bbdb1cc99c7f66550488 (commit)
via 4cb26be15d5fc17004be085812ca989d93ec1b8b (commit)
via 49c2732d272dedfd122f32df3792347b4a0a459e (commit)
from 6bf1b10aa3043eac861515ed39b4990e2e7e4446 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 9f82a44fded13f6391e9bbdb1cc99c7f66550488
Author: jorasse <jo...@ar...>
Date: Thu Apr 1 00:01:47 2010 +0200
[UBoot] Fixed file naming convention
commit 4cb26be15d5fc17004be085812ca989d93ec1b8b
Merge: 49c2732d272dedfd122f32df3792347b4a0a459e 6bf1b10aa3043eac861515ed39b4990e2e7e4446
Author: jorasse <jo...@ar...>
Date: Wed Mar 31 23:56:13 2010 +0200
Merge branch 'master' of ssh://jorasse@armadeus.git.sourceforge.net/gitroot/armadeus/armadeus
commit 49c2732d272dedfd122f32df3792347b4a0a459e
Author: jorasse <jo...@ar...>
Date: Wed Mar 31 23:55:11 2010 +0200
[UBoot] Changed default U-Boot name of config file to support multiple U-Boot versions
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/apf27_defconfig | 2 +-
buildroot/configs/apf9328_defconfig | 2 +-
.../051i-u-boot-multi-version-support.patch | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/buildroot/configs/apf27_defconfig b/buildroot/configs/apf27_defconfig
index 0e60d9c..791ebfc 100644
--- a/buildroot/configs/apf27_defconfig
+++ b/buildroot/configs/apf27_defconfig
@@ -790,7 +790,7 @@ BR2_TARGET_ROOTFS_TAR_COPYTO=""
#
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME).h"
+BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-$(BR2_UBOOT_VERSION).h"
BR2_TARGET_UBOOT_1_3_4=y
# BR2_TARGET_UBOOT_2010_03 is not set
# BR2_TARGET_UBOOT_2009_11 is not set
diff --git a/buildroot/configs/apf9328_defconfig b/buildroot/configs/apf9328_defconfig
index ca65e62..ca426bd 100644
--- a/buildroot/configs/apf9328_defconfig
+++ b/buildroot/configs/apf9328_defconfig
@@ -786,7 +786,7 @@ BR2_TARGET_ROOTFS_TAR_COPYTO=""
#
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME).h"
+BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-$(BR2_UBOOT_VERSION).h"
BR2_TARGET_UBOOT_1_3_4=y
# BR2_TARGET_UBOOT_2010_03 is not set
# BR2_TARGET_UBOOT_2009_11 is not set
diff --git a/patches/buildroot/2010.02/051i-u-boot-multi-version-support.patch b/patches/buildroot/2010.02/051i-u-boot-multi-version-support.patch
index d4b3640..6973c6d 100644
--- a/patches/buildroot/2010.02/051i-u-boot-multi-version-support.patch
+++ b/patches/buildroot/2010.02/051i-u-boot-multi-version-support.patch
@@ -5,7 +5,7 @@
config BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE
string "U-Boot header file"
- default "$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME).h"
-+ default "$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-uboot-$(BR2_UBOOT_VERSION).h"
++ default "$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-$(BR2_UBOOT_VERSION).h"
help
U-Boot config header file to use to build U-Boot for your target.
Mainly for people using boards not (yet) integrated in U-Boot's
hooks/post-receive
--
armadeus
|
|
From: Julien B a. A. <ar...@us...> - 2010-03-31 12:04:54
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 6bf1b10aa3043eac861515ed39b4990e2e7e4446 (commit)
from 7550b63aa773a6edf09e2ee78f77454814f71b2f (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 6bf1b10aa3043eac861515ed39b4990e2e7e4446
Author: Julien Boibessot <jul...@ar...>
Date: Wed Mar 31 14:03:27 2010 +0200
[DEMOS] Add a small app to test V4L2 compatible cameras (capture images and display them on LCD)
-----------------------------------------------------------------------
Summary of changes:
target/demos/camera/capture/Makefile | 34 ++
target/demos/camera/capture/capture.c | 853 +++++++++++++++++++++++++++++++++
2 files changed, 887 insertions(+), 0 deletions(-)
create mode 100644 target/demos/camera/capture/Makefile
create mode 100644 target/demos/camera/capture/capture.c
diff --git a/target/demos/camera/capture/Makefile b/target/demos/camera/capture/Makefile
new file mode 100644
index 0000000..7cd81a8
--- /dev/null
+++ b/target/demos/camera/capture/Makefile
@@ -0,0 +1,34 @@
+CFLAGS=-Wall
+LDFLAGS= -lSDL
+ifeq ($(PREFIX),)
+# Host
+CC=gcc
+CFLAGS+= -O2
+else
+# APF
+CC=${PREFIX}/usr/bin/arm-linux-uclibc-gcc
+CFLAGS+= -Os
+INSTALL_DIR=/tftpboot
+endif
+
+EXEC=capture
+SRC= $(wildcard *.c *.h)
+OBJ= $(SRC:.c=.o)
+
+all: $(EXEC)
+
+$(EXEC): $(OBJ)
+ $(CC) -o $@ $^ $(LDFLAGS)
+
+%.o: %.c
+ $(CC) -o $@ -c $< $(CFLAGS)
+
+.PHONY: clean install
+
+clean:
+ rm -rf *.o
+ rm -f $(EXEC)
+
+install: all
+ cp -f $(EXEC) $(INSTALL_DIR)
+
diff --git a/target/demos/camera/capture/capture.c b/target/demos/camera/capture/capture.c
new file mode 100644
index 0000000..9de29df
--- /dev/null
+++ b/target/demos/camera/capture/capture.c
@@ -0,0 +1,853 @@
+/*
+ * Armadeus V4L2/SDL video capture example
+ *
+ * Inspired a lot from:
+ * - http://www.linuxtv.org/downloads/video4linux/API/V4L2_API/v4l2spec/capture.c
+ * - http://freshmeat.net/projects/libv4l
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#include <getopt.h> /* getopt_long() */
+#include <fcntl.h> /* low-level i/o */
+#include <unistd.h>
+#include <errno.h>
+#include <malloc.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <sys/time.h>
+#include <sys/mman.h>
+#include <sys/ioctl.h>
+#include <asm/types.h> /* for videodev2.h */
+
+#include <linux/videodev2.h>
+#include <SDL/SDL.h> /* TODO: make it compatible with Framebuffer only */
+
+
+#define CLEAR(x) memset (&(x), 0, sizeof (x))
+
+#define SCREEN_WIDTH 480
+#define SCREEN_HEIGHT 272
+
+#define CAM_WIDTH 320
+#define CAM_HEIGHT 240
+
+typedef enum {
+ IO_METHOD_READ,
+ IO_METHOD_MMAP,
+ IO_METHOD_USERPTR,
+} io_method;
+
+struct buffer {
+ void * start;
+ size_t length;
+};
+
+static char * dev_name = NULL;
+static io_method io = IO_METHOD_MMAP;
+static int fd = -1;
+struct buffer * buffers = NULL;
+static unsigned int n_buffers = 0;
+
+SDL_Surface *screen = NULL, *image = NULL;
+
+struct camera {
+ unsigned int width;
+ unsigned int height;
+ unsigned int pixelformat;
+ unsigned int bytesperline;
+ unsigned int sizeimage;
+};
+
+struct camera mycamera;
+
+
+static void errno_exit(const char *s)
+{
+ fprintf (stderr, "%s error %d, %s\n",
+ s, errno, strerror (errno));
+
+ exit (EXIT_FAILURE);
+}
+
+static int xioctl(int fd, int request, void *arg)
+{
+ int r;
+
+ do r = ioctl (fd, request, arg);
+ while (-1 == r && EINTR == errno);
+
+ return r;
+}
+
+static Uint16 inline yuv2rgb(int Y, int U, int V)
+{
+ int R, G, B;
+
+ R = Y + 1.4026 * (V-128);
+ G = Y - 0.3444 * (U-128) - 0.7144 * (V-128);
+ B = Y + 1.7730 * (U-128);
+
+ if (R > 255) R = 255;
+ if (G > 255) G = 255;
+ if (B > 255) B = 255;
+ if (R < 0) R = 0;
+ if (G < 0) G = 0;
+ if (B < 0) B = 0;
+
+ return ((R>>3) << 11) | ((G>>2) << 5) | (B>>3);
+}
+
+#define STRIP(X) (X = X > 255 ? 255 : (X < 0) ? 0 : X)
+
+static Uint8 inline YUV2R(int Y, int U, int V)
+{
+ int R;
+
+ R = Y + 1.4026 * (V-128);
+ STRIP(R);
+
+ return R;
+}
+
+static Uint8 inline YUV2G(int Y, int U, int V)
+{
+ int G;
+
+ G = Y - 0.3444 * (U-128) - 0.7144 * (V-128);
+ STRIP(G);
+
+ return G;
+}
+
+static Uint16 inline YUV2B(int Y, int U, int V)
+{
+ int B;
+
+ B = Y + 1.7730 * (U-128);
+ STRIP(B);
+
+ return B;
+}
+
+static void yuv422_to_rgb565(void *yuv, int size, void *rgb)
+{
+ unsigned int Y, Y2, U, V, yuv32, rgb32;
+ int R, G, B;
+ int i;
+ Uint32 *dest = (Uint32*) rgb;
+ Uint32 *src = (Uint32*) yuv;
+
+ for (i=size/4; i; i--)
+ {
+ yuv32 = *(src++);
+
+ /* packed format */
+ Y = (yuv32 & 0x000000ff);
+ U = (yuv32 & 0x0000ff00) >> 8;
+ Y2 = (yuv32 & 0x00ff0000) >> 16;
+ V = (yuv32 & 0xff000000) >> 24;
+
+ R = YUV2R(Y, U, V);
+ G = YUV2G(Y, U, V);
+ B = YUV2B(Y, U, V);
+ rgb32 = ((R>>3) << 11) | ((G>>2) << 5) | (B>>3);
+// rgb32 = yuv2rgb(Y, U, V);
+
+ R = YUV2R(Y2, U, V);
+ G = YUV2G(Y2, U, V);
+ B = YUV2B(Y2, U, V);
+ rgb32 |= (((R>>3) << 11) | ((G>>2) << 5) | (B>>3)) << 16;
+// rgb32 |= yuv2rgb(Y2, U, V) << 16;
+
+ *(dest++) = rgb32;
+ }
+}
+
+/* Only grayscale conversion for the moment
+ As yuv420 is slightly complicated to decode it would be worth using libv4l
+*/
+static void yuv420_to_rgb565(void *yuv, int size, void *rgb)
+{
+ Uint8 yuv8;
+ int R, G, B;
+ int i;
+ int nbpix = mycamera.width * mycamera.height;
+ Uint16 *dest = (Uint16*) rgb;
+ Uint8 *src = (Uint8*) yuv;
+
+ nbpix = mycamera.width * mycamera.height;
+ for (i=nbpix; i; i--) {
+ yuv8 = *(src++);
+ R = G = B = yuv8;
+ *(dest++) = ((R>>3) << 11) | ((G>>2) << 5) | (B>>3);;
+ }
+}
+
+static void simple_copy(void *yuv, int size, void* rgb)
+{
+ memcpy(rgb, yuv, size);
+}
+
+static void process_image(/*const */void *pCaptured)
+{
+ SDL_Rect update_rec;
+
+ if (mycamera.pixelformat == V4L2_PIX_FMT_YUYV) {
+ yuv422_to_rgb565(pCaptured, mycamera.sizeimage, image->pixels);
+ } else if (mycamera.pixelformat == V4L2_PIX_FMT_YUV420) {
+ yuv420_to_rgb565(pCaptured, mycamera.sizeimage, image->pixels);
+ } else {
+ printf("Unknown image format\n");
+ simple_copy(pCaptured, mycamera.sizeimage, image->pixels);
+ }
+
+ /* Blit converted image on screen */
+ update_rec.x = 0;
+ update_rec.y = 0;
+ update_rec.w = mycamera.width;
+ update_rec.h = mycamera.height;
+ SDL_BlitSurface(image, NULL, screen, &update_rec);
+ SDL_Flip(screen);
+}
+
+static int read_frame(void)
+{
+ struct v4l2_buffer buf;
+ unsigned int i;
+
+ switch (io) {
+ case IO_METHOD_READ:
+ if (-1 == read (fd, buffers[0].start, buffers[0].length)) {
+ switch (errno) {
+ case EAGAIN:
+ return 0;
+
+ case EIO:
+ /* Could ignore EIO, see spec. */
+
+ /* fall through */
+
+ default:
+ errno_exit ("read");
+ }
+ }
+
+ process_image (buffers[0].start);
+
+ break;
+
+ case IO_METHOD_MMAP:
+ CLEAR (buf);
+
+ buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ buf.memory = V4L2_MEMORY_MMAP;
+
+ if (-1 == xioctl (fd, VIDIOC_DQBUF, &buf)) {
+ switch (errno) {
+ case EAGAIN:
+ return 0;
+
+ case EIO:
+ /* Could ignore EIO, see spec. */
+
+ /* fall through */
+
+ default:
+ errno_exit ("VIDIOC_DQBUF");
+ }
+ }
+
+ assert (buf.index < n_buffers);
+
+ process_image (buffers[buf.index].start);
+
+ if (-1 == xioctl (fd, VIDIOC_QBUF, &buf))
+ errno_exit ("VIDIOC_QBUF");
+
+ break;
+
+ case IO_METHOD_USERPTR:
+ CLEAR (buf);
+
+ buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ buf.memory = V4L2_MEMORY_USERPTR;
+
+ if (-1 == xioctl (fd, VIDIOC_DQBUF, &buf)) {
+ switch (errno) {
+ case EAGAIN:
+ return 0;
+
+ case EIO:
+ /* Could ignore EIO, see spec. */
+
+ /* fall through */
+
+ default:
+ errno_exit ("VIDIOC_DQBUF");
+ }
+ }
+
+ for (i = 0; i < n_buffers; ++i)
+ if (buf.m.userptr == (unsigned long) buffers[i].start
+ && buf.length == buffers[i].length)
+ break;
+
+ assert (i < n_buffers);
+
+ process_image ((void *) buf.m.userptr);
+
+ if (-1 == xioctl (fd, VIDIOC_QBUF, &buf))
+ errno_exit ("VIDIOC_QBUF");
+
+ break;
+ }
+
+ return 1;
+}
+
+static void mainloop(void)
+{
+ int go_on = 1;
+ SDL_Event event;
+
+ while (go_on) {
+ for (;;) {
+ fd_set fds;
+ struct timeval tv;
+ int r;
+
+ FD_ZERO (&fds);
+ FD_SET (fd, &fds);
+
+ /* Timeout. */
+ tv.tv_sec = 2;
+ tv.tv_usec = 0;
+
+ r = select(fd + 1, &fds, NULL, NULL, &tv);
+
+ if (-1 == r) {
+ if (EINTR == errno)
+ continue;
+
+ errno_exit ("select");
+ }
+
+ if (0 == r) {
+ fprintf (stderr, "select timeout\n");
+ exit (EXIT_FAILURE);
+ }
+
+ if (read_frame ())
+ break;
+
+ /* EAGAIN - continue select loop. */
+ }
+ while (SDL_PollEvent(&event)) {
+ switch (event.type)
+ {
+ case SDL_KEYDOWN:
+ case SDL_QUIT:
+ go_on = 0;
+ }
+ }
+// SDL_Delay(200);
+ }
+}
+
+static void stop_capturing(void)
+{
+ enum v4l2_buf_type type;
+
+ switch (io) {
+ case IO_METHOD_READ:
+ /* Nothing to do. */
+ break;
+
+ case IO_METHOD_MMAP:
+ case IO_METHOD_USERPTR:
+ type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+
+ if (-1 == xioctl (fd, VIDIOC_STREAMOFF, &type))
+ errno_exit ("VIDIOC_STREAMOFF");
+
+ break;
+ }
+}
+
+static void start_capturing(void)
+{
+ unsigned int i;
+ enum v4l2_buf_type type;
+
+ switch (io) {
+ case IO_METHOD_READ:
+ /* Nothing to do. */
+ break;
+
+ case IO_METHOD_MMAP:
+ for (i = 0; i < n_buffers; ++i) {
+ struct v4l2_buffer buf;
+
+ CLEAR (buf);
+
+ buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ buf.memory = V4L2_MEMORY_MMAP;
+ buf.index = i;
+
+ if (-1 == xioctl (fd, VIDIOC_QBUF, &buf))
+ errno_exit ("VIDIOC_QBUF");
+ }
+
+ type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+
+ if (-1 == xioctl (fd, VIDIOC_STREAMON, &type))
+ errno_exit ("VIDIOC_STREAMON");
+
+ break;
+
+ case IO_METHOD_USERPTR:
+ for (i = 0; i < n_buffers; ++i) {
+ struct v4l2_buffer buf;
+
+ CLEAR (buf);
+
+ buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ buf.memory = V4L2_MEMORY_USERPTR;
+ buf.index = i;
+ buf.m.userptr = (unsigned long) buffers[i].start;
+ buf.length = buffers[i].length;
+
+ if (-1 == xioctl (fd, VIDIOC_QBUF, &buf))
+ errno_exit ("VIDIOC_QBUF");
+ }
+
+ type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+
+ if (-1 == xioctl (fd, VIDIOC_STREAMON, &type))
+ errno_exit ("VIDIOC_STREAMON");
+
+ break;
+ }
+}
+
+static void uninit_device(void)
+{
+ unsigned int i;
+
+ switch (io) {
+ case IO_METHOD_READ:
+ free (buffers[0].start);
+ break;
+
+ case IO_METHOD_MMAP:
+ for (i = 0; i < n_buffers; ++i)
+ if (-1 == munmap (buffers[i].start, buffers[i].length))
+ errno_exit ("munmap");
+ break;
+
+ case IO_METHOD_USERPTR:
+ for (i = 0; i < n_buffers; ++i)
+ free (buffers[i].start);
+ break;
+ }
+
+ free (buffers);
+}
+
+static void init_read(unsigned int buffer_size)
+{
+ buffers = calloc (1, sizeof (*buffers));
+
+ if (!buffers) {
+ fprintf (stderr, "Out of memory\n");
+ exit (EXIT_FAILURE);
+ }
+
+ buffers[0].length = buffer_size;
+ buffers[0].start = malloc (buffer_size);
+
+ if (!buffers[0].start) {
+ fprintf (stderr, "Out of memory\n");
+ exit (EXIT_FAILURE);
+ }
+}
+
+static void init_mmap(void)
+{
+ struct v4l2_requestbuffers req;
+
+ CLEAR (req);
+
+ req.count = 4;
+ req.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ req.memory = V4L2_MEMORY_MMAP;
+
+ if (-1 == xioctl (fd, VIDIOC_REQBUFS, &req)) {
+ if (EINVAL == errno) {
+ fprintf (stderr, "%s does not support "
+ "memory mapping\n", dev_name);
+ exit (EXIT_FAILURE);
+ } else {
+ errno_exit ("VIDIOC_REQBUFS");
+ }
+ }
+
+ if (req.count < 2) {
+ fprintf (stderr, "Insufficient buffer memory on %s\n",
+ dev_name);
+ exit (EXIT_FAILURE);
+ }
+
+ buffers = calloc (req.count, sizeof (*buffers));
+
+ if (!buffers) {
+ fprintf (stderr, "Out of memory\n");
+ exit (EXIT_FAILURE);
+ }
+
+ for (n_buffers = 0; n_buffers < req.count; ++n_buffers) {
+ struct v4l2_buffer buf;
+
+ CLEAR (buf);
+
+ buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ buf.memory = V4L2_MEMORY_MMAP;
+ buf.index = n_buffers;
+
+ if (-1 == xioctl (fd, VIDIOC_QUERYBUF, &buf))
+ errno_exit ("VIDIOC_QUERYBUF");
+
+ buffers[n_buffers].length = buf.length;
+ buffers[n_buffers].start =
+ mmap (NULL /* start anywhere */,
+ buf.length,
+ PROT_READ | PROT_WRITE /* required */,
+ MAP_SHARED /* recommended */,
+ fd, buf.m.offset);
+
+ if (MAP_FAILED == buffers[n_buffers].start)
+ errno_exit ("mmap");
+ }
+}
+
+static void init_userp(unsigned int buffer_size)
+{
+ struct v4l2_requestbuffers req;
+ unsigned int page_size;
+
+ page_size = getpagesize ();
+ buffer_size = (buffer_size + page_size - 1) & ~(page_size - 1);
+
+ CLEAR (req);
+
+ req.count = 4;
+ req.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ req.memory = V4L2_MEMORY_USERPTR;
+
+ if (-1 == xioctl (fd, VIDIOC_REQBUFS, &req)) {
+ if (EINVAL == errno) {
+ fprintf (stderr, "%s does not support "
+ "user pointer i/o\n", dev_name);
+ exit(EXIT_FAILURE);
+ } else {
+ errno_exit("VIDIOC_REQBUFS");
+ }
+ }
+
+ buffers = calloc(4, sizeof (*buffers));
+
+ if (!buffers) {
+ fprintf (stderr, "Out of memory\n");
+ exit (EXIT_FAILURE);
+ }
+
+ for (n_buffers = 0; n_buffers < 4; ++n_buffers) {
+ buffers[n_buffers].length = buffer_size;
+ buffers[n_buffers].start = memalign (/* boundary */ page_size,
+ buffer_size);
+
+ if (!buffers[n_buffers].start) {
+ fprintf(stderr, "Out of memory\n");
+ exit(EXIT_FAILURE);
+ }
+ }
+}
+
+static Uint32 get_a_supported_pix_fmt(void)
+{
+ struct v4l2_fmtdesc fmtdesc;
+ int i;
+
+ for (i = 0;; i++) {
+ CLEAR(fmtdesc);
+ fmtdesc.index = i;
+ fmtdesc.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ if (-1 == ioctl(fd, VIDIOC_ENUM_FMT, &fmtdesc))
+ break;
+
+ if ((fmtdesc.pixelformat == V4L2_PIX_FMT_YUYV) || (fmtdesc.pixelformat == V4L2_PIX_FMT_YUV420)) {
+ fprintf(stdout, "Using img format (%d 0x%08x): ", i, fmtdesc.pixelformat);
+ if (fmtdesc.pixelformat == V4L2_PIX_FMT_YUYV)
+ fprintf(stdout, "YUYV (YUV:4:2:2)\n");
+ if (fmtdesc.pixelformat == V4L2_PIX_FMT_YUV420)
+ fprintf(stdout, "YUV:4:2:0\n");
+ return fmtdesc.pixelformat;
+ }
+ }
+
+ return 0;
+}
+
+static void init_device(void)
+{
+ struct v4l2_capability cap;
+ struct v4l2_cropcap cropcap;
+ struct v4l2_crop crop;
+ struct v4l2_format fmt;
+ unsigned int min;
+
+ if (-1 == xioctl(fd, VIDIOC_QUERYCAP, &cap)) {
+ if (EINVAL == errno) {
+ fprintf(stderr, "%s is no V4L2 device\n",
+ dev_name);
+ exit(EXIT_FAILURE);
+ } else {
+ errno_exit("VIDIOC_QUERYCAP");
+ }
+ }
+
+ if (!(cap.capabilities & V4L2_CAP_VIDEO_CAPTURE)) {
+ fprintf(stderr, "%s is no video capture device\n",
+ dev_name);
+ exit(EXIT_FAILURE);
+ }
+
+ switch (io) {
+ case IO_METHOD_READ:
+ if (!(cap.capabilities & V4L2_CAP_READWRITE)) {
+ fprintf(stderr, "%s does not support read i/o\n",
+ dev_name);
+ exit(EXIT_FAILURE);
+ }
+
+ break;
+
+ case IO_METHOD_MMAP:
+ case IO_METHOD_USERPTR:
+ if (!(cap.capabilities & V4L2_CAP_STREAMING)) {
+ fprintf(stderr, "%s does not support streaming i/o\n",
+ dev_name);
+ exit(EXIT_FAILURE);
+ }
+
+ break;
+ }
+
+
+ /* Select video input, video standard and tune here. */
+
+
+ CLEAR(cropcap);
+ cropcap.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+
+ if (0 == xioctl (fd, VIDIOC_CROPCAP, &cropcap)) {
+ crop.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ crop.c = cropcap.defrect; /* reset to default */
+
+ if (-1 == xioctl(fd, VIDIOC_S_CROP, &crop)) {
+ switch (errno) {
+ case EINVAL:
+ /* Cropping not supported. */
+ break;
+ default:
+ /* Errors ignored. */
+ break;
+ }
+ }
+ } else {
+ /* Errors ignored. */
+ }
+
+
+ CLEAR(fmt);
+ fmt.fmt.pix.pixelformat = get_a_supported_pix_fmt();
+ if (!fmt.fmt.pix.pixelformat) {
+ fprintf(stderr, "%s does not support requested img formats\n",
+ dev_name);
+ }
+
+ fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ fmt.fmt.pix.width = CAM_WIDTH;
+ fmt.fmt.pix.height = CAM_HEIGHT;
+ fmt.fmt.pix.field = V4L2_FIELD_INTERLACED;
+
+ if (-1 == xioctl (fd, VIDIOC_S_FMT, &fmt))
+ errno_exit ("VIDIOC_S_FMT");
+
+ /* Note VIDIOC_S_FMT may change width and height. */
+
+ /* Buggy driver paranoia. */
+ min = fmt.fmt.pix.width * 2;
+ if (fmt.fmt.pix.bytesperline < min)
+ fmt.fmt.pix.bytesperline = min;
+ min = fmt.fmt.pix.bytesperline * fmt.fmt.pix.height;
+ if (fmt.fmt.pix.sizeimage < min)
+ fmt.fmt.pix.sizeimage = min;
+
+ mycamera.width = fmt.fmt.pix.width;
+ mycamera.height = fmt.fmt.pix.height;
+ mycamera.pixelformat = fmt.fmt.pix.pixelformat;
+ mycamera.bytesperline = fmt.fmt.pix.bytesperline;
+ mycamera.sizeimage = fmt.fmt.pix.sizeimage;
+
+ switch (io) {
+ case IO_METHOD_READ:
+ init_read (fmt.fmt.pix.sizeimage);
+ break;
+
+ case IO_METHOD_MMAP:
+ init_mmap ();
+ break;
+
+ case IO_METHOD_USERPTR:
+ init_userp (fmt.fmt.pix.sizeimage);
+ break;
+ }
+}
+
+static void close_device(void)
+{
+ if (-1 == close (fd))
+ errno_exit("close");
+
+ fd = -1;
+}
+
+static void open_device(void)
+{
+ struct stat st;
+
+ if (-1 == stat (dev_name, &st)) {
+ fprintf (stderr, "Cannot identify '%s': %d, %s\n",
+ dev_name, errno, strerror (errno));
+ exit(EXIT_FAILURE);
+ }
+
+ if (!S_ISCHR (st.st_mode)) {
+ fprintf(stderr, "%s is no device\n", dev_name);
+ exit(EXIT_FAILURE);
+ }
+
+ fd = open(dev_name, O_RDWR /* required */ | O_NONBLOCK, 0);
+
+ if (-1 == fd) {
+ fprintf(stderr, "Cannot open '%s': %d, %s\n",
+ dev_name, errno, strerror (errno));
+ exit(EXIT_FAILURE);
+ }
+}
+
+static void usage(FILE *fp, int argc, char **argv)
+{
+ fprintf (fp,
+ "Usage: %s [options]\n\n"
+ "Options:\n"
+ "-d | --device name Video device name [/dev/video0]\n"
+ "-h | --help Print this message\n"
+ "-m | --mmap Use memory mapped buffers\n"
+ "-r | --read Use read() calls\n"
+ "-u | --userp Use application allocated buffers\n"
+ "",
+ argv[0]);
+}
+
+static const char short_options [] = "d:hmru";
+
+static const struct option long_options [] = {
+ { "device", required_argument, NULL, 'd' },
+ { "help", no_argument, NULL, 'h' },
+ { "mmap", no_argument, NULL, 'm' },
+ { "read", no_argument, NULL, 'r' },
+ { "userp", no_argument, NULL, 'u' },
+ { 0, 0, 0, 0 }
+};
+
+int main(int argc, char **argv)
+{
+ dev_name = "/dev/video0";
+
+ atexit(SDL_Quit);
+ for (;;) {
+ int index;
+ int c;
+
+ c = getopt_long(argc, argv,
+ short_options, long_options,
+ &index);
+
+ if (-1 == c)
+ break;
+
+ switch (c) {
+ case 0: /* getopt_long() flag */
+ break;
+
+ case 'd':
+ dev_name = optarg;
+ break;
+
+ case 'h':
+ usage(stdout, argc, argv);
+ exit (EXIT_SUCCESS);
+
+ case 'm':
+ io = IO_METHOD_MMAP;
+ break;
+
+ case 'r':
+ io = IO_METHOD_READ;
+ break;
+
+ case 'u':
+ io = IO_METHOD_USERPTR;
+ break;
+
+ default:
+ usage(stderr, argc, argv);
+ exit(EXIT_FAILURE);
+ }
+ }
+
+ open_device();
+ init_device();
+
+ SDL_Init(SDL_INIT_VIDEO);
+ screen = SDL_SetVideoMode(SCREEN_WIDTH, SCREEN_HEIGHT, 16, (SDL_HWSURFACE));
+ image = SDL_CreateRGBSurface(/*SDL_HWSURFACE*/0, mycamera.width, mycamera.height, 16, 0, 0, 0, 0);
+// printf("image fmt: RGB%d%d%d\n", image->format->Rshift, image->format->Gshift, image->format->Bshift);
+
+ start_capturing();
+ mainloop();
+ stop_capturing();
+
+ uninit_device();
+ close_device();
+
+ exit(EXIT_SUCCESS);
+
+ return 0;
+}
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2010-03-31 00:16:44
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 7550b63aa773a6edf09e2ee78f77454814f71b2f (commit)
via 82eb933a29ea86383ee7d3868129ac8a4d73cc98 (commit)
from b08116e6d0fd5615dae43f07bef9b6508c5f7ecb (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7550b63aa773a6edf09e2ee78f77454814f71b2f
Author: jorasse <jo...@ar...>
Date: Wed Mar 31 02:16:04 2010 +0200
[BUILDROOT] delete backup files
commit 82eb933a29ea86383ee7d3868129ac8a4d73cc98
Author: jorasse <jo...@ar...>
Date: Wed Mar 31 02:13:27 2010 +0200
[BUILDROOT] update apf default configuration
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/apf27_defconfig | 1 +
buildroot/configs/apf9328_defconfig | 1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/buildroot/configs/apf27_defconfig b/buildroot/configs/apf27_defconfig
index 41f2c42..0e60d9c 100644
--- a/buildroot/configs/apf27_defconfig
+++ b/buildroot/configs/apf27_defconfig
@@ -792,6 +792,7 @@ BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME).h"
BR2_TARGET_UBOOT_1_3_4=y
+# BR2_TARGET_UBOOT_2010_03 is not set
# BR2_TARGET_UBOOT_2009_11 is not set
# BR2_TARGET_UBOOT_2009_08 is not set
# BR2_TARGET_UBOOT_2009_06 is not set
diff --git a/buildroot/configs/apf9328_defconfig b/buildroot/configs/apf9328_defconfig
index dc2a427..ca65e62 100644
--- a/buildroot/configs/apf9328_defconfig
+++ b/buildroot/configs/apf9328_defconfig
@@ -788,6 +788,7 @@ BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME).h"
BR2_TARGET_UBOOT_1_3_4=y
+# BR2_TARGET_UBOOT_2010_03 is not set
# BR2_TARGET_UBOOT_2009_11 is not set
# BR2_TARGET_UBOOT_2009_08 is not set
# BR2_TARGET_UBOOT_2009_06 is not set
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2010-03-30 23:54:42
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via b08116e6d0fd5615dae43f07bef9b6508c5f7ecb (commit)
from e0d1b8ccec96b040c9cf758aa6a3fc8236d84336 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit b08116e6d0fd5615dae43f07bef9b6508c5f7ecb
Author: jorasse <jo...@ar...>
Date: Wed Mar 31 01:54:19 2010 +0200
[BUILDROOT] restore target_suffix original value
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf9328/apf9328_defconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/buildroot/target/device/armadeus/apf9328/apf9328_defconfig b/buildroot/target/device/armadeus/apf9328/apf9328_defconfig
index 07bb0e6..bf02601 100644
--- a/buildroot/target/device/armadeus/apf9328/apf9328_defconfig
+++ b/buildroot/target/device/armadeus/apf9328/apf9328_defconfig
@@ -126,7 +126,7 @@ BR2_TOPDIR_SUFFIX=""
BR2_ROOTFS_PREFIX="$(BR2_BOARD_NAME)-rootfs"
BR2_ROOTFS_SUFFIX=""
BR2_GNU_BUILD_SUFFIX="pc-linux-gnu"
-BR2_GNU_TARGET_SUFFIX="linux-uclibcgnueabi"
+BR2_GNU_TARGET_SUFFIX="linux-uclibc"
BR2_JLEVEL=1
# BR2_PREFER_IMA is not set
# BR2_DEPRECATED is not set
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2010-03-30 22:42:07
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via e0d1b8ccec96b040c9cf758aa6a3fc8236d84336 (commit)
from 53cdca87ed4f7117dadf0cd6065d60e853f46a43 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit e0d1b8ccec96b040c9cf758aa6a3fc8236d84336
Author: jorasse <jo...@ar...>
Date: Wed Mar 31 00:41:10 2010 +0200
[U-Boot] added U-Boot 2010.03-rc2 support for apf9328
-----------------------------------------------------------------------
Summary of changes:
.../apf27/{apf27.h => apf27-u-boot-1.3.4.h} | 0
.../target/device/armadeus/apf27/apf27_defconfig | 2 +-
.../apf9328/{apf9328.h => apf9328-u-boot-1.3.4.h} | 0
.../armadeus/apf9328/apf9328-u-boot-2010.03-rc2.h | 1018 ++++++++++++++++++++
.../device/armadeus/apf9328/apf9328_defconfig | 14 +-
...-imx.patch => u-boot-2010.03-rc2-100-imx.patch} | 36 +-
....patch => u-boot-2010.03-rc2-110-apf9328.patch} | 268 +++---
.../u-boot-2010.03-rc2-111-apf9328-DM9000.patch | 133 +++
.../u-boot-2010.03-rc2-112-apf9328-makefile.patch | 22 +
... => u-boot-2010.03-rc2-120-apf9328-tools.patch} | 135 ++--
...4.patch => u-boot-2010.03-rc2-140-ds1374.patch} | 24 +-
...pf9328-fixes_gcc_4_4_EABI_linking_issues.patch} | 38 +-
.../051i-u-boot-multi-version-support.patch | 40 +
13 files changed, 1469 insertions(+), 261 deletions(-)
copy buildroot/target/device/armadeus/apf27/{apf27.h => apf27-u-boot-1.3.4.h} (100%)
copy buildroot/target/device/armadeus/apf9328/{apf9328.h => apf9328-u-boot-1.3.4.h} (100%)
create mode 100644 buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2010.03-rc2.h
copy buildroot/target/u-boot/{u-boot-1.3.4-100-imx.patch => u-boot-2010.03-rc2-100-imx.patch} (74%)
copy buildroot/target/u-boot/{u-boot-1.3.4-110-apf9328.patch => u-boot-2010.03-rc2-110-apf9328.patch} (83%)
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-rc2-111-apf9328-DM9000.patch
create mode 100644 buildroot/target/u-boot/u-boot-2010.03-rc2-112-apf9328-makefile.patch
copy buildroot/target/u-boot/{u-boot-1.3.4-120-apf9328-tools.patch => u-boot-2010.03-rc2-120-apf9328-tools.patch} (73%)
copy buildroot/target/u-boot/{u-boot-1.3.4-140-ds1374.patch => u-boot-2010.03-rc2-140-ds1374.patch} (73%)
copy buildroot/target/u-boot/{u-boot-1.3.4-402-apf9328-fixes_gcc_4_4_EABI_linking_issues.patch => u-boot-2010.03-rc2-150-apf9328-fixes_gcc_4_4_EABI_linking_issues.patch} (71%)
create mode 100644 patches/buildroot/2010.02/051i-u-boot-multi-version-support.patch
diff --git a/buildroot/target/device/armadeus/apf27/apf27.h b/buildroot/target/device/armadeus/apf27/apf27-u-boot-1.3.4.h
similarity index 100%
copy from buildroot/target/device/armadeus/apf27/apf27.h
copy to buildroot/target/device/armadeus/apf27/apf27-u-boot-1.3.4.h
diff --git a/buildroot/target/device/armadeus/apf27/apf27_defconfig b/buildroot/target/device/armadeus/apf27/apf27_defconfig
index 02805ee..bbc6a84 100644
--- a/buildroot/target/device/armadeus/apf27/apf27_defconfig
+++ b/buildroot/target/device/armadeus/apf27/apf27_defconfig
@@ -772,7 +772,7 @@ BR2_TARGET_ROOTFS_TAR_COPYTO=""
#
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME).h"
+BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-uboot-$(BR2_UBOOT_VERSION).h"
BR2_TARGET_UBOOT_CUSTOM_PATCH=""
BR2_TARGET_UBOOT_SERVERIP=""
BR2_TARGET_UBOOT_IPADDR=""
diff --git a/buildroot/target/device/armadeus/apf9328/apf9328.h b/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-1.3.4.h
similarity index 100%
copy from buildroot/target/device/armadeus/apf9328/apf9328.h
copy to buildroot/target/device/armadeus/apf9328/apf9328-u-boot-1.3.4.h
diff --git a/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2010.03-rc2.h b/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2010.03-rc2.h
new file mode 100644
index 0000000..af8cb69
--- /dev/null
+++ b/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2010.03-rc2.h
@@ -0,0 +1,1018 @@
+/*
+ * Eric Jarrige <jo...@us...>
+ *
+ * Configuration settings for the Armadeus Project motherboard 9328 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * 2005/01/14 Initial version taken from the scb9328 configuration file
+ * 2005/03/10 apf9328 configuration file and trial to improve of
+ * hardware register control.
+ * 2005/08/16 added APF9328 fpgas and ethernet
+ * 2005/12/02 added filesystem boot over NFS
+ * 2006/11/26 added filesystem boot over NFS
+ * 2010/03/28 U-Boot 2010.03 migration + change timer unit to ms (fixme)
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_ENV_VERSION "3.7"
+#define CONFIG_IDENT_STRING " apf9328 patch 4.0"
+
+#define CONFIG_ARM920T 1 /* this is an ARM920T CPU */
+#define CONFIG_IMX 1 /* in a Motorola MC9328MXL Chip */
+#define CONFIG_apf9328 1 /* on a Armadeus project board */
+#undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */
+
+/*
+ * Enable the call to misc_init_r() for miscellaneous platform
+ * dependent initialization.
+ */
+
+#define CONFIG_MISC_INIT_R
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+
+/*
+ * Select serial console configuration
+ */
+#define CONFIG_IMX_SERIAL
+#define CONFIG_IMX_SERIAL1
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+#define CONFIG_BAUDRATE 115200
+
+/*
+ * Definition of u-boot build in commands. Check out CONFIG_CMD_DFL if
+ * neccessary in include/cmd_confdefs.h file. (Un)comment for getting
+ * functionality or size of u-boot code.
+ */
+
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV /* ask for env variable */
+#define CONFIG_CMD_BSP /* Board Specific functions */
+#define CONFIG_CMD_CACHE /* icache, dcache */
+#define CONFIG_CMD_CDP /* Cisco Discovery Protocol */
+#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
+#define CONFIG_CMD_DHCP /* DHCP Support */
+#define CONFIG_CMD_DIAG /* Diagnostics */
+#define CONFIG_CMD_EEPROM /* EEPROM read/write support */
+//#define CONFIG_CMD_FAT /* FAT support */
+#define CONFIG_CMD_FLASH /* flinfo, erase, protect */
+#define CONFIG_CMD_I2C /* I2C serial bus support */
+#define CONFIG_CMD_IMLS /* List all found images */
+#define CONFIG_CMD_IMMAP /* IMMR dump support */
+#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
+//#define CONFIG_CMD_MII /* MII support */
+#define CONFIG_CMD_MTDPARTS /* MTD partition support */
+#define CONFIG_CMD_PING /* ping support */
+#define CONFIG_CMD_SAVES /* save S record dump */
+#define CONFIG_CMD_SETEXPR /* setexpr support */
+#define CONFIG_CMD_SNTP /* SNTP support */
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_DNS
+
+#undef CONFIG_DISPLAY_BOARDINFO
+#undef CONFIG_DISPLAY_CPUINFO
+
+/*
+ * Select some advanced features of the commande line parser
+ */
+#define CONFIG_AUTO_COMPLETE 1 /* Enable auto completion of */
+ /* commands using TAB */
+#define CONFIG_SYS_HUSH_PARSER 1 /* enable the "hush" shell */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* secondary prompt string */
+#define CONFIG_CMDLINE_EDITING 1
+
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+/*
+ * Boot options. Setting delay to -1 stops autostart count down.
+ */
+#define CONFIG_BOOTDELAY 20
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#define CONFIG_BOOTARGS \
+ CONFIG_CONSOLE " root=/dev/mtdblock4 rootfstype=jffs2 " MTDPARTS_DEFAULT
+
+#define CONFIG_CONSOLE "console=ttySMX0,"MK_STR(CONFIG_BAUDRATE)"n8"
+#define CONFIG_MTDMAP "physmap-flash.0"
+#define MTDIDS_DEFAULT "nor0=" CONFIG_MTDMAP
+#define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP ":256k(U-boot)ro," \
+ "128k(U-boot_env),256k(firmware),2048k(kernel),-(rootfs)"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "env_version=" CONFIG_ENV_VERSION "\0" \
+ "fileaddr=" MK_STR(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "filesize=" MK_STR(CONFIG_SYS_MONITOR_LEN) "\0" \
+ "console=" CONFIG_CONSOLE "\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
+ "partition=nor0,4\0" \
+ "uboot_addr=" MK_STR(CONFIG_SYS_MONITOR_BASE) "\0" \
+ "uboot_len=" MK_STR(CONFIG_SYS_MONITOR_LEN) "\0" \
+ "env_addr=" MK_STR(CONFIG_ENV_ADDR) "\0" \
+ "env_len=" MK_STR(CONFIG_ENV_SIZE) "\0" \
+ "firmware_addr=" MK_STR(CONFIG_FIRMWARE_ADDR) "\0" \
+ "firmware_len=" MK_STR(CONFIG_FIRMWARE_LEN) "\0" \
+ "kernel_addr=" MK_STR(CONFIG_KERNEL_ADDR) "\0" \
+ "kernel_len=" MK_STR(CONFIG_KERNEL_LEN) "\0" \
+ "rootfs_addr=" MK_STR(CONFIG_ROOTFS_ADDR) "\0" \
+ "rootfs_len=" MK_STR(CONFIG_ROOTFS_LEN) "\0" \
+ "board_name=" MK_STR(CONFIG_BOARD_NAME) "\0" \
+ "serverpath=" MK_STR(CONFIG_SRV_PATH) "\0" \
+ "ntpserverip=217.147.208.1\0" \
+ "mmcroot=/dev/mmcblk0p1\0" \
+ "mmcrootfstype=ext2\0" \
+ "addnfsargs=setenv bootargs ${bootargs} " \
+ "root=/dev/nfs rw nfsroot=${serverip}:${rootpath}\0" \
+ "addjffsargs=setenv bootargs ${bootargs} " \
+ "root=/dev/mtdblock4 rootfstype=jffs2\0" \
+ "addubifsargs=setenv bootargs ${bootargs} " \
+ "ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
+ "addmmcargs=setenv bootargs ${bootargs} " \
+ "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \
+ "addipargs=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off \0"\
+ "nfsboot=setenv bootargs ${console} ${mtdparts};" \
+ "run addnfsargs addipargs; bootm ${kernel_addr}\0" \
+ "jffsboot=setenv bootargs ${console} ${mtdparts};" \
+ "run addjffsargs addipargs; bootm ${kernel_addr}\0" \
+ "ubifsboot=setenv bootargs ${console} ${mtdparts};" \
+ "run addubifsargs addipargs; bootm ${kernel_addr}\0" \
+ "mmcboot=setenv bootargs ${console} ${mtdparts};" \
+ "run addmmcargs addipargs; bootm ${kernel_addr}\0" \
+ "firmware_autoload=0\0" \
+ "flash_uboot=protect off ${uboot_addr} +${uboot_len};" \
+ "echo Erasing FLASH;" \
+ "era ${uboot_addr} +${uboot_len};" \
+ "if cp.b ${fileaddr} ${uboot_addr} ${filesize};" \
+ "then protect on ${uboot_addr} +${uboot_len};" \
+ "echo Flashing of uboot succeed;" \
+ "else echo Flashing of uboot failed;" \
+ "fi; \0" \
+ "flash_firmware=echo Erasing FLASH;" \
+ "era ${firmware_addr} +${firmware_len};" \
+ "if cp.b ${fileaddr} ${firmware_addr} ${filesize} ;" \
+ "then echo Flashing of Firmware succeed;" \
+ "else echo Flashing of Firmware failed;" \
+ "fi\0" \
+ "flash_kernel=echo Erasing FLASH;" \
+ "era ${kernel_addr} +${kernel_len};" \
+ "if cp.b ${fileaddr} ${kernel_addr} ${filesize} ;" \
+ "then echo Flashing of kernel succeed;" \
+ "else echo Flashing of kernel failed;" \
+ "fi\0" \
+ "flash_rootfs=echo Erasing FLASH;" \
+ "era ${rootfs_addr} +${rootfs_len};" \
+ "if cp.b ${fileaddr} ${rootfs_addr} ${filesize};" \
+ "then echo Flashing of rootfs succeed;" \
+ "else echo Flashing of rootfs failed;" \
+ "fi\0" \
+ "flash_reset_env=protect off ${env_addr} +${env_len};" \
+ "era ${env_addr} +${env_len};" \
+ "echo Erasing of flash environment variables done!\0" \
+ "download_uboot=tftpboot ${loadaddr} " \
+ " ${serverpath}${board_name}-u-boot.bin\0" \
+ "download_kernel=tftpboot ${loadaddr} " \
+ " ${serverpath}${board_name}-linux.bin\0" \
+ "download_rootfs=tftpboot ${loadaddr} " \
+ " ${serverpath}${board_name}-rootfs.arm.jffs2\0" \
+ "update_uboot=run download_uboot flash_uboot\0" \
+ "update_kernel=run download_kernel flash_kernel\0" \
+ "update_rootfs=run download_rootfs flash_rootfs\0" \
+ "update_all=run download_kernel flash_kernel download_rootfs " \
+ "flash_rootfs download_uboot flash_uboot\0" \
+ "unlock_regs=mw 00200008 0; mw 00210008 0\0" \
+
+#define CONFIG_BOOTCOMMAND "run jffsboot"
+#define CONFIG_SYS_AUTOLOAD "no"
+
+#define CONFIG_MACH_TYPE MACH_TYPE_APF9328
+#define CONFIG_BOOT_PARAMS_ADDR 0x08000100
+
+#undef CONFIG_SHOW_BOOT_PROGRESS
+
+#define CONFIG_ETHADDR
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 192.168.000.10
+#define CONFIG_BOARD_NAME "apf9328"
+#define CONFIG_HOSTNAME "apf9328"
+#define CONFIG_GATEWAYIP 192.168.000.1
+#define CONFIG_SERVERIP 192.168.000.2
+#define CONFIG_SRV_PATH ""
+#define CONFIG_ROOTPATH "/tftpboot/apf9328-root"
+
+/*
+ * General options for u-boot. Modify to save memory foot print
+ */
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT "BIOS> " /* prompt string */
+#define CONFIG_SYS_CBSIZE 256 /* console I/O buffer */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* print buffer size */
+#define CONFIG_SYS_MAXARGS 16 /* max command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot args buf size */
+
+#define CONFIG_SYS_MEMTEST_START 0x08000000 /* memtest test area */
+#define CONFIG_SYS_MEMTEST_END 0x08700000
+
+#define CONFIG_SYS_HZ 1000l /* incrementer freq: 1 MHz */
+
+/*
+ * Definitions related to passing arguments to kernel.
+ */
+
+#define CONFIG_CMDLINE_TAG 1 /* send commandline to Kernel */
+#define CONFIG_SETUP_MEMORY_TAGS 1 /* send memory definition to kernel */
+#define CONFIG_INITRD_TAG 1 /* send initrd params */
+#undef CONFIG_VFD /* do not send framebuffer setup */
+
+/*
+ * Malloc pool need to host env + 128 Kb reserve for other allocations.
+ */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128<<10) )
+
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+#define CONFIG_STACKSIZE (120<<10) /* stack size */
+
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4<<10) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4<<10) /* FIQ stack */
+#endif
+
+/*
+* Clocks configuration
+*/
+/*
+ * PLL configuration
+
+ f_{dpll}=2*f{ref}*(MFI+MFN/(MFD+1))/(PD+1)
+ f_ref=16,777216MHz
+ 32768 Hz xtal
+ 0x07B32DA5: 192.0000173
+ 0x002a141f: 191,9944MHz
+ 0x040b2007: 144MHz
+ 0x0FB32DA5: 96.00000864 MHz
+ 0x042a141f: 96MHz
+ 0x0811140d: 64MHz
+ 0x040e200e: 150MHz
+ 0x00321431: 200MHz
+
+ 16 MHz xtal
+ 0x08001800: 64MHz mit 16er Quarz
+ 0x04001800: 96MHz mit 16er Quarz
+ 0x04002400: 144MHz mit 16er Quarz
+
+ 31 |x x x x|x x x x|x x x x|x x x x|x x x x|x x x x|x x x x|x x x x| 0
+ |XXX|--PD---|-------MFD---------|XXX|--MFI--|-----MFN-----------|
+ */
+
+#define CONFIG_SYS_OSC32 32768 /* 32768 or 32000 Hz crystal */
+#undef CONFIG_SYS_OSC16 /* there is no external 16MHz external clock */
+
+/* MPU CLOCK source before PLL (should be named CONFIG_SYS_SYS_CLK_FREQ) */
+#define CONFIG_SYS_CLK_FREQ (512*CONFIG_SYS_OSC32)
+#define CONFIG_SYS_MPCTL0_VAL 0x07B32DA5 /* 192.000017 MHz */
+#define CONFIG_SYS_MPCTL1_VAL 0
+
+/* system clock source before PLL (should be named CONFIG_SYS_SYSPLL_CLK_FREQ) */
+#ifndef CONFIG_SYS_OSC16
+#define CONFIG_SYSPLL_CLK_FREQ (512*CONFIG_SYS_OSC32)
+#if (CONFIG_SYS_OSC32 == 32000)
+#define CONFIG_SYS_SPCTL0_VAL 0x043F1437 /* 96 MHz */
+#define CONFIG_SYS_SPCTL1_VAL 0
+#define CONFIG_SYS_FREQ 96 /* MHz */
+#else /* CONFIG_SYS_OSC32 == 32768*/
+#define CONFIG_SYS_SPCTL0_VAL 0x0FB32DA5 /* 96.000009 MHz */
+#define CONFIG_SYS_SPCTL1_VAL 0
+#define CONFIG_SYS_FREQ 96 /* MHz */
+#endif /* CONFIG_SYS_OSC32 */
+#else /* CONFIG_SYS_OSC16 in use*/
+#define CONFIG_SYSPLL_CLK_FREQ CONFIG_SYS_OSC16
+#define CONFIG_SYS_SPCTL0_VAL 0x04001401 /* 96 MHz */
+#define CONFIG_SYS_SPCTL1_VAL 0x0C000040
+#define CONFIG_SYS_FREQ 96 /* MHz */
+#endif /* CONFIG_SYS_OSC16 */
+
+/* external bus frequency (have to be a CONFIG_SYS_FREQ ratio) */
+#define CONFIG_SYS_BUS_FREQ 96 /* 96|48... MHz (BCLOCK and HCLOCK) */
+#define CONFIG_USB_FREQ 48 /* 48 MHz */
+#define CONFIG_PERIF1_FREQ 16 /* 16 MHz UART, Timer PWM*/
+#define CONFIG_PERIF2_FREQ 48 /* 48 MHz LCD SD SPI*/
+#define CONFIG_PERIF3_FREQ 16 /* 16 MHz SSI*/
+
+
+/*
+ * SDRAM definition parameter
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have and support only 1 bank of SDRAM */
+
+#define CONFIG_SYS_SDRAM_MBYTE_SYZE 16
+
+#if (CONFIG_SYS_SDRAM_MBYTE_SYZE == 8)
+/* micron 8MB */
+#define CONFIG_SYS_SDRAM_1_BASE 0x08000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
+#define CONFIG_SYS_SDRAM_NUM_COL 8 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 11 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_REFRESH 2 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
+#define CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1 20 /* ns clock cycle time when CL=1 */
+#define CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY 20 /* ns SRP */
+#define CONFIG_SYS_SDRAM_ROW_2_COL_DELAY 20 /* ns SRCD */
+#define CONFIG_SYS_SDRAM_ROW_CYCLE_DELAY 70 /* ns SRC */
+#define CONFIG_SYS_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
+#define CONFIG_SYS_SDRAM_SINGLE_ACCESS 0 /* 1= single access; 0 = Burst mode */
+#endif
+
+#if (CONFIG_SYS_SDRAM_MBYTE_SYZE == 16)
+/* micron 16MB */
+#define CONFIG_SYS_SDRAM_1_BASE 0x08000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
+#define CONFIG_SYS_SDRAM_NUM_COL 8 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 12 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_REFRESH 2 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
+#define CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1 20 /* ns clock cycle time when CL=1 */
+#define CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY 20 /* ns SRP */
+#define CONFIG_SYS_SDRAM_ROW_2_COL_DELAY 20 /* ns SRCD */
+#define CONFIG_SYS_SDRAM_ROW_CYCLE_DELAY 70 /* ns SRC */
+#define CONFIG_SYS_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
+#define CONFIG_SYS_SDRAM_SINGLE_ACCESS 0 /* 1= single access; 0 = Burst mode */
+#endif
+
+#if (CONFIG_SYS_SDRAM_MBYTE_SYZE == 32)
+/* micron 32MB */
+#define CONFIG_SYS_SDRAM_1_BASE 0x08000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
+#define CONFIG_SYS_SDRAM_NUM_COL 9 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 12 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_REFRESH 2 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
+#define CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1 20 /* ns clock cycle time when CL=1 */
+#define CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY 20 /* ns SRP */
+#define CONFIG_SYS_SDRAM_ROW_2_COL_DELAY 20 /* ns SRCD */
+#define CONFIG_SYS_SDRAM_ROW_CYCLE_DELAY 70 /* ns SRC */
+#define CONFIG_SYS_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
+#define CONFIG_SYS_SDRAM_SINGLE_ACCESS 0 /* 1= single access; 0 = Burst mode */
+#endif
+
+#if (CONFIG_SYS_SDRAM_MBYTE_SYZE == 64)
+/* micron 64MB */
+#define CONFIG_SYS_SDRAM_1_BASE 0x08000000 /* SDRAM bank #1 32bits */
+#define CONFIG_SYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define CONFIG_SYS_SDRAM_NUM_COL 9 /* 8, 9, 10 or 11 column address bits */
+#define CONFIG_SYS_SDRAM_NUM_ROW 13 /* 11, 12 or 13 row address bits */
+#define CONFIG_SYS_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192 refresh */
+#define CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1 20 /* ns clock cycle time when CL=1 */
+#define CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY 20 /* ns SRP */
+#define CONFIG_SYS_SDRAM_ROW_2_COL_DELAY 20 /* ns SRCD */
+#define CONFIG_SYS_SDRAM_ROW_CYCLE_DELAY 70 /* ns SRC */
+#define CONFIG_SYS_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
+#define CONFIG_SYS_SDRAM_SINGLE_ACCESS 0 /* 1= single access; 0 = Burst mode */
+#endif
+
+/*
+ * Configuration for a maximum 32MB of FLASH memory
+ */
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* FLASH banks count (not chip count) */
+#define CONFIG_SYS_MAX_FLASH_SECT 256 /* number of sector in FLASH bank */
+#define CONFIG_SYS_FLASH_BASE 0x10000000 /* location of flash memory */
+
+/* This should be defined if CFI FLASH device is present. */
+#define CONFIG_SYS_FLASH_CFI 1
+#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
+#define CONFIG_SYS_FLASH_PROTECTION 1
+#define CONFIG_SYS_DIRECT_FLASH_TFTP 1
+#define CONFIG_FLASH_SHOW_PROGRESS 45
+/*
+ * This is setting for JFFS2 support in u-boot.
+ * NOTE: Enable CONFIG_SYS_CMD_JFFS2 for JFFS2 support.
+ */
+#define CONFIG_SYS_JFFS_CUSTOM_PART
+
+/*
+ * Environment setup. Definitions of monitor location and size with
+ * definition of environment setup ends up in 2 possibilities.
+ * 1. Embeded environment - in u-boot code is space for environment
+ * 2. Environment is read from predefined sector of flash
+ * Right now we support 2. possiblity, but expecting no env placed
+ * on mentioned address right now. This also needs to provide whole
+ * sector for it - for us 256Kb is really waste of memory. U-boot uses
+ * default env. and until kernel parameters could be sent to kernel
+ * env. has no sense to us.
+ */
+
+#define CONFIG_SYS_MONITOR_BASE 0x10000000
+#define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256kB ( 2 flash sector ) */
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_ADDR 0x10040000 /* absolute address for now */
+#define CONFIG_ENV_SIZE 0x00020000
+#define CONFIG_ENV_SECT_SIZE 0x00020000
+#define CONFIG_ENV_OVERWRITE 1 /* env is writable now */
+#define CONFIG_FIRMWARE_ADDR 0x10060000
+#define CONFIG_FIRMWARE_LEN 0x00040000 /* 256kB ( 2 flash sector ) */
+#define CONFIG_KERNEL_ADDR 0x100A0000
+#define CONFIG_KERNEL_LEN 0x00200000 /* 2MB */
+#define CONFIG_ROOTFS_ADDR 0x102A0000
+#define CONFIG_ROOTFS_LEN /* entire flash if not specified */
+
+/*
+ * Default load address for user programs and kernel
+ */
+#define CONFIG_SYS_LOAD_ADDR 0x08000000
+#define CONFIG_LOADADDR 0x08000000
+#define CONFIG_SYS_TFTP_LOADADDR 0x08000000
+/*
+ * Hardware drivers
+ */
+
+/* DM9000 ethernet chipset assigned to CS4 */
+/* For the apf board DM9000 base is 0x15C00000 and data is base+2 */
+/* For the apm board DM9000 base is 0x15C3FFFC and data is base+4 */
+#define CONFIG_DRIVER_DM9000 1
+//#undef CONFIG_DM9000_DEBUG
+#define CONFIG_DM9000_BASE 0x15C00000
+#define DM9000_IO CONFIG_DM9000_BASE
+#define DM9000_DATA (CONFIG_DM9000_BASE+2)
+#define CONFIG_NET_MULTI
+
+/*-----------------------------------------------------------------------
+ * FPGA stuff
+ */
+#define CONFIG_FPGA_COUNT 1
+/* only digital value for CONFIG_FPGA is supported (investigation pending) */
+#define CONFIG_FPGA 0x801 /* CONFIG_SYS_XILINX_SPARTAN3 */
+#define CONFIG_FPGA_XILINX
+#define CONFIG_FPGA_SPARTAN3
+#define CONFIG_SYS_FPGA_WAIT 250
+#define CONFIG_SYS_FPGA_PROG_FEEDBACK
+#define CONFIG_SYS_FPGA_CHECK_CTRLC
+#define CONFIG_SYS_FPGA_CHECK_ERROR
+
+/* FPGA program pin configuration */
+#define CONFIG_SYS_FPGA_PRG (GPIO_PORTB | 18) /* FPGA prog pin (SSI output) */
+#define CONFIG_SYS_FPGA_CLK (GPIO_PORTB | 19) /* FPGA clk pin (SSI output) */
+#define CONFIG_SYS_FPGA_DATA (GPIO_PORTB | 17) /* FPGA data pin (SSI output) */
+#define CONFIG_SYS_FPGA_INIT (GPIO_PORTB | 15) /* FPGA init pin (SSI input) */
+#define CONFIG_SYS_FPGA_DONE (GPIO_PORTB | 16) /* FPGA done pin (SSI input) */
+
+/*
+ * I2C bus
+ */
+
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+
+#define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+
+# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC256 */
+# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* bytes of address */
+/* mask of address bits that overflow into the "EEPROM chip address" */
+/*#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x00*/
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* takes up to 10 msec */
+
+#define CONFIG_RTC_DS1374
+/*#define CONFIG_MMC 1
+*/
+/*
+ * External interfaces module
+ *
+ * CSxU_VAL:
+ * 63| x |x|x x|x x x x|x x| x | x |x x x x|48
+ * |DTACK_SEL|0|BCD| BCS |PSZ|PME|SYNC| DOL |
+ *
+ * 47| x x | x x x x x x | x | x x x x | x x x x |32
+ * | CNC | WSC | 0 | WWS | EDC |
+ *
+ * CSxL_VAL:
+ * 31| x x x x | x x x x | x x x x | x x x x |24
+ * | OEA | OEN | WEA | WEN |
+ * 23|x x x x| x | x x x | x x x x |x x| x | x | 0
+ * | CSA |EBC| DSZ | 0|SP|0|WP|0 0|PA |CSEN |
+ */
+
+/* CS0 configuration for flash memory Micron MT28F128J3-150 */
+#define CONFIG_SYS_CS0_CHIP_SELECT_ENABLE 1 /* 1 : enable CS0 peripherals */
+#define CONFIG_SYS_CS0_DATA_PORT_SIZE 0x5 /* 5=16 bits on D[15:0] pins */
+ /* 3=8bits on D[7:0] 6=32 bits..*/
+#define CONFIG_SYS_CS0_SUPERVISOR_PROTECT 0 /* 1 : user mode access prohibited */
+#define CONFIG_SYS_CS0_WRITE_PROTECT 0 /* 1 : write access prohibited */
+#define CONFIG_SYS_CS0_EB_SIGNAL_CONTROL_WRITE 1 /* 1 when EB is used as write signal */
+#define CONFIG_SYS_CS0_READ_CYC_LGTH 150 /* ns */
+#define CONFIG_SYS_CS0_OE_ASSERT_DLY 0 /* ns */
+#define CONFIG_SYS_CS0_OE_NEG_DLY 0 /* ns */
+
+#define CONFIG_SYS_CS0_CS_NEG_LGTH 0 /* ns CS HIGH to CS LOW : tCWH */
+#define CONFIG_SYS_CS0_XTRA_DEAD_CYC 35 /* ns from CS HIGH to tristate bus */
+
+#define CONFIG_SYS_CS0_WRITE_XTRA_LGTH 0 /* ns */
+#define CONFIG_SYS_CS0_EB_ASSERT_DLY 0 /* ns */
+#define CONFIG_SYS_CS0_EB_NEG_DLY 0 /* ns */
+#define CONFIG_SYS_CS0_CS_ASSERT_NEG_DLY 0 /* ns */
+
+#define CONFIG_SYS_CS0_SYNC_ENABLE 1 /* enable synchronous burst mode */
+#define CONFIG_SYS_CS0_SYNC_PAGE_MODE_EMUL 1 /* enable page mode emulation */
+#define CONFIG_SYS_CS0_SYNC_PAGE_SIZE 0 /* 4 words page size (8bytes) */
+#define CONFIG_SYS_CS0_SYNC_BURST_CLK_START 0 /* 0 ns burst clock delay */
+#define CONFIG_SYS_CS0_SYNC_BURST_CLK_DIV 0 /* 0 : divider is 1 */
+#define CONFIG_SYS_CS0_SYNC_DAT_OUT_LGTH 25 /* ns */
+
+/* CS1 configuration for */
+#define CONFIG_SYS_CS1_CHIP_SELECT_ENABLE 1 /* 1 : enable CS0 peripherals */
+#define CONFIG_SYS_CS1_PIN_ASSERT 0 /* chip select pin state when */
+ /* chip select disabled */
+#define CONFIG_SYS_CS1_DATA_PORT_SIZE 0x5 /* 5=16 bits on D[15:0] pins*/
+ /* 3=8bits on D[7:0] 6=32 bits..*/
+#define CONFIG_SYS_CS1_SUPERVISOR_PROTECT 0 /* 1 : user mode access prohibited */
+#define CONFIG_SYS_CS1_WRITE_PROTECT 0 /* 1 : write access prohibited */
+#define CONFIG_SYS_CS1_EB_SIGNAL_CONTROL_WRITE 1 /* 1 when EB is used as write signal */
+
+#define CONFIG_SYS_CS1_READ_CYC_LGTH 50 /* ns */
+#define CONFIG_SYS_CS1_OE_ASSERT_DLY 0 /* ns */
+#define CONFIG_SYS_CS1_OE_NEG_DLY 0 /* ns */
+
+#define CONFIG_SYS_CS1_CS_NEG_LGTH 0 /* max 30 ns CS HIGH to CS LOW at 100MHz */
+#define CONFIG_SYS_CS1_XTRA_DEAD_CYC 0 /* ns from CS HIGH to tristate bus */
+
+#define CONFIG_SYS_CS1_WRITE_XTRA_LGTH 0 /* ns */
+#define CONFIG_SYS_CS1_EB_ASSERT_DLY 0 /* ns */
+#define CONFIG_SYS_CS1_EB_NEG_DLY 0 /* ns */
+#define CONFIG_SYS_CS1_CS_ASSERT_NEG_DLY 0 /* ns */
+
+#define CONFIG_SYS_CS1_SYNC_ENABLE 0 /* enable synchronous burst mode */
+#define CONFIG_SYS_CS1_SYNC_PAGE_MODE_EMUL 0 /* enable page mode emulation */
+#define CONFIG_SYS_CS1_SYNC_PAGE_SIZE 0 /* 4 words page size (8bytes) */
+#define CONFIG_SYS_CS1_SYNC_BURST_CLK_START 0 /* 0 ns burst clock delay */
+#define CONFIG_SYS_CS1_SYNC_BURST_CLK_DIV 0 /* 0 : divider is 1 */
+#define CONFIG_SYS_CS1_SYNC_DAT_OUT_LGTH 0 /* ns */
+
+/* CS2 configuration for */
+#define CONFIG_SYS_CS2_CHIP_SELECT_ENABLE 0 /* 1 : enable CS0 peripherals */
+#define CONFIG_SYS_CS2_PIN_ASSERT 0 /* chip select pin state when */
+ /*chip select disabled */
+#define CONFIG_SYS_CS2_DATA_PORT_SIZE 0x5 /* 5=16 bits on D[15:0] pins */
+ /* 3=8bits on D[7:0] 6=32 bits..*/
+#define CONFIG_SYS_CS2_SUPERVISOR_PROTECT 0 /* 1 : user mode access prohibited */
+#define CONFIG_SYS_CS2_WRITE_PROTECT 0 /* 1 : write access prohibited */
+#define CONFIG_SYS_CS2_EB_SIGNAL_CONTROL_WRITE 1 /* 1 when EB is used as write signal */
+
+#define CONFIG_SYS_CS2_READ_CYC_LGTH 0 /* ns */
+#define CONFIG_SYS_CS2_OE_ASSERT_DLY 0 /* ns */
+#define CONFIG_SYS_CS2_OE_NEG_DLY 0 /* ns */
+
+#define CONFIG_SYS_CS2_CS_NEG_LGTH 0 /* max 30 ns CS HIGH to CS LOW at 100MHz */
+#define CONFIG_SYS_CS2_XTRA_DEAD_CYC 0 /* ns from CS HIGH to tristate bus */
+
+#define CONFIG_SYS_CS2_WRITE_XTRA_LGTH 0 /* ns */
+#define CONFIG_SYS_CS2_EB_ASSERT_DLY 0 /* ns */
+#define CONFIG_SYS_CS2_EB_NEG_DLY 0 /* ns */
+#define CONFIG_SYS_CS2_CS_ASSERT_NEG_DLY 0 /* ns */
+
+#define CONFIG_SYS_CS2_SYNC_ENABLE 0 /* enable synchronous burst mode */
+#define CONFIG_SYS_CS2_SYNC_PAGE_MODE_EMUL 0 /* enable page mode emulation*/
+#define CONFIG_SYS_CS2_SYNC_PAGE_SIZE 0 /* 4 words page size (8bytes) */
+#define CONFIG_SYS_CS2_SYNC_BURST_CLK_START 0 /* 0 ns burst clock delay */
+#define CONFIG_SYS_CS2_SYNC_BURST_CLK_DIV 0 /* 0 : divider is 1 */
+#define CONFIG_SYS_CS2_SYNC_DAT_OUT_LGTH 0 /* ns */
+
+/* CS3 configuration for ISP1760 */
+#define CONFIG_SYS_CS3_CHIP_SELECT_ENABLE 1 /* 1 : enable CS0 peripherals */
+#define CONFIG_SYS_CS3_PIN_ASSERT 0 /* chip select pin state when */
+ /* chip select disabled */
+#define CONFIG_SYS_CS3_DATA_PORT_SIZE 0x5 /* 5=16 bits on D[15:0] pins */
+ /* 3=8bits on D[7:0] 6=32 bits..*/
+#define CONFIG_SYS_CS3_SUPERVISOR_PROTECT 0 /* 1: user mode access prohibited*/
+#define CONFIG_SYS_CS3_WRITE_PROTECT 0 /* 1: write access prohibited */
+#define CONFIG_SYS_CS3_EB_SIGNAL_CONTROL_WRITE 1 /* 1 when EB is used as write signal*/
+
+#define CONFIG_SYS_CS3_READ_CYC_LGTH 110 /* ns */
+#define CONFIG_SYS_CS3_OE_ASSERT_DLY 45 /* ns */
+#define CONFIG_SYS_CS3_OE_NEG_DLY 40 /* ns */
+
+#define CONFIG_SYS_CS3_CS_NEG_LGTH 30 /* max 30 ns CS HIGH to CS LOW at 100MHz */
+#define CONFIG_SYS_CS3_XTRA_DEAD_CYC 0 /* ns from CS HIGH to tristate bus */
+
+#define CONFIG_SYS_CS3_WRITE_XTRA_LGTH 0 /* ns */
+#define CONFIG_SYS_CS3_EB_ASSERT_DLY 45 /* ns */
+#define CONFIG_SYS_CS3_EB_NEG_DLY 45 /* ns */
+#define CONFIG_SYS_CS3_CS_ASSERT_NEG_DLY 35 /* ns */
+
+#define CONFIG_SYS_CS3_SYNC_ENABLE 0 /* enable synchronous burst mode*/
+#define CONFIG_SYS_CS3_SYNC_PAGE_MODE_EMUL 0 /* enable page mode emulation*/
+#define CONFIG_SYS_CS3_SYNC_PAGE_SIZE 0 /* 4 words page size (8bytes) */
+#define CONFIG_SYS_CS3_SYNC_BURST_CLK_START 0 /* 0 ns burst clock delay */
+#define CONFIG_SYS_CS3_SYNC_BURST_CLK_DIV 0 /* 0 : divider is 1 */
+#define CONFIG_SYS_CS3_SYNC_DAT_OUT_LGTH 0 /* ns */
+
+/* CS4 configuration for DM9000 ethernet chipset */
+#define CONFIG_SYS_CS4_CHIP_SELECT_ENABLE 1 /* 1 : enable CS0 peripherals */
+#define CONFIG_SYS_CS4_PIN_ASSERT 0 /* chip select pin state when */
+ /* chip select disabled */
+#define CONFIG_SYS_CS4_DATA_PORT_SIZE 0x5 /* 5=16 bits on D[15:0] pins */
+ /* 3=8bits on D[7:0] 6=32 bits..*/
+#define CONFIG_SYS_CS4_SUPERVISOR_PROTECT 0 /* 1 : user mode access prohibited*/
+#define CONFIG_SYS_CS4_WRITE_PROTECT 0 /* 1 : write access prohibited */
+#define CONFIG_SYS_CS4_EB_SIGNAL_CONTROL_WRITE 1 /* 1 when EB is used as write signal*/
+
+#define CONFIG_SYS_CS4_READ_CYC_LGTH 72 /* ns */
+#define CONFIG_SYS_CS4_OE_ASSERT_DLY 5 /* ns */
+#define CONFIG_SYS_CS4_OE_NEG_DLY 45 /* ns */
+
+#define CONFIG_SYS_CS4_CS_NEG_LGTH 30 /* max 30 ns CS HIGH to CS LOW at 100MHz*/
+#define CONFIG_SYS_CS4_XTRA_DEAD_CYC 0 /* ns from CS HIGH to tristate bus */
+
+#define CONFIG_SYS_CS4_WRITE_XTRA_LGTH 0 /* ns */
+#define CONFIG_SYS_CS4_EB_ASSERT_DLY 5 /* ns */
+#define CONFIG_SYS_CS4_EB_NEG_DLY 45 /* ns */
+#define CONFIG_SYS_CS4_CS_ASSERT_NEG_DLY 0 /* ns */
+
+#define CONFIG_SYS_CS4_SYNC_ENABLE 0 /* enable synchronous burst mode*/
+#define CONFIG_SYS_CS4_SYNC_PAGE_MODE_EMUL 0 /* enable page mode emulation */
+#define CONFIG_SYS_CS4_SYNC_PAGE_SIZE 0 /* 4 words page size (8bytes) */
+#define CONFIG_SYS_CS4_SYNC_BURST_CLK_START 0 /* 0 ns burst clock delay */
+#define CONFIG_SYS_CS4_SYNC_BURST_CLK_DIV 0 /* 0 : divider is 1 */
+#define CONFIG_SYS_CS4_SYNC_DAT_OUT_LGTH 0 /* ns */
+
+/* CS5 configuration for */
+#define CONFIG_SYS_CS5_CHIP_SELECT_ENABLE 1 /* 1 : enable CS0 peripherals */
+#define CONFIG_SYS_CS5_PIN_ASSERT 0 /* chip select pin state when */
+ /* chip select disabled */
+#define CONFIG_SYS_CS5_DATA_PORT_SIZE 0x5 /* 5=16 bits on D[15:0] pins */
+ /* 3=8bits on D[7:0] 6=32 bits..*/
+#define CONFIG_SYS_CS5_SUPERVISOR_PROTECT 0 /* 1: user mode access prohibited*/
+#define CONFIG_SYS_CS5_WRITE_PROTECT 0 /* 1 : write access prohibited*/
+#define CONFIG_SYS_CS5_EB_SIGNAL_CONTROL_WRITE 1 /* 1 when EB is used as write signal*/
+#define CONFIG_SYS_CS5_DTACK_SELECT 1 /* Activate DTACK fonction */
+ /* (asynchrone bus) */
+
+#define CONFIG_SYS_CS5_READ_CYC_LGTH -1 /* ns or -1 to DTACK function */
+#define CONFIG_SYS_CS5_OE_ASSERT_DLY 10 /* ns */
+#define CONFIG_SYS_CS5_OE_NEG_DLY 10 /* ns */
+
+#define CONFIG_SYS_CS5_CS_NEG_LGTH 10 /* max 30 ns CS HIGH to CS LOW at 100MHz*/
+#define CONFIG_SYS_CS5_XTRA_DEAD_CYC 0 /* ns from CS HIGH to tristate bus */
+
+#define CONFIG_SYS_CS5_WRITE_XTRA_LGTH 0 /* ns */
+#define CONFIG_SYS_CS5_EB_ASSERT_DLY 10 /* ns */
+#define CONFIG_SYS_CS5_EB_NEG_DLY 10 /* ns */
+#define CONFIG_SYS_CS5_CS_ASSERT_NEG_DLY 0 /* ns */
+
+#define CONFIG_SYS_CS5_SYNC_ENABLE 0 /* enable synchron burst mode */
+#define CONFIG_SYS_CS5_SYNC_PAGE_MODE_EMUL 0 /* enable page mode emulation */
+#define CONFIG_SYS_CS5_SYNC_PAGE_SIZE 0 /* 4 words page size (8bytes) */
+#define CONFIG_SYS_CS5_SYNC_BURST_CLK_START 0 /* 0 ns burst clock delay */
+#define CONFIG_SYS_CS5_SYNC_BURST_CLK_DIV 0 /* 0 : divider is 1 */
+#define CONFIG_SYS_CS5_SYNC_DAT_OUT_LGTH 0 /* ns */
+
+/*
+ * Default configuration for GPIOs and peripherals
+ */
+#define CONFIG_SYS_DDIR_A_VAL 0x00000000
+#define CONFIG_SYS_OCR1_A_VAL 0x00000000
+#define CONFIG_SYS_OCR2_A_VAL 0x00000000
+#define CONFIG_SYS_ICFA1_A_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFA2_A_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB1_A_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB2_A_VAL 0xFFFFFFFF
+#define CONFIG_SYS_DR_A_VAL 0x00000000
+
+/* Setup for PA23 which is Reset Default PA23 but has to become
+ CS5 */
+#define CONFIG_SYS_GIUS_A_VAL 0x00007FF8
+#define CONFIG_SYS_ICR1_A_VAL 0x00000000
+#define CONFIG_SYS_ICR2_A_VAL 0x00000000
+#define CONFIG_SYS_IMR_A_VAL 0x00000000
+#define CONFIG_SYS_GPR_A_VAL 0x00000000
+#define CONFIG_SYS_PUEN_A_VAL 0xFFFFFFFF
+
+#define CONFIG_SYS_DDIR_B_VAL 0x00000000
+#define CONFIG_SYS_OCR1_B_VAL 0x00000000
+#define CONFIG_SYS_OCR2_B_VAL 0x00000000
+#define CONFIG_SYS_ICFA1_B_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFA2_B_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB1_B_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB2_B_VAL 0xFFFFFFFF
+#define CONFIG_SYS_DR_B_VAL 0x00000000
+#define CONFIG_SYS_GIUS_B_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICR1_B_VAL 0x00000000
+#define CONFIG_SYS_ICR2_B_VAL 0x00000000
+#define CONFIG_SYS_IMR_B_VAL 0x00000000
+#define CONFIG_SYS_GPR_B_VAL 0x00000000
+#define CONFIG_SYS_PUEN_B_VAL 0xFFFFFFFF
+
+#define CONFIG_SYS_DDIR_C_VAL 0x00000000
+#define CONFIG_SYS_OCR1_C_VAL 0x00000000
+#define CONFIG_SYS_OCR2_C_VAL 0x00000000
+#define CONFIG_SYS_ICFA1_C_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFA2_C_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB1_C_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB2_C_VAL 0xFFFFFFFF
+#define CONFIG_SYS_DR_C_VAL 0x00000000
+#define CONFIG_SYS_GIUS_C_VAL 0x0007FFFF
+#define CONFIG_SYS_ICR1_C_VAL 0x00000000
+#define CONFIG_SYS_ICR2_C_VAL 0x00000000
+#define CONFIG_SYS_IMR_C_VAL 0x00000000
+#define CONFIG_SYS_GPR_C_VAL 0x00000000
+#define CONFIG_SYS_PUEN_C_VAL 0xF913FFFF
+
+#define CONFIG_SYS_DDIR_D_VAL 0x00000000
+#define CONFIG_SYS_OCR1_D_VAL 0x00000000
+#define CONFIG_SYS_OCR2_D_VAL 0x00000000
+#define CONFIG_SYS_ICFA1_D_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFA2_D_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB1_D_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICFB2_D_VAL 0xFFFFFFFF
+#define CONFIG_SYS_DR_D_VAL 0x00000000
+#define CONFIG_SYS_GIUS_D_VAL 0xFFFFFFFF
+#define CONFIG_SYS_ICR1_D_VAL 0x00000000
+#define CONFIG_SYS_ICR2_D_VAL 0x00000000
+#define CONFIG_SYS_IMR_D_VAL 0x00000000
+#define CONFIG_SYS_GPR_D_VAL 0x00000000
+#define CONFIG_SYS_PUEN_D_VAL 0xFFFFFFFF
+
+#define CONFIG_SYS_GPCR_VAL 0x000003AB
+
+/* FMCR Bit 1 becomes 0 to make CS3 if we have only one sdram bank*/
+#if (CONFIG_NR_DRAM_BANKS == 1)
+#define CONFIG_SYS_FMCR_VAL 0x00000001
+#elif (CONFIG_NR_DRAM_BANKS == 2)
+#define CONFIG_SYS_FMCR_VAL 0x00000003
+#endif
+
+/*
+ * FIXME: From here, there should not be any user configuration.
+ * All Equations are automatic
+ */
+
+
+#define CONFIG_SYS_HCLK_LGTH (1000/CONFIG_SYS_BUS_FREQ) /* ns */
+
+/* USB 48 MHz ; BUS 96MHz*/
+#ifdef CONFIG_SYS_OSC16
+#define CSCR_MASK 0x23030003
+#else
+#define CSCR_MASK 0x23000003
+#endif
+#define CONFIG_SYS_CSCR_VAL\
+ (CSCR_MASK \
+ |((((CONFIG_SYS_FREQ/CONFIG_USB_FREQ)-1)&0x07)<<26) \
+ |((((CONFIG_SYS_FREQ/CONFIG_SYS_BUS_FREQ)-1)&0x0F)<<10))
+
+/* PERCLKx 16MHz */
+#define CONFIG_SYS_PCDR_VAL\
+ (((((CONFIG_SYS_FREQ/CONFIG_PERIF1_FREQ)-1)&0x0F)<<0) \
+ |((((CONFIG_SYS_FREQ/CONFIG_PERIF2_FREQ)-1)&0x0F)<<4) \
+ |((((CONFIG_SYS_FREQ/CONFIG_PERIF3_FREQ)-1)&0x7F)<<16))
+
+/* SDRAM controller programming Values */
+#if ((CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1>(3*CONFIG_SYS_HCLK_LGTH))\
+ ||(CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1<1))
+#define REG_FIELD_SCL_VAL 3
+#else
+#define REG_FIELD_SCL_VAL\
+ ((CONFIG_SYS_SDRAM_CLOCK_CYCLE_CL_1+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)
+#endif
+
+#if ((CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY>(2*CONFIG_SYS_HCLK_LGTH))\
+ ||(CONFIG_SYS_SDRAM_ROW_PRECHARGE_DELAY<1))
+#define REG_FIELD_SRP_VAL 0
+#else
+#define REG_FIELD_SRP_VAL 1
+#endif
+
+#if (CONFIG_SYS_SDRAM_ROW_2_COL_DELAY>(3*CONFIG_SYS_HCLK_LGTH))
+#define REG_FIELD_SRCD_VAL 0
+#else
+#define REG_FIELD_SRCD_VAL\
+ ((CONFIG_SYS_SDRAM_ROW_2_COL_DELAY+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)
+#endif
+
+#if (CONFIG_SYS_SDRAM_ROW_CYCLE_DELAY>(7*CONFIG_SYS_HCLK_LGTH))
+#define REG_FIELD_SRC_VAL 0
+#else
+#define REG_FIELD_SRC_VAL\
+ ((CONFIG_SYS_SDRAM_ROW_CYCLE_DELAY+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)
+#endif
+
+#define REG_SDCTL_BASE_CONFIG (0x800a1000\
+ | (((CONFIG_SYS_SDRAM_NUM_ROW-11)&0x3)<<24)\
+ | (((CONFIG_SYS_SDRAM_NUM_COL-8)&0x3)<<20)\
+ | (((CONFIG_SYS_SDRAM_REFRESH)&0x3)<<14)\
+ | (((REG_FIELD_SCL_VAL)&0x3)<<8)\
+ | (((REG_FIELD_SRP_VAL)&0x1)<<6)\
+ | (((REG_FIELD_SRCD_VAL)&0x3)<<4)\
+ | (((REG_FIELD_SRC_VAL)&0x7)<<0))
+
+#define CONFIG_SYS_NORMAL_RW_CMD ((0x0<<28)+REG_SDCTL_BASE_CONFIG)
+#define CONFIG_SYS_PRECHARGE_CMD ((0x1<<28)+REG_SDCTL_BASE_CONFIG)
+#define CONFIG_SYS_AUTOREFRESH_CMD ((0x2<<28)+REG_SDCTL_BASE_CONFIG)
+#define CONFIG_SYS_SET_MODE_REG_CMD ((0x3<<28)+REG_SDCTL_BASE_CONFIG)
+
+/* Issue Mode register Command to SDRAM*/
+#define CONFIG_SYS_SDRAM_MODE_REGISTER_VAL\
+ ((((CONFIG_SYS_SDRAM_BURST_LENGTH)&0x7)<<(CONFIG_SYS_SDRAM_NUM_COL+4))\
+ | (((REG_FIELD_SCL_VAL)&0x3)<<(CONFIG_SYS_SDRAM_NUM_COL+4+4))\
+ | (((CONFIG_SYS_SDRAM_SINGLE_ACCESS)&0x1)<<(CONFIG_SYS_SDRAM_NUM_COL+4+9)))
+
+/* Issue Precharge all Command to SDRAM*/
+#define CONFIG_SYS_SDRAM_PRECHARGE_ALL_VAL\
+ (((CONFIG_SYS_SDRAM_SINGLE_ACCESS)&0x1)<<(CONFIG_SYS_SDRAM_NUM_COL+4+9))
+
+/* undef CONFIG_INIT_CRITICAL is no more required to boot from sdram */
+#undef CONFIG_INIT_CRITICAL
+
+/*
+ * CSxU_VAL:
+ * 63| x |x|x x|x x x x|x x| x | x |x x x x|48
+ * |DTACK_SEL|0|BCD| BCS |PSZ|PME|SYNC| DOL |
+ *
+ * 47| x x | x x x x x x | x | x x x x | x x x x |32
+ * | CNC | WSC | 0 | WWS | EDC |
+ *
+ * CSxL_VAL:
+ * 31| x x x x | x x x x | x x x x | x x x x |24
+ * | OEA | OEN | WEA | WEN |
+ * 23|x x x x| x | x x x | x x x x |x x| x | x | 0
+ * | CSA |EBC| DSZ | 0|SP|0|WP|0 0|PA |CSEN |
+ */
+#define CONFIG_SYS_CS0U_VAL\
+ ((((CONFIG_SYS_CS0_XTRA_DEAD_CYC+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)\
+ |((((CONFIG_SYS_CS0_WRITE_XTRA_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<4)\
+ |(((((CONFIG_SYS_CS0_READ_CYC_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)-1)&0x3F)<<8)\
+ |((((CONFIG_SYS_CS0_CS_NEG_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x03)<<14)\
+ |((((CONFIG_SYS_CS0_SYNC_DAT_OUT_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |((CONFIG_SYS_CS0_SYNC_ENABLE&0x01)<<20)\
+ |((CONFIG_SYS_CS0_SYNC_PAGE_MODE_EMUL&0x01)<<21)\
+ |((CONFIG_SYS_CS0_SYNC_PAGE_SIZE&0x03)<<22)\
+ |((((CONFIG_SYS_CS0_SYNC_BURST_CLK_START+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |((CONFIG_SYS_CS0_SYNC_BURST_CLK_DIV&0x03)<<28))
+
+#define CONFIG_SYS_CS0L_VAL\
+ ((CONFIG_SYS_CS0_CHIP_SELECT_ENABLE&0x01)\
+ |((CONFIG_SYS_CS0_WRITE_PROTECT&0x01)<<4)\
+ |((CONFIG_SYS_CS0_SUPERVISOR_PROTECT&0x01)<<6)\
+ |((CONFIG_SYS_CS0_DATA_PORT_SIZE&0x07)<<8)\
+ |((CONFIG_SYS_CS0_EB_SIGNAL_CONTROL_WRITE&0x01)<<11)\
+ |((((CONFIG_SYS_CS0_CS_ASSERT_NEG_DLY+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<12)\
+ |(((((CONFIG_SYS_CS0_EB_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |(((((CONFIG_SYS_CS0_EB_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<20)\
+ |(((((CONFIG_SYS_CS0_OE_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |(((((CONFIG_SYS_CS0_OE_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<28))
+
+#define CONFIG_SYS_CS1U_VAL\
+ ((((CONFIG_SYS_CS1_XTRA_DEAD_CYC+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)\
+ |((((CONFIG_SYS_CS1_WRITE_XTRA_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<4)\
+ |(((((CONFIG_SYS_CS1_READ_CYC_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)-1)&0x3F)<<8)\
+ |((((CONFIG_SYS_CS1_CS_NEG_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x03)<<14)\
+ |((((CONFIG_SYS_CS1_SYNC_DAT_OUT_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |((CONFIG_SYS_CS1_SYNC_ENABLE&0x01)<<20)\
+ |((CONFIG_SYS_CS1_SYNC_PAGE_MODE_EMUL&0x01)<<21)\
+ |((CONFIG_SYS_CS1_SYNC_PAGE_SIZE&0x03)<<22)\
+ |((((CONFIG_SYS_CS1_SYNC_BURST_CLK_START+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |((CONFIG_SYS_CS1_SYNC_BURST_CLK_DIV&0x03)<<28))
+
+#define CONFIG_SYS_CS1L_VAL\
+ ((CONFIG_SYS_CS1_CHIP_SELECT_ENABLE&0x01)\
+ |((CONFIG_SYS_CS1_PIN_ASSERT&0x01)<<1)\
+ |((CONFIG_SYS_CS1_WRITE_PROTECT&0x01)<<4)\
+ |((CONFIG_SYS_CS1_SUPERVISOR_PROTECT&0x01)<<6)\
+ |((CONFIG_SYS_CS1_DATA_PORT_SIZE&0x07)<<8)\
+ |((CONFIG_SYS_CS1_EB_SIGNAL_CONTROL_WRITE&0x01)<<11)\
+ |((((CONFIG_SYS_CS1_CS_ASSERT_NEG_DLY+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<12)\
+ |(((((CONFIG_SYS_CS1_EB_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |(((((CONFIG_SYS_CS1_EB_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<20)\
+ |(((((CONFIG_SYS_CS1_OE_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |(((((CONFIG_SYS_CS1_OE_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<28))
+
+#define CONFIG_SYS_CS2U_VAL\
+ (((((CONFIG_SYS_CS2_XTRA_DEAD_CYC+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)\
+ |((((CONFIG_SYS_CS2_WRITE_XTRA_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<4)\
+ |(((((CONFIG_SYS_CS2_READ_CYC_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)-1)&0x3F)<<8)\
+ |((((CONFIG_SYS_CS2_CS_NEG_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x03)<<14)\
+ |(((CONFIG_SYS_CS2_SYNC_DAT_OUT_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |((CONFIG_SYS_CS2_SYNC_ENABLE&0x01)<<20)\
+ |((CONFIG_SYS_CS2_SYNC_PAGE_MODE_EMUL&0x01)<<21)\
+ |((CONFIG_SYS_CS2_SYNC_PAGE_SIZE&0x03)<<22)\
+ |((((CONFIG_SYS_CS2_SYNC_BURST_CLK_START+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |((CONFIG_SYS_CS2_SYNC_BURST_CLK_DIV&0x03)<<28))
+
+#define CONFIG_SYS_CS2L_VAL\
+ ((CONFIG_SYS_CS2_CHIP_SELECT_ENABLE&0x01)\
+ |((CONFIG_SYS_CS2_PIN_ASSERT&0x01)<<1)\
+ |((CONFIG_SYS_CS2_WRITE_PROTECT&0x01)<<4)\
+ |((CONFIG_SYS_CS2_SUPERVISOR_PROTECT&0x01)<<6)\
+ |((CONFIG_SYS_CS2_DATA_PORT_SIZE&0x07)<<8)\
+ |((CONFIG_SYS_CS2_EB_SIGNAL_CONTROL_WRITE&0x01)<<11)\
+ |((((CONFIG_SYS_CS2_CS_ASSERT_NEG_DLY+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<12)\
+ |(((((CONFIG_SYS_CS2_EB_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |(((((CONFIG_SYS_CS2_EB_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<20)\
+ |(((((CONFIG_SYS_CS2_OE_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |(((((CONFIG_SYS_CS2_OE_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<28))
+
+#define CONFIG_SYS_CS3U_VAL\
+ ((((CONFIG_SYS_CS3_XTRA_DEAD_CYC+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)\
+ |((((CONFIG_SYS_CS3_WRITE_XTRA_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<4)\
+ |(((((CONFIG_SYS_CS3_READ_CYC_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)-1)&0x3F)<<8)\
+ |((((CONFIG_SYS_CS3_CS_NEG_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x03)<<14)\
+ |((((CONFIG_SYS_CS3_SYNC_DAT_OUT_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |((CONFIG_SYS_CS3_SYNC_ENABLE&0x01)<<20)\
+ |((CONFIG_SYS_CS3_SYNC_PAGE_MODE_EMUL&0x01)<<21)\
+ |((CONFIG_SYS_CS3_SYNC_PAGE_SIZE&0x03)<<22)\
+ |((((CONFIG_SYS_CS3_SYNC_BURST_CLK_START+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |((CONFIG_SYS_CS3_SYNC_BURST_CLK_DIV&0x03)<<28))
+
+#define CONFIG_SYS_CS3L_VAL\
+ ((CONFIG_SYS_CS3_CHIP_SELECT_ENABLE&0x01)\
+ |((CONFIG_SYS_CS3_PIN_ASSERT&0x01)<<1)\
+ |((CONFIG_SYS_CS3_WRITE_PROTECT&0x01)<<4)\
+ |((CONFIG_SYS_CS3_SUPERVISOR_PROTECT&0x01)<<6)\
+ |((CONFIG_SYS_CS3_DATA_PORT_SIZE&0x07)<<8)\
+ |((CONFIG_SYS_CS3_EB_SIGNAL_CONTROL_WRITE&0x01)<<11)\
+ |((((CONFIG_SYS_CS3_CS_ASSERT_NEG_DLY+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<12)\
+ |(((((CONFIG_SYS_CS3_EB_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |(((((CONFIG_SYS_CS3_EB_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<20)\
+ |(((((CONFIG_SYS_CS3_OE_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |(((((CONFIG_SYS_CS3_OE_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<28))
+
+#define CONFIG_SYS_CS4U_VAL\
+ (((((CONFIG_SYS_CS4_XTRA_DEAD_CYC+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)\
+ |((((CONFIG_SYS_CS4_WRITE_XTRA_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<4)\
+ |(((((CONFIG_SYS_CS4_READ_CYC_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)-1)&0x3F)<<8)\
+ |((((CONFIG_SYS_CS4_CS_NEG_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x03)<<14)\
+ |((((CONFIG_SYS_CS4_SYNC_DAT_OUT_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16))\
+ |((CONFIG_SYS_CS4_SYNC_ENABLE&0x01)<<20)\
+ |((CONFIG_SYS_CS4_SYNC_PAGE_MODE_EMUL&0x01)<<21)\
+ |((CONFIG_SYS_CS4_SYNC_PAGE_SIZE&0x03)<<22)\
+ |((((CONFIG_SYS_CS4_SYNC_BURST_CLK_START+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |((CONFIG_SYS_CS4_SYNC_BURST_CLK_DIV&0x03)<<28))
+
+#define CONFIG_SYS_CS4L_VAL\
+ ((CONFIG_SYS_CS4_CHIP_SELECT_ENABLE&0x01)\
+ |((CONFIG_SYS_CS4_PIN_ASSERT&0x01)<<1)\
+ |((CONFIG_SYS_CS4_WRITE_PROTECT&0x01)<<4)\
+ |((CONFIG_SYS_CS4_SUPERVISOR_PROTECT&0x01)<<6)\
+ |((CONFIG_SYS_CS4_DATA_PORT_SIZE&0x07)<<8)\
+ |((CONFIG_SYS_CS4_EB_SIGNAL_CONTROL_WRITE&0x01)<<11)\
+ |((((CONFIG_SYS_CS4_CS_ASSERT_NEG_DLY+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<12)\
+ |(((((CONFIG_SYS_CS4_EB_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |(((((CONFIG_SYS_CS4_EB_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<20)\
+ |(((((CONFIG_SYS_CS4_OE_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |(((((CONFIG_SYS_CS4_OE_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<28))
+
+#define CONFIG_SYS_CS5U_VAL\
+ ((((CONFIG_SYS_CS5_XTRA_DEAD_CYC+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)\
+ |((((CONFIG_SYS_CS5_WRITE_XTRA_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<4)\
+ |(((((CONFIG_SYS_CS5_READ_CYC_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)-1)&0x3F)<<8)\
+ |((((CONFIG_SYS_CS5_CS_NEG_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x03)<<14)\
+ |((((CONFIG_SYS_CS5_SYNC_DAT_OUT_LGTH+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |((CONFIG_SYS_CS5_SYNC_ENABLE&0x01)<<20)\
+ |((CONFIG_SYS_CS5_SYNC_PAGE_MODE_EMUL&0x01)<<21)\
+ |((CONFIG_SYS_CS5_SYNC_PAGE_SIZE&0x03)<<22)\
+ |((((CONFIG_SYS_CS5_SYNC_BURST_CLK_START+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |((CONFIG_SYS_CS5_SYNC_BURST_CLK_DIV&0x03)<<28)\
+ |((CONFIG_SYS_CS5_DTACK_SELECT&0x01)<<31))
+
+#define CONFIG_SYS_CS5L_VAL\
+ ((CONFIG_SYS_CS5_CHIP_SELECT_ENABLE&0x01)\
+ |((CONFIG_SYS_CS5_PIN_ASSERT&0x01)<<1)\
+ |((CONFIG_SYS_CS5_WRITE_PROTECT&0x01)<<4)\
+ |((CONFIG_SYS_CS5_SUPERVISOR_PROTECT&0x01)<<6)\
+ |((CONFIG_SYS_CS5_DATA_PORT_SIZE&0x07)<<8)\
+ |((CONFIG_SYS_CS5_EB_SIGNAL_CONTROL_WRITE&0x01)<<11)\
+ |((((CONFIG_SYS_CS5_CS_ASSERT_NEG_DLY+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<12)\
+ |(((((CONFIG_SYS_CS5_EB_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<16)\
+ |(((((CONFIG_SYS_CS5_EB_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<20)\
+ |(((((CONFIG_SYS_CS5_OE_NEG_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<24)\
+ |(((((CONFIG_SYS_CS5_OE_ASSERT_DLY*2)+CONFIG_SYS_HCLK_LGTH-1)/CONFIG_SYS_HCLK_LGTH)&0x0F)<<28))
+
+#endif /* __CONFIG_H */
diff --git a/buildroot/target/device/armadeus/apf9328/apf9328_defconfig b/buildroot/target/device/armadeus/apf9328/apf9328_defconfig
index 52783a4..07bb0e6 100644
--- a/buildroot/target/device/armadeus/apf9328/apf9328_defconfig
+++ b/buildroot/target/device/armadeus/apf9328/apf9328_defconfig
@@ -126,7 +126,7 @@ BR2_TOPDIR_SUFFIX=""
BR2_ROOTFS_PREFIX="$(BR2_BOARD_NAME)-rootfs"
BR2_ROOTFS_SUFFIX=""
BR2_GNU_BUILD_SUFFIX="pc-linux-gnu"
-BR2_GNU_TARGET_SUFFIX="linux-uclibc"
+BR2_GNU_TARGET_SUFFIX="linux-uclibcgnueabi"
BR2_JLEVEL=1
# BR2_PREFER_IMA is not set
# BR2_DEPRECATED is not set
@@ -769,6 +769,18 @@ BR2_TARGET_ROOTFS_TAR_COPYTO=""
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME).h"
+BR2_TARGET_UBOOT_1_3_4=y
+# BR2_TARGET_UBOOT_2010_03 is not set
+# BR2_TARGET_UBOOT_2009_11 is not set
+# BR2_TARGET_UBOOT_2009_08 is not set
+# BR2_TARGET_UBOOT_2009_06 is not set
+# BR2_TARGET_UBOOT_2009_03 is not set
+# BR2_TARGET_UBOOT_2009_01 is not set
+# BR2_TARGET_UBOOT_2008_10 is not set
+# BR2_TARGET_UBOOT_1_2_0_ATMEL is not set
+BR2_UBOOT_VERSION="1.3.4"
+BR2_U_BOOT_SITE="ftp://ftp.denx.de/pub/u-boot"
+# BR2_TARGET_U_BOOT_ARCH_PATCH is not set
BR2_TARGET_UBOOT_CUSTOM_PATCH=""
BR2_TARGET_UBOOT_SERVERIP=""
BR2_TARGET_UBOOT_IPADDR=""
diff --git a/buildroot/target/u-boot/u-boot-1.3.4-100-imx.patch b/buildroot/target/u-boot/u-boot-2010.03-rc2-100-imx.patch
similarity index 74%
copy from buildroot/target/u-boot/u-boot-1.3.4-100-imx.patch
copy to buildroot/target/u-boot/u-boot-2010.03-rc2-100-imx.patch
index ff779bd..01dcaca 100644
--- a/buildroot/target/u-boot/u-boot-1.3.4-100-imx.patch
+++ b/buildroot/target/u-boot/u-boot-2010.03-rc2-100-imx.patch
@@ -1,18 +1,27 @@
-diff -purN u-boot-1.3.4.ref/cpu/arm920t/imx/interrupts.c u-boot-1.3.4/cpu/arm920t/imx/interrupts.c
---- u-boot-1.3.4.ref/cpu/arm920t/imx/interrupts.c 2008-08-12 16:08:38.000000000 +0200
-+++ u-boot-1.3.4/cpu/arm920t/imx/interrupts.c 2008-09-13 16:16:58.000000000 +0200
-@@ -60,7 +60,7 @@ void reset_timer (void)
+--- u-boot-2010.03-rc2/cpu/arm920t/imx/timer.c.ori 2010-03-22 23:25:00.000000000 +0100
++++ u-boot-2010.03-rc2/cpu/arm920t/imx/timer.c 2010-03-30 22:35:41.000000000 +0200
+@@ -75,16 +75,16 @@ void reset_timer_masked (void)
- ulong get_timer (ulong base)
+ ulong get_timer_masked (void)
{
-- return get_timer_masked ();
-+ return get_timer_masked () - base;
+- return TCN1;
++ return TCN1/1000l;
}
- void set_timer (ulong t)
-diff -purN u-boot-1.3.4.ref/cpu/arm920t/imx/speed.c u-boot-1.3.4/cpu/arm920t/imx/speed.c
---- u-boot-1.3.4.ref/cpu/arm920t/imx/speed.c 2008-08-12 16:08:38.000000000 +0200
-+++ u-boot-1.3.4/cpu/arm920t/imx/speed.c 2008-09-13 16:16:58.000000000 +0200
+ void udelay_masked (unsigned long usec)
+ {
+- ulong endtime = get_timer_masked() + usec;
++ ulong endtime = TCN1 + usec;
+ signed long diff;
+
+ do {
+- ulong now = get_timer_masked ();
++ ulong now = TCN1;
+ diff = endtime - now;
+ } while (diff >= 0);
+ }
+--- u-boot.ref/cpu/arm920t/imx/speed.c 2008-08-12 16:08:38.000000000 +0200
++++ u-boot/cpu/arm920t/imx/speed.c 2008-09-13 16:16:58.000000000 +0200
@@ -36,33 +36,27 @@
* the specified bus in HZ.
*/
@@ -67,9 +76,8 @@ diff -purN u-boot-1.3.4.ref/cpu/arm920t/imx/speed.c u-boot-1.3.4/cpu/arm920t/imx
return get_systemPLLCLK() / bclkdiv;
}
-diff -purN u-boot-1.3.4.ref/include/asm-arm/arch-imx/imx-regs.h u-boot-1.3.4/include/asm-arm/arch-imx/imx-regs.h
---- u-boot-1.3.4.ref/include/asm-arm/arch-imx/imx-regs.h 2008-08-12 16:08:38.000000000 +0200
-+++ u-boot-1.3.4/include/asm-arm/arch-imx/imx-regs.h 2008-09-13 16:16:58.000000000 +0200
+--- u-boot.ref/include/asm-arm/arch-imx/imx-regs.h 2008-08-12 16:08:38.000000000 +0200
++++ u-boot/include/asm-arm/arch-imx/imx-regs.h 2008-09-13 16:16:58.000000000 +0200
@@ -631,4 +631,27 @@
#define TSTAT_CAPT (1<<1) /* Capture event */
#define TSTAT_COMP (1) /* Compare event */
diff --git a/buildroot/target/u-boot/u-boot-1.3.4-110-apf9328.patch b/buildroot/target/u-boot/u-boot-2010.03-rc2-110-apf9328.patch
similarity index 83%
copy from buildroot/target/u-boot/u-boot-1.3.4-110-apf9328.patch
copy to buildroot/target/u-boot/u-boot-2010.03-rc2-110-apf9328.patch
index c282d4e..0e214f6 100644
--- a/buildroot/target/u-boot/u-boot-1.3.4-110-apf9328.patch
+++ b/buildroot/target/u-boot/u-boot-2010.03-rc2-110-apf9328.patch
@@ -1,5 +1,5 @@
---- ref/u-boot-1.3.4/board/armadeus/apf9328/apf9328.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf9328/apf9328.c 2008-11-14 00:48:19.000000000 +0100
+--- ref/u-boot/board/armadeus/apf9328/apf9328.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot/board/armadeus/apf9328/apf9328.c 2008-11-14 00:48:19.000000000 +0100
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
@@ -26,7 +26,7 @@
+#include "apf9328fpga.h"
+
+extern void imx_gpio_mode (int gpio_mode);
-+#if (CFG_FLASH_CFI) && (CFG_FLASH_CFI_DRIVER)
++#if (CONFIG_FLASH_CFI_DRIVER)
+extern flash_info_t flash_info[];
+#endif
+int
@@ -49,12 +49,12 @@
+ DECLARE_GLOBAL_DATA_PTR;
+
+#if ( CONFIG_NR_DRAM_BANKS > 0 )
-+ gd->bd->bi_dram[0].start = CFG_SDRAM_1_BASE;
-+ gd->bd->bi_dram[0].size = CFG_SDRAM_1_SIZE;
++ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_1_BASE;
++ gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_1_SIZE;
+#endif
+#if ( CONFIG_NR_DRAM_BANKS > 1 )
-+ gd->bd->bi_dram[1].start = CFG_SDRAM_2_BASE;
-+ gd->bd->bi_dram[1].size = CFG_SDRAM_2_SIZE;
++ gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_2_BASE;
++ gd->bd->bi_dram[1].size = CONFIG_SYS_SDRAM_2_SIZE;
+#endif
+
+ return 0;
@@ -77,12 +77,12 @@
+#endif
+
+ /* adjust size of rootfs if needed */
-+#if (CFG_FLASH_CFI) && (CFG_FLASH_CFI_DRIVER)
++#if (CONFIG_FLASH_CFI_DRIVER)
+ s = getenv ("rootfs_len");
+ if (( NULL == s ) || (0 == strcmp(s, ""))) {
+ char rootfslen[16];
+ sprintf (rootfslen, "0x%lX", flash_info[0].size -
-+ (CONFIG_ROOTFS_ADDR - CFG_FLASH_BASE));
++ (CONFIG_ROOTFS_ADDR - CONFIG_SYS_FLASH_BASE));
+ setenv ("rootfs_len", rootfslen);
+ }
+#endif
@@ -102,8 +102,8 @@
+{
+ return;
+}
---- ref/u-boot-1.3.4/board/armadeus/apf9328/apf9328fpga.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf9328/apf9328fpga.c 2008-11-14 00:48:19.000000000 +0100
+--- ref/u-boot/board/armadeus/apf9328/apf9328fpga.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot/board/armadeus/apf9328/apf9328fpga.c 2008-11-14 00:48:19.000000000 +0100
@@ -0,0 +1,100 @@
+/*
+ * (C) Copyright 2005
@@ -184,10 +184,10 @@
+ DECLARE_GLOBAL_DATA_PTR;
+
+ int i,lout=1;
-+
++/*
+ PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n",
+ __FUNCTION__, __LINE__, gd->reloc_off);
-+ fpga_init (gd->reloc_off);
++*/ fpga_init ();
+
+ for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
+ PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__, __LINE__, i);
@@ -205,8 +205,8 @@
+}
+
+#endif /* CONFIG_FPGA */
---- ref/u-boot-1.3.4/board/armadeus/apf9328/apf9328fpga.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf9328/apf9328fpga.h 2008-11-14 00:48:19.000000000 +0100
+--- ref/u-boot/board/armadeus/apf9328/apf9328fpga.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot/board/armadeus/apf9328/apf9328fpga.h 2008-11-14 00:48:19.000000000 +0100
@@ -0,0 +1,31 @@
+/*
+ * (C) Copyright 2002
@@ -239,8 +239,8 @@
+
+#include "fpga.h"
+extern int apf9328_init_fpga (void);
---- ref/u-boot-1.3.4/board/armadeus/apf9328/config.mk 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf9328/config.mk 2008-11-14 00:48:19.000000000 +0100
+--- ref/u-boot/board/armadeus/apf9328/config.mk 1970-01-01 01:00:00.000000000 +0100
++++ u-boot/board/armadeus/apf9328/config.mk 2008-11-14 00:48:19.000000000 +0100
@@ -0,0 +1,10 @@
+#
+# This config file is used for compilation of armadeus sources
@@ -252,8 +252,8 @@
+#
+
+TEXT_BASE = 0x0BF80000
---- ref/u-boot-1.3.4/board/armadeus/apf9328/fpga.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf9328/fpga.c 2008-11-14 00:48:19.000000000 +0100
+--- ref/u-boot/board/armadeus/apf9328/fpga.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot/board/armadeus/apf9328/fpga.c 2008-11-14 00:48:19.000000000 +0100
@@ -0,0 +1,140 @@
+/*
+ * (C) Copyright 2002
@@ -309,11 +309,11 @@
+/*
+ * Port bit numbers for the serial slave controls
+ */
-+#define FPGA_INIT CFG_FPGA_INIT
-+#define FPGA_DONE CFG_FPGA_DONE
-+#define FPGA_DIN CFG_FPGA_DATA
-+#define FPGA_PROGRAM CFG_FPGA_PRG
-+#define FPGA_CLOCK CFG_FPGA_CLK
++#define FPGA_INIT CONFIG_SYS_FPGA_INIT
++#define FPGA_DONE CONFIG_SYS_FPGA_DONE
++#define FPGA_DIN CONFIG_SYS_FPGA_DATA
++#define FPGA_PROGRAM CONFIG_SYS_FPGA_PRG
++#define FPGA_CLOCK CONFIG_SYS_FPGA_CLK
+
+/* Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
@@ -395,8 +395,8 @@
+}
+
+#endif /* CONFIG_FPGA */
---- ref/u-boot-1.3.4/board/armadeus/apf9328/fpga.h 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf9328/fpga.h 2008-11-14 00:48:19.000000000 +0100
+--- ref/u-boot/board/armadeus/apf9328/fpga.h 1970-01-01 01:00:00.000000000 +0100
++++ u-boot/board/armadeus/apf9328/fpga.h 2008-11-14 00:48:19.000000000 +0100
@@ -0,0 +1,30 @@
+/*
+ * (C) Copyright 2002
@@ -428,9 +428,9 @@
+extern int fpga_done_fn (int cookie);
+extern int fpga_clk_fn (int assert_clk, int flush, int cookie);
+extern int fpga_wr_fn (int assert_write, int flush, int cookie);
---- ref/u-boot-1.3.4/board/armadeus/apf9328/i2c.c 1970-01-01 01:00:00.000000000 +0100
-+++ u-boot-1.3.4/board/armadeus/apf9328/i2c.c 2008-11-14 00:48:19.000000000 +0100
-@@ -0,0 +1,327 @@
+--- ref/u-boot/board/armadeus/apf9328/i2c.c 1970-01-01 01:00:00.000000000 +0100
++++ u-boot/board/armadeus/apf9328/i2c.c 2008-11-14 00:48:19.000000000 +0100
+@@ -0,0 +1,305 @@
+/*
+ * Eric Jarrige <jo...@us...>
+ *
@@ -633,7 +633,7 @@
+ PRINTD ("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
+ chip, addr, alen, buffer, len);
+
-+#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
++#ifdef CONFIG_SYS_I2C_EEPROM_ADD...
[truncated message content] |
|
From: Julien B a. A. <ar...@us...> - 2010-03-30 14:28:37
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 53cdca87ed4f7117dadf0cd6065d60e853f46a43 (commit)
from 47a71e03db3c940875edc76e14b7cf79faaa2747 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 53cdca87ed4f7117dadf0cd6065d60e853f46a43
Author: Julien Boibessot <jul...@ar...>
Date: Tue Mar 30 16:28:14 2010 +0200
[LINUX] Add the possibility to use the 2nd Audio/Mic input of the TSC2101 (when available)
-----------------------------------------------------------------------
Summary of changes:
.../2.6.29/073-armadeus-tsc2102.patch | 112 +++++++++++----
...-armadeus-alsa-add_imx_ssi_tsc2102_driver.patch | 153 ++++++++++++++++++--
2 files changed, 226 insertions(+), 39 deletions(-)
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/073-armadeus-tsc2102.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/073-armadeus-tsc2102.patch
index b70bfa7..17b2e6c 100644
--- a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/073-armadeus-tsc2102.patch
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/073-armadeus-tsc2102.patch
@@ -4,8 +4,8 @@ DON'T EDIT IT OR YOUR MODIFICATIONS WILL BE LOST
Index: linux-2.6.29.6/include/linux/spi/tsc2102.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/include/linux/spi/tsc2102.h 2010-02-24 15:11:28.000000000 +0100
-@@ -0,0 +1,302 @@
++++ linux-2.6.29.6/include/linux/spi/tsc2102.h 2010-03-30 15:55:09.000000000 +0200
+@@ -0,0 +1,306 @@
+/*
+ * include/linux/spi/tsc2102.h
+ *
@@ -75,8 +75,12 @@ Index: linux-2.6.29.6/include/linux/spi/tsc2102.h
+extern void tsc210x_set_i2s_master(int state);
+extern void tsc210x_set_deemphasis(int enable);
+extern void tsc210x_set_bassboost(int enable);
++extern void tsc2101_set_micsel(uint8_t micsel);
++extern uint8_t tsc2101_get_micsel(void);
+extern void tsc2101_handset_mute(int enable);
+extern void tsc2101_set_handset_gain(uint8_t gain);
++extern void tsc2101_headset_mute(int enable);
++extern void tsc2101_set_headset_gain(uint8_t gain);
+#endif
+
+extern void tsc210x_keyclick(int amplitude, int freq, int length);
@@ -103,8 +107,8 @@ Index: linux-2.6.29.6/include/linux/spi/tsc2102.h
+
+/* Page 2, Audio Control registers */
+#define TSC2102_AUDIO1_CTRL TSC210X_REG(2, 0x00)
++#define TSC2101_HEADSET_AUX_PGA_CTRL TSC210X_REG(2, 0x01) /* TSC2101 only */
+#define TSC210X_DAC_GAIN_CTRL TSC210X_REG(2, 0x02)
-+#define TSC2101_HEADSET_GAIN_CTRL TSC210X_REG(2, 0x01) /* TSC2101 only */
+#define TSC2101_MIXER_PGA_CTRL TSC210X_REG(2, 0x03) /* TSC2101 only */
+#define TSC2102_AUDIO2_CTRL TSC210X_REG(2, 0x04)
+#define TSC210X_CODEC_POWER_CTRL TSC210X_REG(2, 0x05)
@@ -151,13 +155,13 @@ Index: linux-2.6.29.6/include/linux/spi/tsc2102.h
+#define AC1_ADCFS(ARG) (((ARG) & 0x07) << 0)
+/* on TSC2102 always set ADCFS = DACFS */
+
-+/* Field masks for Gain Control for Headset/Aux Input */
++/* Field masks for TSC2101_HEADSET_AUX_PGA_CTRL */
+/* TSC2101 only */
-+#define HGC_ADMUT_HED(ARG) (1 << 15)
-+#define HGC_ADPGA_HED(ARG) (((ARG) & 0x7f) << 8)
-+#define HGC_AGCTG_HED(ARG) (((ARG) & 0x07) << 5)
-+#define HGC_AGCTC_HED(ARG) (((ARG) & 0x0f) << 1)
-+#define HGC_AGCEN_HED(ARG) (1 << 0)
++#define ADMUT_HED (1 << 15)
++#define ADPGA_HED(ARG) (((ARG) & 0x7f) << 8)
++#define AGCTG_HED(ARG) (((ARG) & 0x07) << 5)
++#define AGCTC_HED(ARG) (((ARG) & 0x0f) << 1)
++#define AGCEN_HED(ARG) (1 << 0)
+
+/* Field masks for TSC2102_DAC_GAIN_CTRL */
+#define DGC_DALMU (1 << 15)
@@ -243,11 +247,11 @@ Index: linux-2.6.29.6/include/linux/spi/tsc2102.h
+/* !! FOLLOWING REGISTERS ARE ONLY AVAILABLE ON TSC2101 !! */
+
+/* Field masks for TSC2101_HANDSET_PGA_CTRL */
-+#define HIGC_ADMUT_HND (1 << 15)
-+#define HIGC_ADPGA_HND(ARG) (((ARG) & 0x7f) << 8)
-+#define HIGC_AGCTG_HND(ARG) (((ARG) & 0x07) << 5)
-+#define HIGC_AGCTC_HND(ARG) (((ARG) & 0x0f) << 1)
-+#define HIGC_AGCEN_HND(ARG) (1 << 0)
++#define ADMUT_HND (1 << 15)
++#define ADPGA_HND(ARG) (((ARG) & 0x7f) << 8)
++#define AGCTG_HND(ARG) (((ARG) & 0x07) << 5)
++#define AGCTC_HND(ARG) (((ARG) & 0x0f) << 1)
++#define AGCEN_HND(ARG) (1 << 0)
+
+/* Field masks for TSC2101_CELL_BUZZER_PGA_CTRL */
+#define CPBGC_MUT_CP (1 << 15)
@@ -311,8 +315,8 @@ Index: linux-2.6.29.6/include/linux/spi/tsc2102.h
Index: linux-2.6.29.6/drivers/spi/tsc2102.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/drivers/spi/tsc2102.c 2010-03-15 12:06:23.000000000 +0100
-@@ -0,0 +1,1198 @@
++++ linux-2.6.29.6/drivers/spi/tsc2102.c 2010-03-30 15:58:55.000000000 +0200
+@@ -0,0 +1,1250 @@
+/*
+ * drivers/spi/tsc2102.c
+ *
@@ -804,16 +808,35 @@ Index: linux-2.6.29.6/drivers/spi/tsc2102.c
+}
+EXPORT_SYMBOL(tsc210x_set_bassboost);
+
-+void tsc2101_handset_mute(int enable)
++void tsc2101_set_micsel(uint8_t micsel)
++{
++ u16 sel;
++
++ mutex_lock(&tsc.lock_sync);
++ sel = tsc210x_read_sync(TSC2101_MIXER_PGA_CTRL);
++ sel &= ~MPC_MICSEL(7); /* clear MICSEL */
++ sel |= MPC_MICSEL(micsel);
++ tsc210x_write_sync(TSC2101_MIXER_PGA_CTRL, sel);
++ mutex_unlock(&tsc.lock_sync);
++}
++EXPORT_SYMBOL_GPL(tsc2101_set_micsel);
++
++uint8_t tsc2101_get_micsel(void)
++{
++ return (uint8_t)((tsc210x_read_sync(TSC2101_MIXER_PGA_CTRL) >> 5) & 0x07);
++}
++EXPORT_SYMBOL_GPL(tsc2101_get_micsel);
++
++void tsc2101_handset_mute(int muted)
+{
+ u16 val;
+
+ mutex_lock(&tsc.lock_sync);
+ val = tsc210x_read_sync(TSC2101_HANDSET_PGA_CTRL);
-+ if (enable)
-+ val |= HIGC_ADMUT_HND;
++ if (muted)
++ val |= ADMUT_HND;
+ else
-+ val &= ~HIGC_ADMUT_HND;
++ val &= ~ADMUT_HND;
+ tsc210x_write_sync(TSC2101_HANDSET_PGA_CTRL, val);
+ mutex_unlock(&tsc.lock_sync);
+}
@@ -826,13 +849,41 @@ Index: linux-2.6.29.6/drivers/spi/tsc2102.c
+
+ mutex_lock(&tsc.lock_sync);
+ val = tsc210x_read_sync(TSC2101_HANDSET_PGA_CTRL);
-+ val &= ~HIGC_ADPGA_HND(0xff); /* clear current gain */
-+ val |= HIGC_ADPGA_HND(gain);
++ val &= ~ADPGA_HND(0xff); /* clear current gain */
++ val |= ADPGA_HND(gain);
+ tsc210x_write_sync(TSC2101_HANDSET_PGA_CTRL, val);
+ mutex_unlock(&tsc.lock_sync);
+}
+EXPORT_SYMBOL_GPL(tsc2101_set_handset_gain);
+
++void tsc2101_headset_mute(int muted)
++{
++ u16 val;
++
++ mutex_lock(&tsc.lock_sync);
++ val = tsc210x_read_sync(TSC2101_HEADSET_AUX_PGA_CTRL);
++ if (muted)
++ val |= ADMUT_HED;
++ else
++ val &= ~ADMUT_HED;
++ tsc210x_write_sync(TSC2101_HEADSET_AUX_PGA_CTRL, val);
++ mutex_unlock(&tsc.lock_sync);
++}
++EXPORT_SYMBOL_GPL(tsc2101_headset_mute);
++
++/* 0 -> 0dB, 127 -> 59,5dB (0.5dB stepping) */
++void tsc2101_set_headset_gain(uint8_t gain)
++{
++ u16 val;
++
++ mutex_lock(&tsc.lock_sync);
++ val = tsc210x_read_sync(TSC2101_HEADSET_AUX_PGA_CTRL);
++ val &= ~ADPGA_HED(0xff); /* clear current gain */
++ val |= ADPGA_HED(gain);
++ tsc210x_write_sync(TSC2101_HEADSET_AUX_PGA_CTRL, val);
++ mutex_unlock(&tsc.lock_sync);
++}
++EXPORT_SYMBOL_GPL(tsc2101_set_headset_gain);
+
+/* {rate, divisor (for AC1), fsref} */
+static const struct tsc210x_rate_info_s tsc210x_rates[] = {
@@ -991,8 +1042,14 @@ Index: linux-2.6.29.6/drivers/spi/tsc2102.c
+ tsc210x_write_sync(TSC2102_AUDIO2_CTRL, TSC210X_KEYCLICK_OFF);
+ /* 44.1 kHz Fsref, continuous transfer mode, master DAC */
+ tsc210x_write_sync(TSC2102_AUDIO3_CTRL, 0x2800);
-+ /* Soft-stepping enabled */
-+ tsc210x_write_sync(TSC2102_AUDIO4_CTRL, 0x0000);
++ if (tsc.kind == tsc2101) {
++ /* Soft-stepping enabled + MICBIAS_xx = 2.5V */
++ tsc210x_write_sync(TSC2102_AUDIO4_CTRL,
++ 0x0000 | AC4_MB_HED(1));
++ } else {
++ /* Soft-stepping enabled */
++ tsc210x_write_sync(TSC2102_AUDIO4_CTRL, 0x0000);
++ }
+ /* PLL generates 44.1 kHz */
+ tsc210x_set_fsref(44100);
+ /* Codec & DAC power up, virtual ground disabled */
@@ -1064,11 +1121,10 @@ Index: linux-2.6.29.6/drivers/spi/tsc2102.c
+ tsc210x_set_fsref(44100);
+
+ if (tsc.kind == tsc2101) {
-+ tsc210x_write_sync(TSC2101_AUDIO5_CTRL, /*AC5_AST2SPK1 |*/ AC5_DAC2SPK1(1) | AC5_DAC2SPK2(2)|AC5_HDSCPTC);
-+ tsc210x_write_sync(TSC2101_MIXER_PGA_CTRL, /*0x7f00*/ 0xc500 /* reset value */ | MPC_MICSEL(1) | MPC_MICADC);
-+ tsc210x_write_sync(TSC2101_HEADSET_GAIN_CTRL, HGC_ADPGA_HED(0));
++ tsc210x_write_sync(TSC2101_AUDIO5_CTRL, /*AC5_AST2SPK1 |*/ AC5_DAC2SPK1(1) | AC5_DAC2SPK2(2) | AC5_HDSCPTC);
++ tsc210x_write_sync(TSC2101_MIXER_PGA_CTRL, 0xc500 /* reset value */ | MPC_MICSEL(1) | MPC_MICADC);
++ tsc210x_write_sync(TSC2101_HEADSET_AUX_PGA_CTRL, ADPGA_HED(0));
+ tsc210x_write_sync(TSC2101_HANDSET_PGA_CTRL, 0x0000);
-+// tsc210x_write_sync(TSC210X_CODEC_POWER_CTRL, 0x00fc);
+ tsc210x_write_sync(TSC210X_CODEC_POWER_CTRL, 0xe2fc);
+ } else {
+ tsc210x_write_sync(TSC210X_CODEC_POWER_CTRL, TSC2102_DAC_ON);
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/091-armadeus-alsa-add_imx_ssi_tsc2102_driver.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/091-armadeus-alsa-add_imx_ssi_tsc2102_driver.patch
index 66ecf6e..51ba317 100644
--- a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/091-armadeus-alsa-add_imx_ssi_tsc2102_driver.patch
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/091-armadeus-alsa-add_imx_ssi_tsc2102_driver.patch
@@ -4,7 +4,7 @@ DON'T EDIT IT OR YOUR MODIFICATIONS WILL BE LOST
Index: linux-2.6.29.6/sound/arm/imx-alsa.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/sound/arm/imx-alsa.c 2010-01-19 10:32:20.000000000 +0100
++++ linux-2.6.29.6/sound/arm/imx-alsa.c 2010-03-25 12:28:12.000000000 +0100
@@ -0,0 +1,666 @@
+/*
+ * sound/arm/imx-alsa.c
@@ -675,7 +675,7 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa.c
Index: linux-2.6.29.6/sound/arm/imx-alsa-dma.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/sound/arm/imx-alsa-dma.h 2010-01-19 10:25:41.000000000 +0100
++++ linux-2.6.29.6/sound/arm/imx-alsa-dma.h 2010-03-25 12:28:12.000000000 +0100
@@ -0,0 +1,46 @@
+/*
+ * linux/sound/arm/imx/imx-alsa-dma.h
@@ -726,7 +726,7 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa-dma.h
Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/sound/arm/imx-alsa-tsc2102.c 2010-01-19 10:30:18.000000000 +0100
++++ linux-2.6.29.6/sound/arm/imx-alsa-tsc2102.c 2010-03-29 15:33:48.000000000 +0200
@@ -0,0 +1,441 @@
+/*
+ * sound/arm/imx-alsa-tsc2102.c
@@ -989,8 +989,8 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102.c
+ tsc210x_read_reg(TSC210X_DAC_GAIN_CTRL));
+
+ if (tsc210x_is_tsc2101()) {
-+ seq_printf(s, "TSC2101_HEADSET_GAIN_CTRL = 0x%04x\n",
-+ tsc210x_read_reg(TSC2101_HEADSET_GAIN_CTRL));
++ seq_printf(s, "TSC2101_HEADSET_AUX_PGA_CTRL = 0x%04x\n",
++ tsc210x_read_reg(TSC2101_HEADSET_AUX_PGA_CTRL));
+ seq_printf(s, "TSC2101_MIXER_PGA_CTRL = 0x%04x\n",
+ tsc210x_read_reg(TSC2101_MIXER_PGA_CTRL));
+ }
@@ -1172,8 +1172,8 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102.c
Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/sound/arm/imx-alsa-tsc2102.h 2010-01-19 10:25:41.000000000 +0100
-@@ -0,0 +1,48 @@
++++ linux-2.6.29.6/sound/arm/imx-alsa-tsc2102.h 2010-03-29 15:01:58.000000000 +0200
+@@ -0,0 +1,51 @@
+/*
+ * sound/arm/imx-alsa-tsc2102.h
+ *
@@ -1219,14 +1219,17 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102.h
+
+#define INPUT_HND_VOLUME_RANGE (0x7f)
+#define DEFAULT_INPUT_HND_VOLUME 50
++#define INPUT_HEAD_VOLUME_RANGE (0x7f)
++#define DEFAULT_INPUT_HEAD_VOLUME 50
++
+
+#endif /* IMX_ALSA_TSC2102_H_ */
+
Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102-mixer.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/sound/arm/imx-alsa-tsc2102-mixer.c 2010-01-19 10:25:41.000000000 +0100
-@@ -0,0 +1,425 @@
++++ linux-2.6.29.6/sound/arm/imx-alsa-tsc2102-mixer.c 2010-03-30 15:49:07.000000000 +0200
+@@ -0,0 +1,553 @@
+/*
+ * sound/arm/imx-alsa-tsc2102-mixer.c
+ *
@@ -1268,10 +1271,11 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102-mixer.c
+
+#include "imx-alsa-tsc2102.h"
+
++
+/* Audio Out: */
+static int vol[2], mute[2], filter[2];
+/* Audio In: */
-+static int hnd_vol, hnd_mute;
++static int hnd_vol, hnd_mute, head_vol, head_mute;
+
+/*
+ * Converts the Alsa mixer volume (0 - 100) to actual Digital
@@ -1327,6 +1331,22 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102-mixer.c
+ tsc2101_set_handset_gain(gain);
+}
+
++static void set_headset_volume(int volume)
++{
++ uint8_t gain;
++
++ if (volume > 100) {
++ head_vol = 100;
++ } else if (volume < 0) {
++ head_vol = 0;
++ } else {
++ head_vol = volume;
++ }
++ gain = (head_vol * INPUT_HEAD_VOLUME_RANGE) / 100;
++
++ tsc2101_set_headset_gain(gain);
++}
++
+void init_playback_targets(void)
+{
+ set_dac_gain_stereo(DEFAULT_OUTPUT_VOLUME, DEFAULT_OUTPUT_VOLUME);
@@ -1476,6 +1496,38 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102-mixer.c
+
+/* Capture controls (only available on TSC2101) */
+
++static int __capture_mux_enum_info(struct snd_kcontrol *kcontrol,
++ struct snd_ctl_elem_info *uinfo)
++{
++ static char *texts[3] = {
++ "Headset", "Handset", "None"
++ };
++ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
++ uinfo->count = 1;
++ uinfo->value.enumerated.items = 3;
++ if (uinfo->value.enumerated.item > 2)
++ uinfo->value.enumerated.item = 2;
++ strcpy(uinfo->value.enumerated.name,
++ texts[uinfo->value.enumerated.item]);
++ return 0;
++}
++
++static int __capture_mux_enum_get(
++ struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
++{
++ ucontrol->value.integer.value[0] = tsc2101_get_micsel();
++
++ return 0;
++}
++
++static int __capture_mux_enum_put(
++ struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
++{
++ tsc2101_set_micsel((uint8_t)(ucontrol->value.integer.value[0]));
++
++ return 1;
++}
++
+static int __handset_capture_volume_info(
+ struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
+{
@@ -1526,12 +1578,66 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102-mixer.c
+ struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+{
+ hnd_mute = (ucontrol->value.integer.value[0] == 0);
-+
+ tsc2101_handset_mute(hnd_mute);
+
+ return 1;
+}
+
++static int __headset_capture_volume_info(
++ struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
++{
++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++ uinfo->count = 1; /* Mono */
++ uinfo->value.integer.min = 0;
++ uinfo->value.integer.max = 100;
++
++ return 0;
++}
++
++static int __headset_capture_volume_get(
++ struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
++{
++ ucontrol->value.integer.value[0] = head_vol;
++
++ return 0;
++}
++
++static int __headset_capture_volume_put(
++ struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
++{
++ set_headset_volume(ucontrol->value.integer.value[0]); /* head_vol mod. here */
++
++ return 1;
++}
++
++static int __headset_capture_switch_info(
++ struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
++{
++ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++ uinfo->count = 1;
++ uinfo->value.integer.min = 0;
++ uinfo->value.integer.max = 1;
++
++ return 0;
++}
++
++static int __headset_capture_switch_get(
++ struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
++{
++ ucontrol->value.integer.value[0] = !head_mute;
++
++ return 0;
++}
++
++static int __headset_capture_switch_put(
++ struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
++{
++ head_mute = (ucontrol->value.integer.value[0] == 0);
++ tsc2101_headset_mute(head_mute);
++
++ return 1;
++}
++
+
+static struct snd_kcontrol_new tsc210x_control[] __devinitdata = {
+ {
@@ -1574,6 +1680,13 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102-mixer.c
+
+static struct snd_kcontrol_new tsc2101_control[] __devinitdata = {
+ {
++ .name = "Mic Capture Route",
++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
++ .info = __capture_mux_enum_info,
++ .get = __capture_mux_enum_get,
++ .put = __capture_mux_enum_put,
++ },
++ {
+ .name = "Handset Capture Volume",
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .index = 0,
@@ -1591,6 +1704,24 @@ Index: linux-2.6.29.6/sound/arm/imx-alsa-tsc2102-mixer.c
+ .get = __handset_capture_switch_get,
+ .put = __handset_capture_switch_put,
+ },
++ {
++ .name = "Headset Capture Volume",
++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
++ .index = 0,
++ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
++ .info = __headset_capture_volume_info,
++ .get = __headset_capture_volume_get,
++ .put = __headset_capture_volume_put,
++ },
++ {
++ .name = "Headset Capture Switch",
++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
++ .index = 0,
++ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
++ .info = __headset_capture_switch_info,
++ .get = __headset_capture_switch_get,
++ .put = __headset_capture_switch_put,
++ },
+};
+
+
hooks/post-receive
--
armadeus
|
|
From: Julien B a. A. <ar...@us...> - 2010-03-29 20:14:58
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 47a71e03db3c940875edc76e14b7cf79faaa2747 (commit)
from 29ead19457657e1354a631a8c968faaa4c454909 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 47a71e03db3c940875edc76e14b7cf79faaa2747
Author: Julien Boibessot <jul...@ar...>
Date: Mon Mar 29 22:13:14 2010 +0200
[BUILDROOT] Finalizes support for BR 2010.02 version
-----------------------------------------------------------------------
Summary of changes:
Makefile | 8 +++---
buildroot/configs/apf9328_defconfig | 27 +++++++++++---------
patches/buildroot/2010.02/040-linux-makefile.patch | 16 ++++++------
...0-linux-remove_unsupported_kernel_version.patch | 23 ++++++++++------
...-mplayer-replace_us_charset_with_utf8_one.patch | 26 -------------------
5 files changed, 41 insertions(+), 59 deletions(-)
delete mode 100644 patches/buildroot/2010.02/102-mplayer-replace_us_charset_with_utf8_one.patch
diff --git a/Makefile b/Makefile
index 9b1e1b5..b1fe77c 100644
--- a/Makefile
+++ b/Makefile
@@ -27,8 +27,8 @@ ARMADEUS_TOPDIR:=$(shell pwd)
export ARMADEUS_TOPDIR
#--- User configurable stuff:
-#BUILDROOT_SITE:=http://buildroot.uclibc.org/downloads/snapshots
-#BUILDROOT_VERSION:=20100221
+#BUILDROOT_SITE:=http://buildroot.uclibc.org/downloads
+#BUILDROOT_VERSION:=2010.02
#BUILDROOT_PATCH_DIR:=$(ARMADEUS_TOPDIR)/patches/buildroot/2010.02
BUILDROOT_SITE:=http://downloads.sourceforge.net/armadeus
BUILDROOT_VERSION:=20081103
@@ -39,7 +39,7 @@ BUILDROOT_SOURCE:=buildroot-$(BUILDROOT_VERSION).tar.bz2
#BUILDROOT_DIR is defined in ./Makefile.in
PATCH_DIR = patches
BUILDROOT_FILE_PATH:=downloads
-TAR_OPTIONS=--exclude=.svn --exclude=.git --exclude=.gitignore -xf
+TAR_OPTIONS=--exclude=.svn --exclude=.git --exclude=.gitignore --strip-component=1 -xf
ARMADEUS_ENV_FILE:=$(ARMADEUS_TOPDIR)/armadeus_env.sh
@@ -99,7 +99,7 @@ buildroot-sources: $(BUILDROOT_FILE_PATH)/$(BUILDROOT_SOURCE)
$(BUILDROOT_DIR)/.unpacked: $(BUILDROOT_FILE_PATH)/$(BUILDROOT_SOURCE) $(BUILDROOT_PATCH_DIR)/*.patch
$(BUILDROOT_PATCH_DIR)/cleanup_buildroot.sh
bzcat $(BUILDROOT_FILE_PATH)/$(BUILDROOT_SOURCE) | \
- tar -C $(ARMADEUS_TOPDIR) $(TAR_OPTIONS) -
+ tar -C $(BUILDROOT_DIR) $(TAR_OPTIONS) -
touch $@
buildroot-unpacked: $(BUILDROOT_DIR)/.unpacked
diff --git a/buildroot/configs/apf9328_defconfig b/buildroot/configs/apf9328_defconfig
index fca7fb3..dc2a427 100644
--- a/buildroot/configs/apf9328_defconfig
+++ b/buildroot/configs/apf9328_defconfig
@@ -1,9 +1,9 @@
#
# Automatically generated make config: don't edit
-# Sun Mar 21 13:16:38 2010
+# Mon Mar 29 22:02:48 2010
#
BR2_HAVE_DOT_CONFIG=y
-BR2_VERSION="2010.02-rc1"
+BR2_VERSION="2010.02"
# BR2_alpha is not set
BR2_arm=y
# BR2_armeb is not set
@@ -294,6 +294,7 @@ BR2_HOST_FAKEROOT=y
# BR2_PACKAGE_PKG_CONFIG is not set
# BR2_PACKAGE_READLINE is not set
# BR2_PACKAGE_PCRE is not set
+# BR2_PACKAGE_INTLTOOL is not set
#
# Armadeus specific packages
@@ -615,9 +616,9 @@ BR2_PACKAGE_ALSA_UTILS_SPEAKER_TEST=y
# text rendering libraries
#
BR2_PACKAGE_NCURSES=y
-# BR2_PACKAGE_NCURSES_TARGET_PANEL is not set
-# BR2_PACKAGE_NCURSES_TARGET_FORM is not set
-# BR2_PACKAGE_NCURSES_TARGET_MENU is not set
+BR2_PACKAGE_NCURSES_TARGET_PANEL=y
+BR2_PACKAGE_NCURSES_TARGET_FORM=y
+BR2_PACKAGE_NCURSES_TARGET_MENU=y
# BR2_PACKAGE_NEWT is not set
# BR2_PACKAGE_SLANG is not set
@@ -674,7 +675,6 @@ BR2_PACKAGE_NCURSES=y
# BR2_PACKAGE_LIBERATION is not set
# BR2_PACKAGE_LIBGLIB12 is not set
# BR2_PACKAGE_LIBGLIB2 is not set
-# BR2_PACKAGE_OPENMOTIF is not set
# BR2_PACKAGE_FONTCONFIG is not set
# BR2_PACKAGE_FREETYPE is not set
BR2_PACKAGE_TSLIB=y
@@ -689,7 +689,6 @@ BR2_PACKAGE_TSLIB=y
#
# BR2_PACKAGE_GOB2 is not set
# BR2_PACKAGE_SYLPHEED is not set
-# BR2_PACKAGE_XPDF is not set
#
# Compressors / decompressors
@@ -724,6 +723,7 @@ BR2_PACKAGE_ZLIB=y
# BR2_PACKAGE_LIBXML2 is not set
# BR2_PACKAGE_LIBXSLT is not set
# BR2_PACKAGE_XERCES is not set
+# BR2_PACKAGE_LIBXML_PARSER_PERL is not set
#
# Java
@@ -814,13 +814,15 @@ BR2_KERNEL_LINUX_ADVANCED=y
BR2_PACKAGE_LINUX=y
BR2_PACKAGE_LINUX_KCONFIG="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-$(BR2_LINUX26_VERSION).config"
BR2_PACKAGE_LINUX_FORMAT="uImage"
-BR2_KERNEL_CURRENT_VERSION="2.6.30.2"
-BR2_KERNEL_LATEST_2_6_30="2"
+BR2_KERNEL_CURRENT_VERSION="2.6.32.9"
+BR2_KERNEL_LATEST_2_6_32="9"
+BR2_KERNEL_LATEST_2_6_31="12"
+BR2_KERNEL_LATEST_2_6_30="10"
BR2_KERNEL_LATEST_2_6_29="6"
BR2_KERNEL_LATEST_2_6_28="10"
-BR2_KERNEL_LATEST_2_6_27="27"
+BR2_KERNEL_LATEST_2_6_27="45"
BR2_KERNEL_LATEST_2_6_26="8"
-BR2_KERNEL_LATEST_2_6_25="19"
+BR2_KERNEL_LATEST_2_6_25="20"
BR2_KERNEL_LATEST_2_6_24="7"
BR2_KERNEL_PATCH_LEVEL="$(BR2_KERNEL_MINORLEVEL)"
BR2_KERNEL_NEXT_VERSION="2.6.30"
@@ -830,6 +832,8 @@ BR2_MM_PATCH_SITE="http://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.
BR2_RC_MM_PATCH_DIR="$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)/2.6.$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)-mm$(BR2_KERNEL_MM_LEVEL)"
BR2_KERNEL_PATCH_SITE="$(BR2_KERNEL_SITE)"
# BR2_LINUX_2_6_STABLE is not set
+# BR2_LINUX_2_6_32 is not set
+# BR2_LINUX_2_6_31 is not set
# BR2_LINUX_2_6_30 is not set
BR2_LINUX_2_6_29=y
# BR2_LINUX_2_6_28 is not set
@@ -837,7 +841,6 @@ BR2_LINUX_2_6_29=y
# BR2_LINUX_2_6_26 is not set
# BR2_LINUX_2_6_25 is not set
# BR2_LINUX_2_6_24 is not set
-# BR2_LINUX_2_6_31 is not set
# BR2_LINUX26_CUSTOM is not set
#
diff --git a/patches/buildroot/2010.02/040-linux-makefile.patch b/patches/buildroot/2010.02/040-linux-makefile.patch
index d66c3c5..532af8d 100644
--- a/patches/buildroot/2010.02/040-linux-makefile.patch
+++ b/patches/buildroot/2010.02/040-linux-makefile.patch
@@ -1,16 +1,16 @@
--- buildroot/target/linux/Makefile.in.advanced 2007-10-27 09:15:08.000000000 +0200
+++ buildroot/target/linux/Makefile.in.advanced.new 2008-10-22 16:06:21.000000000 +0200
-@@ -43,7 +43,8 @@ endif
+@@ -41,7 +41,8 @@ endif
endif
-
+
# Ask the kernel what version number it will use when installing modules
--LINUX26_VERSION_PROBED = `$(MAKE) $(LINUX26_MAKE_FLAGS) -C $(LINUX26_DIR) -s kernelrelease`
+-LINUX26_VERSION_PROBED = `$(MAKE) $(LINUX26_MAKE_FLAGS) -C $(LINUX26_DIR) --no-print-directory -s kernelrelease`
+LINUX26_VERSION_PROBED = $(LINUX26_VERSION)
-+#`$(MAKE) $(LINUX26_MAKE_FLAGS) -C $(LINUX26_DIR) -s kernelrelease`
-
++#`$(MAKE) $(LINUX26_MAKE_FLAGS) -C $(LINUX26_DIR) --no-print-directory -s kernelrelease`
+
ifeq ($(BOARD_PATH),)
BOARD_PATH:=$(call qstrip,$(BR2_BOARD_PATH))
-@@ -159,8 +159,9 @@ endif
+@@ -158,8 +158,9 @@ endif
ROOTFS_STRIPPED_SUFFIX=$(call qstrip,$(ROOTFS_SUFFIX))
# -----------------------------------------------------------------------------
# File name for the Linux kernel binary
@@ -21,7 +21,7 @@
ifeq ($(BOARD_NAME),)
BOARD_NAME=$(ARCH)
-@@ -280,8 +282,8 @@ endif
+@@ -330,8 +332,8 @@ endif
$(SED) '/CONFIG_AEABI=y/d' $(LINUX26_DIR)/.config
ifeq ($(BR2_ARM_EABI),y)
echo "CONFIG_AEABI=y" >> $(LINUX26_DIR)/.config
@@ -32,7 +32,7 @@
else
echo "# CONFIG_AEABI is not set" >> $(LINUX26_DIR)/.config
endif
-@@ -310,6 +312,9 @@ ifeq ($(BR2_PACKAGE_BUSYBOX_INITRAMFS),y
+@@ -360,6 +362,9 @@ ifeq ($(BR2_PACKAGE_BUSYBOX_INITRAMFS),y
echo "CONFIG_INITRAMFS_ROOT_UID=0" >> $(LINUX26_DIR)/.config
echo "CONFIG_INITRAMFS_ROOT_GID=0" >> $(LINUX26_DIR)/.config
endif
diff --git a/patches/buildroot/2010.02/050-linux-remove_unsupported_kernel_version.patch b/patches/buildroot/2010.02/050-linux-remove_unsupported_kernel_version.patch
index 5b753fc..06d19d8 100644
--- a/patches/buildroot/2010.02/050-linux-remove_unsupported_kernel_version.patch
+++ b/patches/buildroot/2010.02/050-linux-remove_unsupported_kernel_version.patch
@@ -4,19 +4,29 @@ Index: buildroot/target/linux/Config.in.advanced
===================================================================
--- buildroot.orig/target/linux/Config.in.advanced 2010-02-03 13:21:18.000000000 +0100
+++ buildroot/target/linux/Config.in.advanced 2010-02-03 13:27:11.000000000 +0100
-@@ -122,9 +122,11 @@
+@@ -127,17 +127,21 @@
config BR2_LINUX_2_6_STABLE
- bool "The latest stable Linux kernel (2.6.30.2)"
+ bool "The latest stable Linux kernel (2.6.32.9)"
+ depends on !BR2_TARGET_ARMADEUS
+ config BR2_LINUX_2_6_32
+ bool "Linux 2.6.32"
++ depends on !BR2_TARGET_ARMADEUS
+ select BR2_KERNEL_BASE
+
+ config BR2_LINUX_2_6_31
+ bool "Linux 2.6.31"
++ depends on !BR2_TARGET_ARMADEUS
+ select BR2_KERNEL_BASE
+
config BR2_LINUX_2_6_30
bool "Linux 2.6.30"
+ depends on !BR2_TARGET_ARMADEUS
select BR2_KERNEL_BASE
config BR2_LINUX_2_6_29
-@@ -133,6 +135,7 @@
+@@ -146,6 +148,7 @@
config BR2_LINUX_2_6_28
bool "Linux 2.6.28"
@@ -24,7 +34,7 @@ Index: buildroot/target/linux/Config.in.advanced
select BR2_KERNEL_BASE
config BR2_LINUX_2_6_27
-@@ -141,18 +144,22 @@
+@@ -141,14 +144,17 @@
config BR2_LINUX_2_6_26
bool "Linux 2.6.26"
@@ -41,9 +51,4 @@ Index: buildroot/target/linux/Config.in.advanced
+ depends on !BR2_TARGET_ARMADEUS
select BR2_KERNEL_BASE
- config BR2_LINUX_2_6_31
- bool "Linux 2.6.31"
-+ depends on !BR2_TARGET_ARMADEUS
- select BR2_KERNEL_BASE
-
config BR2_LINUX26_CUSTOM
diff --git a/patches/buildroot/2010.02/102-mplayer-replace_us_charset_with_utf8_one.patch b/patches/buildroot/2010.02/102-mplayer-replace_us_charset_with_utf8_one.patch
deleted file mode 100644
index ce149b3..0000000
--- a/patches/buildroot/2010.02/102-mplayer-replace_us_charset_with_utf8_one.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-The mplayer configure script was failing with:
-
- Checking for iconv program ... no
- No working iconv program found, use
- --charset=UTF-8 to continue anyway.
- If you also have problems with iconv library functions use --charset=noconv.
- Messages in the GTK-2 interface will be broken then.
-
-Therefore, we pass --charset=UTF-8 instead of --charset=US-ASCII.
-
-Signed-off-by: Thomas Petazzoni <tho...@fr...>
-
-diff --git a/package/multimedia/mplayer/mplayer.mk b/package/multimedia/mplayer/mplayer.mk
-index 3d56ee0..538bac9 100644
---- a/package/multimedia/mplayer/mplayer.mk
-+++ b/package/multimedia/mplayer/mplayer.mk
-@@ -54,7 +54,7 @@ $(MPLAYER_DIR)/.configured: $(MPLAYER_DIR)/.unpacked
- --as=$(TARGET_CROSS)as \
- --with-extraincdir=$(STAGING_DIR)/usr/include \
- --with-extralibdir=$(STAGING_DIR)/lib \
-- --charset=US-ASCII \
-+ --charset=UTF-8 \
- --enable-mad \
- --enable-fbdev \
- $(MPLAYER_ENDIAN) \
--- 1.6.3.3
hooks/post-receive
--
armadeus
|
|
From: Julien B a. A. <ar...@us...> - 2010-03-25 11:33:02
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 29ead19457657e1354a631a8c968faaa4c454909 (commit)
from 42538d418479ea216367939ec181a459cf65878d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 29ead19457657e1354a631a8c968faaa4c454909
Author: Julien Boibessot <jul...@ar...>
Date: Thu Mar 25 12:32:29 2010 +0100
[LINUX] DM9000 chip is not an option on APF9328. Moreover, with this modification, DM9000 driver can now be used as module (Thanks to Cyril Wallois for the report and the correction idea)
-----------------------------------------------------------------------
Summary of changes:
.../2.6.29/021-armadeus-apf9328.patch | 20 ++++++--------------
1 files changed, 6 insertions(+), 14 deletions(-)
diff --git a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/021-armadeus-apf9328.patch b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/021-armadeus-apf9328.patch
index 2f6dfee..5201554 100644
--- a/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/021-armadeus-apf9328.patch
+++ b/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/021-armadeus-apf9328.patch
@@ -4,8 +4,8 @@ DON'T EDIT IT OR YOUR MODIFICATIONS WILL BE LOST
Index: linux-2.6.29.6/arch/arm/mach-imx/apf9328.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/arch/arm/mach-imx/apf9328.c 2009-10-07 14:48:32.000000000 +0200
-@@ -0,0 +1,635 @@
++++ linux-2.6.29.6/arch/arm/mach-imx/apf9328.c 2010-03-25 12:26:47.000000000 +0100
+@@ -0,0 +1,627 @@
+/*
+ * linux/arch/arm/mach-imx/apf9328.c
+ *
@@ -53,9 +53,7 @@ Index: linux-2.6.29.6/arch/arm/mach-imx/apf9328.c
+#include <mach/imx_ssi.h>
+#include <mach/dma.h>
+#include "../../../drivers/armadeus/pwm/pwm.h"
-+#ifdef CONFIG_DM9000
+#include <linux/dm9000.h>
-+#endif
+#ifdef CONFIG_MACH_APF9328_FPGA
+#include "../plat-mxc/include/mach/fpga.h" /* To be removed when MX1 arch is fully integrated */
+#endif
@@ -82,7 +80,6 @@ Index: linux-2.6.29.6/arch/arm/mach-imx/apf9328.c
+/*
+ * APF9328 has a DM9000 Ethernet controller
+ */
-+#ifdef CONFIG_DM9000
+static struct resource dm9000_resources[] = {
+ [0] = {
+ .start = (APF9328_ETH_PHYS + 0),
@@ -112,7 +109,6 @@ Index: linux-2.6.29.6/arch/arm/mach-imx/apf9328.c
+ .resource = dm9000_resources,
+ .dev = { .platform_data = &dm9000_setup, },
+};
-+#endif /* CONFIG_DM9000 */
+
+
+#ifdef CONFIG_PWM
@@ -543,9 +539,7 @@ Index: linux-2.6.29.6/arch/arm/mach-imx/apf9328.c
+static struct platform_device *devices[] __initdata = {
+ &imx_uart1_device,
+ &imx_uart2_device,
-+#ifdef CONFIG_DM9000
+ &dm9000x_device,
-+#endif
+#ifdef CONFIG_SPI_IMX
+ &imx_spi1,
+ &imx_spi2,
@@ -624,10 +618,8 @@ Index: linux-2.6.29.6/arch/arm/mach-imx/apf9328.c
+ /* Init generic IRQs */
+ imx_init_irq();
+
-+ /* Init our custom IRQs */
-+#ifdef CONFIG_DM9000
++ /* Init our custom IRQs (DM9000) */
+ set_irq_type(APF9328_ETH_IRQ, IRQF_TRIGGER_FALLING);
-+#endif
+}
+
+
@@ -644,7 +636,7 @@ Index: linux-2.6.29.6/arch/arm/mach-imx/apf9328.c
Index: linux-2.6.29.6/arch/arm/mach-imx/apf9328_lcd_config.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/arch/arm/mach-imx/apf9328_lcd_config.h 2009-10-02 08:54:08.000000000 +0200
++++ linux-2.6.29.6/arch/arm/mach-imx/apf9328_lcd_config.h 2010-03-25 11:50:57.000000000 +0100
@@ -0,0 +1,301 @@
+/*
+ *
@@ -950,7 +942,7 @@ Index: linux-2.6.29.6/arch/arm/mach-imx/apf9328_lcd_config.h
Index: linux-2.6.29.6/arch/arm/mach-imx/include/mach/apf9328.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/arch/arm/mach-imx/include/mach/apf9328.h 2009-10-02 08:54:08.000000000 +0200
++++ linux-2.6.29.6/arch/arm/mach-imx/include/mach/apf9328.h 2010-03-25 11:50:57.000000000 +0100
@@ -0,0 +1,68 @@
+/*
+ * linux/include/asm-arm/arch-imx/apf9328.h
@@ -1023,7 +1015,7 @@ Index: linux-2.6.29.6/arch/arm/mach-imx/include/mach/apf9328.h
Index: linux-2.6.29.6/arch/arm/mach-imx/apf9328-dev.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.29.6/arch/arm/mach-imx/apf9328-dev.c 2009-10-02 08:54:08.000000000 +0200
++++ linux-2.6.29.6/arch/arm/mach-imx/apf9328-dev.c 2010-03-25 11:50:57.000000000 +0100
@@ -0,0 +1,281 @@
+/*
+ * linux/arch/arm/mach-imx/apf9328-dev.c
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2010-03-24 08:43:22
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 42538d418479ea216367939ec181a459cf65878d (commit)
from 955fb1e2cb082de48d8613570dfc02db734b616a (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 42538d418479ea216367939ec181a459cf65878d
Author: Fabien Marteau <fab...@ar...>
Date: Wed Mar 24 09:43:01 2010 +0100
coding rules
-----------------------------------------------------------------------
Summary of changes:
target/packages/as_devices/c/as_gpio.c | 2 +-
target/packages/as_devices/c/as_gpio.h | 20 ++++++++++----------
.../packages/as_devices/python/src/AsGpio_wrap.c | 4 ++--
3 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/target/packages/as_devices/c/as_gpio.c b/target/packages/as_devices/c/as_gpio.c
index b6adb0d..c24c4e9 100644
--- a/target/packages/as_devices/c/as_gpio.c
+++ b/target/packages/as_devices/c/as_gpio.c
@@ -1,5 +1,5 @@
/*
-** THE ARMadeus Systems
+** The ARMadeus Project
**
** Copyright (C) 2009 The armadeus systems team
** Fabien Marteau <fab...@ar...>
diff --git a/target/packages/as_devices/c/as_gpio.h b/target/packages/as_devices/c/as_gpio.h
index a83a8fc..48dee74 100644
--- a/target/packages/as_devices/c/as_gpio.h
+++ b/target/packages/as_devices/c/as_gpio.h
@@ -1,5 +1,5 @@
/*
-** THE ARMadeus Systems
+** The ARMadeus Project
**
** Copyright (C) 2009 The armadeus systems team
** Fabien Marteau <fab...@ar...>
@@ -54,9 +54,9 @@ struct as_gpio_device *as_gpio_open(char aPortChar);
*
* @return error if negative value
*/
-int32_t as_gpio_set_pin_direction( struct as_gpio_device *aDev,
- int aPinNum,
- int aDirection);
+int32_t as_gpio_set_pin_direction(struct as_gpio_device *aDev,
+ int aPinNum,
+ int aDirection);
/** @brief Set pin value
*
@@ -66,9 +66,9 @@ int32_t as_gpio_set_pin_direction( struct as_gpio_device *aDev,
*
* @return error if negative
*/
-int32_t as_gpio_set_pin_value( struct as_gpio_device *aDev,
- int aPinNum,
- int aValue);
+int32_t as_gpio_set_pin_value(struct as_gpio_device *aDev,
+ int aPinNum,
+ int aValue);
/** @brief Get pin value
*
@@ -77,8 +77,8 @@ int32_t as_gpio_set_pin_value( struct as_gpio_device *aDev,
*
* @return pin value if positive or null, error if negative
*/
-int32_t as_gpio_get_pin_value( struct as_gpio_device *aDev,
- int aPinNum);
+int32_t as_gpio_get_pin_value(struct as_gpio_device *aDev,
+ int aPinNum);
/** @brief Close port access
*
@@ -87,7 +87,7 @@ int32_t as_gpio_get_pin_value( struct as_gpio_device *aDev,
* @return pin value if positive or null, error if negative
*/
-int32_t as_gpio_close( struct as_gpio_device *aDev);
+int32_t as_gpio_close(struct as_gpio_device *aDev);
#ifdef __cplusplus
}
diff --git a/target/packages/as_devices/python/src/AsGpio_wrap.c b/target/packages/as_devices/python/src/AsGpio_wrap.c
index 482977c..b807ebc 100644
--- a/target/packages/as_devices/python/src/AsGpio_wrap.c
+++ b/target/packages/as_devices/python/src/AsGpio_wrap.c
@@ -1,5 +1,5 @@
/*
-** THE ARMadeus Systems
+** The ARMadeus Project
**
** Copyright (C) 2010 The armadeus systems team
** Fabien Marteau <fab...@ar...>
@@ -160,7 +160,7 @@ static PyObject * setPinValue(PyObject *self, PyObject *args)
if (dev == NULL)
{
PyErr_SetString(PyExc_IOError,
- "memory allocation:Â can't malloc fdev structure");
+ "memory allocation: can't malloc fdev structure");
return NULL;
}
dev->port_letter = aPort_letter;
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2010-03-24 08:24:10
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 955fb1e2cb082de48d8613570dfc02db734b616a (commit)
from 2043bcd322d66bda218d4d5680bb48d27f52de5e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 955fb1e2cb082de48d8613570dfc02db734b616a
Author: Fabien Marteau <fab...@ar...>
Date: Wed Mar 24 09:23:41 2010 +0100
[as_devices] AsGpio python wrapper done
-----------------------------------------------------------------------
Summary of changes:
.../packages/as_devices/python/AsDevices/AsGpio.py | 24 ++++++++++++++++++-
1 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/target/packages/as_devices/python/AsDevices/AsGpio.py b/target/packages/as_devices/python/AsDevices/AsGpio.py
index 2e09403..a0abe68 100644
--- a/target/packages/as_devices/python/AsDevices/AsGpio.py
+++ b/target/packages/as_devices/python/AsDevices/AsGpio.py
@@ -60,7 +60,7 @@ class AsGpio:
try:
wrapper.gpio_close(self.__device)
except Exception, e:
- raise AsGpioError(str(e))
+ pass
def setPinDirection(self, aPinNum, aDirection):
""" Set period in us
@@ -72,6 +72,26 @@ class AsGpio:
except Exception, e:
raise AsGpioError(str(e))
+ def setPinValue(self, aPinNum, aValue):
+ """ Set pin value
+ \param aPinNum pin number
+ \param aValue value to write
+ """
+ try:
+ wrapper.setPinValue(self.__device, aPinNum, aValue)
+ except Exception, e:
+ raise AsGpioError(str(e))
+
+ def getPinValue(self, aPinNum):
+ """ Get pin value
+ \param aPinNum pin number
+ \return pin value
+ """
+ try:
+ return wrapper.getPinValue(self.__device, aPinNum)
+ except Exception, e:
+ raise AsGpioError(str(e))
+
################################################################
@@ -79,7 +99,7 @@ class AsGpio:
def getInstance(cls, aPort_letter):
if type(aPort_letter)!=str:
raise Exception("port letter must be a character")
- if ((aPort_letter[0] <= 'A') or (aPort_letter[0] >= 'Z')):
+ if ((aPort_letter[0] < 'A') or (aPort_letter[0] > 'Z')):
raise Exception("Port letter must be an UPPER case letter")
try:
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2010-03-23 17:03:29
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 2043bcd322d66bda218d4d5680bb48d27f52de5e (commit)
via 171ab54e7daef05f67d233fb15181b94d5301640 (commit)
via c9c1377c7b7f9c7a035aa278ed72d41acecd9bc4 (commit)
via a5030c18dc1c7211c5d7c44bfc1770ef5f0b8744 (commit)
from 64b9be3b70e37014e7529bb4f1eca33971591dff (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 2043bcd322d66bda218d4d5680bb48d27f52de5e
Author: Fabien Marteau <fab...@ar...>
Date: Tue Mar 23 18:02:54 2010 +0100
[buildroot] adding python wrapper in menu
commit 171ab54e7daef05f67d233fb15181b94d5301640
Author: Fabien Marteau <fab...@ar...>
Date: Tue Mar 23 18:02:26 2010 +0100
[as_devices] python class asgpio in progress
commit c9c1377c7b7f9c7a035aa278ed72d41acecd9bc4
Author: Fabien Marteau <fab...@ar...>
Date: Tue Mar 23 16:30:37 2010 +0100
[as_devices] Adding python gpio multiton class
commit a5030c18dc1c7211c5d7c44bfc1770ef5f0b8744
Author: Fabien Marteau <fab...@ar...>
Date: Tue Mar 23 15:23:59 2010 +0100
[as_devices] Compiling gpio python wrapper low level api
-----------------------------------------------------------------------
Summary of changes:
buildroot/package/armadeus/as_devices/Config.in | 14 +-
.../packages/as_devices/python/AsDevices/AsGpio.py | 107 +++++++++++++
.../as_devices/python/AsDevices/__init__.py | 2 +-
.../python/AsDevices/wrappers/__init__.py | 2 +-
.../packages/as_devices/python/src/AsGpio_wrap.c | 165 +++++++++++++++++++-
.../packages/as_devices/python/src/AsGpio_wrap.h | 10 +-
6 files changed, 275 insertions(+), 25 deletions(-)
create mode 100644 target/packages/as_devices/python/AsDevices/AsGpio.py
diff --git a/buildroot/package/armadeus/as_devices/Config.in b/buildroot/package/armadeus/as_devices/Config.in
index 086825c..2bf8b2f 100644
--- a/buildroot/package/armadeus/as_devices/Config.in
+++ b/buildroot/package/armadeus/as_devices/Config.in
@@ -12,10 +12,10 @@ config BR2_PACKAGE_AS_DEVICES
# help
# C++ wrapper for as_devices library
#
-#config BR2_PACKAGE_AS_DEVICES_PYTHON
-# depends on BR2_PACKAGE_AS_DEVICES
-# depends on BR2_PACKAGE_PYTHON
-# bool "wrapper Python"
-# default n
-# help
-# Python wrapper for as_devices library. need python
+config BR2_PACKAGE_AS_DEVICES_PYTHON
+ depends on BR2_PACKAGE_AS_DEVICES
+ depends on BR2_PACKAGE_PYTHON
+ bool "wrapper Python"
+ default n
+ help
+ Python wrapper for as_devices library. need python
diff --git a/target/packages/as_devices/python/AsDevices/AsGpio.py b/target/packages/as_devices/python/AsDevices/AsGpio.py
new file mode 100644
index 0000000..2e09403
--- /dev/null
+++ b/target/packages/as_devices/python/AsDevices/AsGpio.py
@@ -0,0 +1,107 @@
+#! /usr/bin/python
+# -*- coding: utf-8 -*-
+#-----------------------------------------------------------------------------
+# Name: AsGpio.py
+# Purpose:
+# Author: Fabien Marteau <fab...@ar...>
+# Created: 23/03/2010
+#-----------------------------------------------------------------------------
+# Copyright (2008) Armadeus Systems
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#
+#-----------------------------------------------------------------------------
+
+__doc__ = "This class drive ARMadeus board GPIO"
+__version__ = "1.0.0"
+__versionTime__ = "23/03/2010"
+__author__ = "Fabien Marteau <fab...@ar...>"
+
+import wrappers.AsGpio_wrap as wrapper
+
+class AsGpioError(Exception):
+ def __init__(self, value):
+ self.value = value
+ def __str__(self):
+ return repr(self.value)
+
+class AsGpio:
+ """ Drive GPIO
+ """
+
+ # Dictionary of gpio multiton classes
+ __gpio = {}
+
+ ################################################################$
+ class __impl:
+ """ implementation
+ """
+ def __init__(self, port_letter):
+ self.__port_letter = port_letter
+ try:
+ self.__device = wrapper.gpio_open(self.__port_letter)
+ except Exception, e:
+ raise AsGpioError("Can't open GPIO "+str(self.__port_letter)+\
+ ": "+str(e))
+
+ def __del__(self):
+ try:
+ wrapper.gpio_close(self.__device)
+ except Exception, e:
+ raise AsGpioError(str(e))
+
+ def setPinDirection(self, aPinNum, aDirection):
+ """ Set period in us
+ \param aPinNum pin number
+ \param aDirection pin direction 0:input 1:output
+ """
+ try:
+ wrapper.setPinDirection(self.__device, aPinNum, aDirection)
+ except Exception, e:
+ raise AsGpioError(str(e))
+
+
+ ################################################################
+
+ @classmethod
+ def getInstance(cls, aPort_letter):
+ if type(aPort_letter)!=str:
+ raise Exception("port letter must be a character")
+ if ((aPort_letter[0] <= 'A') or (aPort_letter[0] >= 'Z')):
+ raise Exception("Port letter must be an UPPER case letter")
+
+ try:
+ return AsGpio.__gpio[aPort_letter[0]]
+ except KeyError:
+ AsGpio.__gpio[aPort_letter[0]] = cls.__impl(aPort_letter[0])
+
+ return AsGpio.__gpio[aPort_letter[0]]
+
+ def __init__(self):
+ """ Initialize pwm
+ """
+ raise Exception("This constructor is private")
+
+if __name__ == "__main__":
+ import os
+ def pressEnterToContinue():
+ print "Press enter to continue"
+ raw_input()
+ print "AsGpio class test\n"
+ print AsGpio.__doc__
+
+ portf = AsGpio.getInstance('F')
+ print str(portf)
+
diff --git a/target/packages/as_devices/python/AsDevices/__init__.py b/target/packages/as_devices/python/AsDevices/__init__.py
index 23d479a..72395c2 100644
--- a/target/packages/as_devices/python/AsDevices/__init__.py
+++ b/target/packages/as_devices/python/AsDevices/__init__.py
@@ -35,4 +35,4 @@ __versionTime__ = "08/10/2009"
__author__ = "Fabien Marteau <fab...@ar...>"
import wrappers
-from Apf27Pwm import *
+from AsGpio import *
diff --git a/target/packages/as_devices/python/AsDevices/wrappers/__init__.py b/target/packages/as_devices/python/AsDevices/wrappers/__init__.py
index 63fc282..a699242 100644
--- a/target/packages/as_devices/python/AsDevices/wrappers/__init__.py
+++ b/target/packages/as_devices/python/AsDevices/wrappers/__init__.py
@@ -34,5 +34,5 @@ __version__ = "1.0.0"
__versionTime__ = "08/10/2009"
__author__ = "Fabien Marteau <fab...@ar...>"
-import Apf27Pwm_wrap
+import AsGpio_wrap
diff --git a/target/packages/as_devices/python/src/AsGpio_wrap.c b/target/packages/as_devices/python/src/AsGpio_wrap.c
index 19821ec..482977c 100644
--- a/target/packages/as_devices/python/src/AsGpio_wrap.c
+++ b/target/packages/as_devices/python/src/AsGpio_wrap.c
@@ -21,8 +21,21 @@
#include "AsGpio_wrap.h"
#include "as_gpio.h"
+/* Methods definitions */
+static PyMethodDef AsGpio_wrap_methods[] = {
+ {"gpio_open", gpio_open, METH_VARARGS, "Initialize gpio"},
+ {"setPinDirection", setPinDirection, METH_VARARGS, "Set pin direction"},
+ {"setPinValue", setPinValue, METH_VARARGS, "Set pin value"},
+ {"getPinValue", getPinValue, METH_VARARGS, "Get pin value"},
+ {"gpio_close", gpio_close, METH_VARARGS, "Close gpio"},
+ {NULL, NULL, 0, NULL} /* Sentinel */
+};
+
/* Init module */
-//void initAsGpio();
+void initAsGpio_wrap() /* called on first import */
+{ /* name matter if called dynamically */
+ (void) Py_InitModule("AsGpio_wrap", AsGpio_wrap_methods); /* mod name, table ptr */
+}
/** @brief Initialize port access
* @param aPortChar character port in UPPER case
@@ -50,7 +63,7 @@ static PyObject * gpio_open(PyObject *self, PyObject *args)
"Initialization error. Is kernel module loaded ?");
return NULL;
}
- ret = Py_BuildValue("(c,i)",
+ ret = Py_BuildValue("((ci))",
dev->port_letter,
dev->fdev);
free(dev);
@@ -59,7 +72,7 @@ static PyObject * gpio_open(PyObject *self, PyObject *args)
/** @brief Set pin direction
*
- * @param (c,i) -> (aPort_letter, aFdev) as_gpio_device structure_list
+ * @param ((ci)) -> (aPort_letter, aFdev) as_gpio_device structure_list
* @param aPinNum pin number
* @param aDirection direction 0:input 1:output
*
@@ -78,7 +91,7 @@ static PyObject * setPinDirection(PyObject *self, PyObject *args)
int ret;
/* Get arguments */
- if (!PyArg_ParseTuple(args, "(c,i)ii",
+ if (!PyArg_ParseTuple(args, "((ci))ii",
&aPort_letter,
&aFdev,
&aPinNum,
@@ -111,18 +124,156 @@ static PyObject * setPinDirection(PyObject *self, PyObject *args)
return Py_BuildValue("i", ret);
}
+/** @brief Set pin value
+ *
+ * @param ((ci)) -> (aPort_letter, aFdev) as_gpio_device structure_list
+ * @param aPinNum pin number
+ * @param aValue value of pin (1 or 0)
+ *
+ * @return error if negative
+ */
static PyObject * setPinValue(PyObject *self, PyObject *args)
{
- return NULL;
+ /* parameters */
+ char aPort_letter;
+ int aFdev;
+
+ int aPinNum;
+ int aValue;
+
+ struct as_gpio_device *dev;
+ int ret;
+
+ /* Get arguments */
+ if (!PyArg_ParseTuple(args, "((ci))ii",
+ &aPort_letter,
+ &aFdev,
+ &aPinNum,
+ &aValue))
+ {
+ PyErr_SetString(PyExc_IOError,
+ "Wrong parameters.");
+ return NULL;
+ }
+
+ dev = (struct as_gpio_device *)malloc(sizeof(struct as_gpio_device));
+ if (dev == NULL)
+ {
+ PyErr_SetString(PyExc_IOError,
+ "memory allocation:Â can't malloc fdev structure");
+ return NULL;
+ }
+ dev->port_letter = aPort_letter;
+ dev->fdev = aFdev;
+
+ ret = as_gpio_set_pin_value(dev, aPinNum, aValue);
+ if (ret < 0)
+ {
+ PyErr_SetString(PyExc_IOError,
+ "Can't set pin value");
+ return NULL;
+ }
+
+ free(dev);
+ return Py_BuildValue("i", ret);
+
}
+
+/** @brief Get pin value
+ *
+ * @param ((ci)) -> (aPort_letter, aFdev) as_gpio_device structure_list
+ * @param aPinNum pin number
+ *
+ * @return pin value if positive or null, error if negative
+ */
static PyObject * getPinValue(PyObject *self, PyObject *args)
{
- return NULL;
+ /* parameters */
+ char aPort_letter;
+ int aFdev;
+
+ int aPinNum;
+
+ struct as_gpio_device *dev;
+ int ret;
+
+ /* Get arguments */
+ if (!PyArg_ParseTuple(args, "((ci))i",
+ &aPort_letter,
+ &aFdev,
+ &aPinNum))
+ {
+ PyErr_SetString(PyExc_IOError,
+ "Wrong parameters.");
+ return NULL;
+ }
+
+ dev = (struct as_gpio_device *)malloc(sizeof(struct as_gpio_device));
+ if (dev == NULL)
+ {
+ PyErr_SetString(PyExc_IOError,
+ "memory allocation:Â can't malloc fdev structure");
+ return NULL;
+ }
+ dev->port_letter = aPort_letter;
+ dev->fdev = aFdev;
+
+ ret = as_gpio_get_pin_value(dev, aPinNum);
+ if (ret < 0)
+ {
+ PyErr_SetString(PyExc_IOError,
+ "Can't get pin value");
+ return NULL;
+ }
+
+ free(dev);
+ return Py_BuildValue("i", ret);
}
+/** @brief Close port access
+ *
+ * @param ((ci)) -> (aPort_letter, aFdev) as_gpio_device structure_list
+ *
+ * @return pin value if positive or null, error if negative
+ */
static PyObject * gpio_close(PyObject *self, PyObject *args)
{
- return NULL;
+ /* parameters */
+ char aPort_letter;
+ int aFdev;
+
+ struct as_gpio_device *dev;
+ int ret;
+
+ /* Get arguments */
+ if (!PyArg_ParseTuple(args, "((ci))",
+ &aPort_letter,
+ &aFdev))
+ {
+ PyErr_SetString(PyExc_IOError,
+ "Wrong parameters.");
+ return NULL;
+ }
+
+ dev = (struct as_gpio_device *)malloc(sizeof(struct as_gpio_device));
+ if (dev == NULL)
+ {
+ PyErr_SetString(PyExc_IOError,
+ "memory allocation:Â can't malloc fdev structure");
+ return NULL;
+ }
+ dev->port_letter = aPort_letter;
+ dev->fdev = aFdev;
+
+ ret = as_gpio_close(dev);
+ if (ret < 0)
+ {
+ PyErr_SetString(PyExc_IOError,
+ "Can't close port");
+ return NULL;
+ }
+
+ return Py_BuildValue("i", ret);
}
diff --git a/target/packages/as_devices/python/src/AsGpio_wrap.h b/target/packages/as_devices/python/src/AsGpio_wrap.h
index 952062b..bf52ba6 100644
--- a/target/packages/as_devices/python/src/AsGpio_wrap.h
+++ b/target/packages/as_devices/python/src/AsGpio_wrap.h
@@ -22,7 +22,7 @@
#include <Python.h>
/* Init module */
-//void initAsGpio();
+void initAsGpio_wrap();
/*********************/
/* Functions wrapped */
@@ -35,11 +35,3 @@ static PyObject * getPinValue(PyObject *self, PyObject *args);
static PyObject * gpio_close(PyObject *self, PyObject *args);
-/* Methods definitions */
-static PyMethodDef AsGpio_wrap_Methods[] = {
- {"init", gpio_open, METH_VARARGS, "Initialize gpio"},
- {"setPinDirection", setPinDirection, METH_VARARGS, "Set pin direction"},
- {"setPinValue", setPinValue, METH_VARARGS, "Set pin value"},
- {"getPinValue", getPinValue, METH_VARARGS, "Get pin value"},
- {NULL, NULL, 0, NULL} /* Sentinel */
-};
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2010-03-23 13:47:32
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 64b9be3b70e37014e7529bb4f1eca33971591dff (commit)
via 74953339251acf7323dc305c7c218408a55504d2 (commit)
via d2a7cf989baaed0ce507f0492aac7e097940ee5e (commit)
from 0b5985b38102d2800db96f7bd29af6bdd15f2188 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 64b9be3b70e37014e7529bb4f1eca33971591dff
Author: Fabien Marteau <fab...@ar...>
Date: Tue Mar 23 14:45:12 2010 +0100
[as_devices] AsGpio python wrapper in progress
commit 74953339251acf7323dc305c7c218408a55504d2
Author: Fabien Marteau <fab...@ar...>
Date: Tue Mar 23 14:16:49 2010 +0100
codings rules
commit d2a7cf989baaed0ce507f0492aac7e097940ee5e
Author: Fabien Marteau <fab...@ar...>
Date: Tue Mar 23 12:16:58 2010 +0100
[as_devices] Gpio python wrapper in progress
-----------------------------------------------------------------------
Summary of changes:
target/packages/as_devices/c/as_gpio.c | 26 ++--
target/packages/as_devices/c/as_gpio.h | 16 ++--
target/packages/as_devices/python/Makefile | 20 +++-
.../packages/as_devices/python/src/AsGpio_wrap.c | 128 ++++++++++++++++++++
.../packages/as_devices/python/src/AsGpio_wrap.h | 45 +++++++
5 files changed, 209 insertions(+), 26 deletions(-)
create mode 100644 target/packages/as_devices/python/src/AsGpio_wrap.c
create mode 100644 target/packages/as_devices/python/src/AsGpio_wrap.h
diff --git a/target/packages/as_devices/c/as_gpio.c b/target/packages/as_devices/c/as_gpio.c
index 34a7c9a..b6adb0d 100644
--- a/target/packages/as_devices/c/as_gpio.c
+++ b/target/packages/as_devices/c/as_gpio.c
@@ -86,7 +86,7 @@ as_gpio_open(char aPortChar)
/*------------------------------------------------------------------------------*/
int32_t
-as_gpio_set_pin_direction(struct as_gpio_device *dev,
+as_gpio_set_pin_direction(struct as_gpio_device *aDev,
int aPinNum,
int aDirection)
{
@@ -94,20 +94,20 @@ as_gpio_set_pin_direction(struct as_gpio_device *dev,
int portval;
/* Set LED PIN as GPIO; read/modify/write */
- ret = ioctl(dev->fdev, GPIORDMODE, &portval);
+ ret = ioctl(aDev->fdev, GPIORDMODE, &portval);
if (ret < 0) {
return ret;
}
portval |= (1 << aPinNum);
- ret = ioctl(dev->fdev, GPIOWRMODE, &portval);
+ ret = ioctl(aDev->fdev, GPIOWRMODE, &portval);
if (ret < 0) {
return ret;
}
/* set direction */
- ret = ioctl(dev->fdev, GPIORDDIRECTION, &portval);
+ ret = ioctl(aDev->fdev, GPIORDDIRECTION, &portval);
if (ret < 0) {
return ret;
}
@@ -118,7 +118,7 @@ as_gpio_set_pin_direction(struct as_gpio_device *dev,
portval |= (1 << aPinNum);
}
- ret = ioctl(dev->fdev, GPIOWRDIRECTION, &portval);
+ ret = ioctl(aDev->fdev, GPIOWRDIRECTION, &portval);
if (ret < 0) {
return ret;
}
@@ -128,14 +128,14 @@ as_gpio_set_pin_direction(struct as_gpio_device *dev,
/*------------------------------------------------------------------------------*/
int32_t
-as_gpio_set_pin_value( struct as_gpio_device *dev,
+as_gpio_set_pin_value( struct as_gpio_device *aDev,
int aPinNum,
int aValue)
{
int ret=0;
int portval;
- ret = ioctl(dev->fdev, GPIORDDATA, &portval);
+ ret = ioctl(aDev->fdev, GPIORDDATA, &portval);
if (ret < 0) {
return ret;
}
@@ -145,7 +145,7 @@ as_gpio_set_pin_value( struct as_gpio_device *dev,
} else {
portval |= (1 << aPinNum);
}
- ret = ioctl(dev->fdev, GPIOWRDATA, &portval);
+ ret = ioctl(aDev->fdev, GPIOWRDATA, &portval);
if (ret < 0) {
return ret;
}
@@ -155,13 +155,13 @@ as_gpio_set_pin_value( struct as_gpio_device *dev,
/*------------------------------------------------------------------------------*/
-int32_t as_gpio_get_pin_value( struct as_gpio_device *dev,
+int32_t as_gpio_get_pin_value( struct as_gpio_device *aDev,
int aPinNum)
{
int ret=0;
int portval;
- ret = ioctl(dev->fdev, GPIORDDATA, &portval);
+ ret = ioctl(aDev->fdev, GPIORDDATA, &portval);
if (ret < 0) {
return ret;
}
@@ -176,11 +176,11 @@ int32_t as_gpio_get_pin_value( struct as_gpio_device *dev,
/*------------------------------------------------------------------------------*/
int32_t
-as_gpio_close(struct as_gpio_device *dev)
+as_gpio_close(struct as_gpio_device *aDev)
{
int ret;
- ret = close(dev->fdev);
- free(dev);
+ ret = close(aDev->fdev);
+ free(aDev);
return 0;
}
diff --git a/target/packages/as_devices/c/as_gpio.h b/target/packages/as_devices/c/as_gpio.h
index 4b98c84..a83a8fc 100644
--- a/target/packages/as_devices/c/as_gpio.h
+++ b/target/packages/as_devices/c/as_gpio.h
@@ -48,46 +48,46 @@ struct as_gpio_device *as_gpio_open(char aPortChar);
/** @brief Set pin direction
*
- * @param aPortChar port character in upper case
+ * @param aDev as_gpio_device pointer structure
* @param aPinNum pin number
* @param aDirection direction 0:input 1:output
*
* @return error if negative value
*/
-int32_t as_gpio_set_pin_direction( struct as_gpio_device *dev,
+int32_t as_gpio_set_pin_direction( struct as_gpio_device *aDev,
int aPinNum,
int aDirection);
/** @brief Set pin value
*
- * @param aPortChar port character in upper case
+ * @param aDev as_gpio_device pointer structure
* @param aPinNum pin number
* @param aValue value of pin (1 or 0)
*
* @return error if negative
*/
-int32_t as_gpio_set_pin_value( struct as_gpio_device *dev,
+int32_t as_gpio_set_pin_value( struct as_gpio_device *aDev,
int aPinNum,
int aValue);
/** @brief Get pin value
*
- * @param aPortChar port character in upper case
+ * @param aDev as_gpio_device pointer structure
* @param aPinNum pin number
*
* @return pin value if positive or null, error if negative
*/
-int32_t as_gpio_get_pin_value( struct as_gpio_device *dev,
+int32_t as_gpio_get_pin_value( struct as_gpio_device *aDev,
int aPinNum);
/** @brief Close port access
*
- * @param aPortChar port character in upper case
+ * @param aDev as_gpio_device pointer structure
*
* @return pin value if positive or null, error if negative
*/
-int32_t as_gpio_close( struct as_gpio_device *dev);
+int32_t as_gpio_close( struct as_gpio_device *aDev);
#ifdef __cplusplus
}
diff --git a/target/packages/as_devices/python/Makefile b/target/packages/as_devices/python/Makefile
index 1d4008f..232dcb8 100644
--- a/target/packages/as_devices/python/Makefile
+++ b/target/packages/as_devices/python/Makefile
@@ -1,9 +1,19 @@
-# to compile c tests
-# make CC=~/armadeus_trees/apf27/buildroot/build_armv5te/staging_dir/usr/bin/arm-linux-gcc
-#
+# Default values for local compiling:
+ARMADEUS_BASE_DIR=../../../../
+include $(ARMADEUS_BASE_DIR)/Makefile.in
+
+ifeq ($(ARMADEUS_BOARD_NAME),apf9328)
+CFLAGS=-Wall -g -O0 -DAPF9328
+else
+ifeq ($(ARMADEUS_BOARD_NAME),apf27)
+CFLAGS=-Wall -g -O0 -DAPF27
+endif
+endif
-CFLAGS=-Wall -g -O0
LDFLAGS=
+CC:=$(ARMADEUS_TOOLCHAIN_PATH)/arm-linux-gcc
+CXX:=$(ARMADEUS_TOOLCHAIN_PATH)/arm-linux-g++
+STRIP:=$(ARMADEUS_TOOLCHAIN_PATH)arm-linux-sstrip
INCLUDE_LIB=../c/
@@ -11,7 +21,7 @@ AS_LIB=../c/libas_devices.so
LIBNAME=AsDevices
-WRAPPER_LIBS=Apf27Pwm_wrap.so
+WRAPPER_LIBS=AsGpio_wrap.so
WRAPPER_DIR=src
PYTHON_VERS=2.4
diff --git a/target/packages/as_devices/python/src/AsGpio_wrap.c b/target/packages/as_devices/python/src/AsGpio_wrap.c
new file mode 100644
index 0000000..19821ec
--- /dev/null
+++ b/target/packages/as_devices/python/src/AsGpio_wrap.c
@@ -0,0 +1,128 @@
+/*
+** THE ARMadeus Systems
+**
+** Copyright (C) 2010 The armadeus systems team
+** Fabien Marteau <fab...@ar...>
+**
+** This library is free software; you can redistribute it and/or
+** modify it under the terms of the GNU Lesser General Public
+** License as published by the Free Software Foundation; either
+** version 2.1 of the License, or (at your option) any later version.
+**
+** This library is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+** Lesser General Public License for more details.
+**
+** You should have received a copy of the GNU Lesser General Public
+** License along with this library; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+#include "AsGpio_wrap.h"
+#include "as_gpio.h"
+
+/* Init module */
+//void initAsGpio();
+
+/** @brief Initialize port access
+ * @param aPortChar character port in UPPER case
+ * @return PyObject
+ */
+static PyObject * gpio_open(PyObject *self, PyObject *args)
+{
+ /* parameters */
+ char aPortChar;
+ struct as_gpio_device *dev;
+ PyObject *ret;
+
+ /* Get arguments */
+ if (!PyArg_ParseTuple(args, "c", &aPortChar))
+ {
+ PyErr_SetString(PyExc_IOError,
+ "Wrong parameters.");
+ return NULL;
+ }
+
+ dev = as_gpio_open(aPortChar);
+ if (dev == NULL)
+ {
+ PyErr_SetString(PyExc_IOError,
+ "Initialization error. Is kernel module loaded ?");
+ return NULL;
+ }
+ ret = Py_BuildValue("(c,i)",
+ dev->port_letter,
+ dev->fdev);
+ free(dev);
+ return ret;
+}
+
+/** @brief Set pin direction
+ *
+ * @param (c,i) -> (aPort_letter, aFdev) as_gpio_device structure_list
+ * @param aPinNum pin number
+ * @param aDirection direction 0:input 1:output
+ *
+ * @return error if negative value
+ */
+static PyObject * setPinDirection(PyObject *self, PyObject *args)
+{
+ /* parameters */
+ char aPort_letter;
+ int aFdev;
+
+ int aPinNum;
+ int aDirection;
+
+ struct as_gpio_device *dev;
+ int ret;
+
+ /* Get arguments */
+ if (!PyArg_ParseTuple(args, "(c,i)ii",
+ &aPort_letter,
+ &aFdev,
+ &aPinNum,
+ &aDirection))
+ {
+ PyErr_SetString(PyExc_IOError,
+ "Wrong parameters.");
+ return NULL;
+ }
+
+ dev = (struct as_gpio_device *)malloc(sizeof(struct as_gpio_device));
+ if (dev == NULL)
+ {
+ PyErr_SetString(PyExc_IOError,
+ "memory allocation:Â can't malloc fdev structure");
+ return NULL;
+ }
+ dev->port_letter = aPort_letter;
+ dev->fdev = aFdev;
+
+ ret = as_gpio_set_pin_direction(dev, aPinNum, aDirection);
+ if (ret < 0)
+ {
+ PyErr_SetString(PyExc_IOError,
+ "Can't set pin direction");
+ return NULL;
+ }
+
+ free(dev);
+ return Py_BuildValue("i", ret);
+}
+
+static PyObject * setPinValue(PyObject *self, PyObject *args)
+{
+ return NULL;
+}
+static PyObject * getPinValue(PyObject *self, PyObject *args)
+{
+ return NULL;
+}
+
+static PyObject * gpio_close(PyObject *self, PyObject *args)
+{
+ return NULL;
+}
+
+
diff --git a/target/packages/as_devices/python/src/AsGpio_wrap.h b/target/packages/as_devices/python/src/AsGpio_wrap.h
new file mode 100644
index 0000000..952062b
--- /dev/null
+++ b/target/packages/as_devices/python/src/AsGpio_wrap.h
@@ -0,0 +1,45 @@
+/*
+** THE ARMadeus Systems
+**
+** Copyright (C) 2010 The armadeus systems team
+** Fabien Marteau <fab...@ar...>
+**
+** This library is free software; you can redistribute it and/or
+** modify it under the terms of the GNU Lesser General Public
+** License as published by the Free Software Foundation; either
+** version 2.1 of the License, or (at your option) any later version.
+**
+** This library is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+** Lesser General Public License for more details.
+**
+** You should have received a copy of the GNU Lesser General Public
+** License along with this library; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+
+#include <Python.h>
+
+/* Init module */
+//void initAsGpio();
+
+/*********************/
+/* Functions wrapped */
+/*********************/
+static PyObject * gpio_open(PyObject *self, PyObject *args);
+
+static PyObject * setPinDirection(PyObject *self, PyObject *args);
+static PyObject * setPinValue(PyObject *self, PyObject *args);
+static PyObject * getPinValue(PyObject *self, PyObject *args);
+
+static PyObject * gpio_close(PyObject *self, PyObject *args);
+
+/* Methods definitions */
+static PyMethodDef AsGpio_wrap_Methods[] = {
+ {"init", gpio_open, METH_VARARGS, "Initialize gpio"},
+ {"setPinDirection", setPinDirection, METH_VARARGS, "Set pin direction"},
+ {"setPinValue", setPinValue, METH_VARARGS, "Set pin value"},
+ {"getPinValue", getPinValue, METH_VARARGS, "Get pin value"},
+ {NULL, NULL, 0, NULL} /* Sentinel */
+};
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2010-03-23 10:08:00
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 0b5985b38102d2800db96f7bd29af6bdd15f2188 (commit)
from cbd92a077dde9804513a86424c249c941d7c9e1e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 0b5985b38102d2800db96f7bd29af6bdd15f2188
Author: Fabien Marteau <fab...@ar...>
Date: Tue Mar 23 11:07:22 2010 +0100
[as_devices] Comment wrapper options
-----------------------------------------------------------------------
Summary of changes:
buildroot/package/armadeus/as_devices/Config.in | 28 +++++++++++-----------
1 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/buildroot/package/armadeus/as_devices/Config.in b/buildroot/package/armadeus/as_devices/Config.in
index ef42f7f..086825c 100644
--- a/buildroot/package/armadeus/as_devices/Config.in
+++ b/buildroot/package/armadeus/as_devices/Config.in
@@ -5,17 +5,17 @@ config BR2_PACKAGE_AS_DEVICES
help
library that drive armadeus specific devices
-config BR2_PACKAGE_AS_DEVICES_CPP
- depends on BR2_PACKAGE_AS_DEVICES
- bool "wrapper C++"
- default n
- help
- C++ wrapper for as_devices library
-
-config BR2_PACKAGE_AS_DEVICES_PYTHON
- depends on BR2_PACKAGE_AS_DEVICES
- depends on BR2_PACKAGE_PYTHON
- bool "wrapper Python"
- default n
- help
- Python wrapper for as_devices library. need python
+#config BR2_PACKAGE_AS_DEVICES_CPP
+# depends on BR2_PACKAGE_AS_DEVICES
+# bool "wrapper C++"
+# default n
+# help
+# C++ wrapper for as_devices library
+#
+#config BR2_PACKAGE_AS_DEVICES_PYTHON
+# depends on BR2_PACKAGE_AS_DEVICES
+# depends on BR2_PACKAGE_PYTHON
+# bool "wrapper Python"
+# default n
+# help
+# Python wrapper for as_devices library. need python
hooks/post-receive
--
armadeus
|
