Browse Code
ALCHA aims to reduce FPGA project develop time by means of automation and abstraction, but without loosing the low-level control that HDLs, such as Verilog, provides.
It will support an object oriented programming model, abstract data and signal types, and compile-time scripting.
Features
- Compile to complete vendor-specific project from largely vendor-neutral source
- Automated timing-requirement generation
- Proceedural state-machine programming model
- Bit- and timing-accurate circuit description
- Compile-time scripting
Project Samples
License
GNU General Public License version 3.0 (GPLv3)Follow ALCHA
nel_h2
Get the most trusted enterprise browser
Defend against security incidents with Chrome Enterprise. Create customizable controls, manage extensions and set proactive alerts to keep your data and employees protected without slowing down productivity.
Rate This Project
Login To Rate This Project
User Reviews
Be the first to post a review of ALCHA!