Revision two of the hardware has been completed and sent to be manufactured. If all goes well I will have it verified in the next week and will be able to get boards to everyone that wants one.
Write functionality has been released to cvs. There is a bug where a reset is triggered every 32nd read however. This is causing data corruption and is documented under bugs.
A version of the VHDL that is succesfully and consistantly reading 28F and 29F chips has been officially released!
I have three development boards built and waiting to be shipped for free to three developers interested in working on this project.