openTPU is an open-source AI accelerator project that exposes an entire inference hardware stack in one readable repository. It includes SystemVerilog RTL, a custom instruction set, a bit-exact simulator, a kernel language, compiler tooling, host software, and profiling utilities. The hardware design runs on a Xilinx Kintex-7 PCIe FPGA card and has been demonstrated with modern language models including Qwen, LFM, Gemma, SmolLM, and Phi variants. Both int8 and compact 4-bit weight formats are supported to trade memory use, accuracy, and throughput. Validation tools compare simulator, RTL, FPGA, and Hugging Face reference outputs to detect implementation differences. The included Lens profiler exposes timelines, roofline information, and per-instruction behavior. Command-line chat, monitoring tools, diagnostics, and an OpenAI-compatible inference server make the accelerator usable beyond low-level hardware experiments.
Features
- SystemVerilog AI accelerator RTL
- Custom ISA and bit-exact simulator
- Kernel language and compiler
- Int8 and 4-bit model execution
- Hardware profiler and diagnostic tools
- OpenAI-compatible inference server