Showing 30 open source projects for "system info software"

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  • 1
    AWS EC2 FPGA

    AWS EC2 FPGA

    AWS EC2 FPGA hardware and software development Kit

    AWS EC2 FPGA Development Kit is a set of development and runtime tools to develop, simulate, debug, compile and run hardware-accelerated applications on Amazon EC2 F1 instances. It is distributed between this GitHub repository and FPGA Developer AMI - Centos/AL2 provided by AWS with no cost of development tools. After creating an FPGA design (also called CL - Custom logic), developers can create an Amazon FPGA Image (AFI) and easily deploy it to an F1 instance. AFIs are reusable, shareable...
    Downloads: 0 This Week
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  • 2
    Gwyscope

    Gwyscope

    Open hardware SPM controller with advanced sampling support.

    ... It is based on a low cost FPGA board Red Pitaya and additional high bit depth AD and DA converters. When put together with the AFM scanning hardware (sensor, scanner and their amplifiers) and user interface software it can serve as a standalone SPM system. Otherwise, it can serve as a sub-module for a custom built SPM system, e.g. providing the feedback loop mechanism only. Finally, it can be used as a board for developing advanced sampling techniques, which was the primary goal.
    Downloads: 0 This Week
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  • 3

    pyrpl

    PyRPL turns your Red Pitaya into a powerful analog feedback device.

    The Red Pitaya is a commercial, affordable FPGA board with fast analog inputs and outputs. This makes it useful for quantum optics experiments, in particular as a digital feedback controller for analog systems. Based on the open source software provided by the board manufacturer, PyRPL (Python RedPitaya Lockbox) implements many devices that are needed for optics experiments with the Red Pitaya. PyRPL implements various digital signal processing (DSP) modules (see features below). It allows...
    Downloads: 97 This Week
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  • 4

    lpACLib

    An Open-Source Library for Low-Power Approximate Computing Modules

    The “lpACLib” library contains the VHDL description of accurate and approximate versions of several arithmetic modules (like adders and multiplier of different bit-widths) and accelerators. Moreover, it also provides the corresponding software behavioral models/implementations developed in C and MATLAB to enable quality characterization. Besides our novel designs, it also contains implementations for several state-of-the-art arithmetic modules and their approximate versions. This open-source...
    Downloads: 6 This Week
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  • 5

    COFILOS

    A Development Framework for Coldfire

    Contains a framework for Coldfire MCUs like 52254. The framework supports a Command Line Interface (CLI) that may work from Serial port, USB or ENET. The framework uses Processor Expert and IDE requirement is MCU Eclipse 10.4 from Freescale. Includes the FunkOS Realtime Operating System by Funkenstein Software Consulting, available at http://funkos.sourceforge.net Mainly it is a support package for the development board Perseus, but I have ported also the RTOS to MCF52233DEMO board...
    Downloads: 0 This Week
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  • 6
    CoreTML framework
    CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files. Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).
    Downloads: 1 This Week
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  • 7
    FSMDesigner
    FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.
    Downloads: 6 This Week
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  • 8

    ApproxAdderLib

    Library of Approximate Adders

    We provide MATLAB and Verilog Models of GeAr, and previously proposed adders (ACA-I, ETAII, ACA-II and GDA) at http://sourceforge.net/projects/approxadderlib/ GeAr is a low latency Generic Accuracy Configurable Adder that provides a higher number of potential configurations compared to state-of-the-art approximate adders, thus enabling a high degree of flexibility and trade-off between performance and output quality. These MATALB and Verilog models can allow software programmer as well...
    Downloads: 1 This Week
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  • 9

    MatlabSimulink2CPP

    Demo of Simulink to C++ C or HDL FGA for HFT potential

    Video and files download for Visual trading idea to C++ or FPGA HFT Meetup File download sample: test model (Matlab 2014b with Visual Studio 2013 C++ project generated) Powerpoint MATLAB SIMULINK http://quantlabs.net/blog/2015/04/video-and-files-download-for-visual-trading-idea-to-c-or-fpga-hft-meetup/
    Downloads: 0 This Week
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  • 10
    MiniLA logic analyzer software and hardware
    Downloads: 4 This Week
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  • 11

    Partially Reconfigurable Hardware

    Framework for Adaptive Hardware Concurrent Systems with DPR-FPGAs

    This project introduces new FPGA architectural tools and Linux OS modifications that aid in supporting Dynamic Partial Reconfiguration (DPR) on FPGAs for concurrent control. It shows that control systems benefit from hardware concurrency, meaning that by moving the control intelligence into hardware, the negative effects inherent to threads and their scheduler are minimized. This leaves software with the role of a high-level administrator rather than an executor, thereby eliminating unnecessary...
    Downloads: 0 This Week
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  • 12

    ASDM-NoC

    Asynchronous Spatial Division Multiplexing Router for On-Chip Networks

    ... testbench provided Languages: * Routers are written in synthesizable SystemVerilog * Test benches are provided by SystemC Software requirements: * The open source Nangate 45nm cell library * Synopsys Design Compiler (Synthesis) * Cadence IUS -- NC Simulator (for SystemC/Verilog co-simulation)
    Downloads: 0 This Week
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  • 13
    AVRILOS

    AVRILOS

    Simple AVR OS

    A simple Embedded System Framework that allows rapid development of applications build for AVR family. System is based on a super-loop architecture with check and skip (no-wait) flag event driver system. Supports: UART, SysTick Timer, ADC, SPI, EEPROM, PWM. Also supports: Xilinx FPGA configuration, FPGA SSI interface, smart card reader etc. Tested partially (different modules in each case) on ATMega163/16/32/323/8. Awards CodeProject 2010, Third Prize, Hardware and Device...
    Downloads: 0 This Week
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  • 14
    xswifs stands for: cross SoftWare Interfaces. This project provide examples (snippets) for interfacing various software tools and languages with various mechanism. It has been created to help in HW/SW co-simulation and to provide benchmarks.
    Downloads: 0 This Week
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  • 15
    FPGAmer is a framework to develop embedded games. Our development platform is the Xilinx University Program Virtex-II-Pro but not limited to that. FPGAmer includes custom hardware components plus a custom software framework and some sample games.
    Downloads: 0 This Week
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  • 16
    Genode FX is a composition of hardware and software components that enable the creation of fully fledged graphical user interfaces as system-on-chip solutions using commodity FPGAs such as Xilinx' Spartan3 and Virtex FPGAs.
    Downloads: 0 This Week
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  • 17
    Software which runs on a gunstix overo, to contron stepper motors, and servos in such a way that they play the piano. The actual stepper motor and servo driver are done on an FPGA board from knjn.com (pluto-3).
    Downloads: 0 This Week
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  • 18
    Custom Architecture Generator Tool is a software based on the Netbeans Platform, the main purpose is to accelerate the embedded system realisation with a high level description: VHDL code,C2VHDL conversion,Quartus project generation,real time application
    Downloads: 0 This Week
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  • 19
    OpenWebServo is an Open Source Hardware and Software project. Its main goal is to develop a web-controlled servo system. The project includes web application, firmware and hardware design.
    Downloads: 0 This Week
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  • 20
    This project aims to develop a colour-based vision processing system for use in RoboCup. We are using a CCD camera for input to an FPGA. The system locates coloured objects and outputs detected corners.
    Downloads: 0 This Week
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  • 21
    the goal of this project is to build a stack for Lonworks Protocol and device working on this protocol
    Downloads: 0 This Week
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  • 22
    Plugin Eclipse/VDT supports hardware development in VHDL/Verilog, allowing to easily integrate command-line controlled tools in Eclipse. Underlying Eclipse/ExDT plugin provides integration means that may be used for other languages and applications.
    Downloads: 0 This Week
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  • 23
    Project SUZAKU, home of software development based on SUZAKU FPGA board
    Downloads: 0 This Week
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  • 24
    The OS561 operating system based around FORTH/Java. The OS is to run on a VHDL chip OpenHardware design called the Minon, but could become available for other platforms. The unique point of the design is a revolutionary data compression technology.
    Downloads: 1 This Week
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  • 25
    The aim is to develop a foundation for a FPGA hardware platform able to run Linux kernel and software. It must be easy to add hardware accelerated ip-cores to the FPGA. Ethernet and TCP/IP is a corner stone of the hardware and software.
    Downloads: 0 This Week
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