Showing 15 open source projects for "python::module"

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  • 1
    Gwyscope

    Gwyscope

    Open hardware SPM controller with advanced sampling support.

    ...When put together with the AFM scanning hardware (sensor, scanner and their amplifiers) and user interface software it can serve as a standalone SPM system. Otherwise, it can serve as a sub-module for a custom built SPM system, e.g. providing the feedback loop mechanism only. Finally, it can be used as a board for developing advanced sampling techniques, which was the primary goal.
    Downloads: 0 This Week
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  • 2

    pyrpl

    PyRPL turns your Red Pitaya into a powerful analog feedback device.

    ...This makes it useful for quantum optics experiments, in particular as a digital feedback controller for analog systems. Based on the open source software provided by the board manufacturer, PyRPL (Python RedPitaya Lockbox) implements many devices that are needed for optics experiments with the Red Pitaya. PyRPL implements various digital signal processing (DSP) modules (see features below). It allows to arbitrarily interconnect the available DSP modules and retrieve signal values on timescales below 1 ms. The graphical user interface (GUI) provides a realtime display of the various measurement instruments and allows the easy configuration of DSP signal chains and feedback controllers. ...
    Downloads: 3 This Week
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  • 3

    COFILOS

    A Development Framework for Coldfire

    Contains a framework for Coldfire MCUs like 52254. The framework supports a Command Line Interface (CLI) that may work from Serial port, USB or ENET. The framework uses Processor Expert and IDE requirement is MCU Eclipse 10.4 from Freescale. Includes the FunkOS Realtime Operating System by Funkenstein Software Consulting, available at http://funkos.sourceforge.net Mainly it is a support package for the development board Perseus, but I have ported also the RTOS to MCF52233DEMO...
    Downloads: 0 This Week
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  • 4

    Notepad++ Verilog Plugin

    Verilog plugin for Notepad++

    Verilog processor for Notepad++. Current features: - Instantiate a module - Insert registers/wires from a module - Generate a test bench template - Automatically inserts a default header for a test bench - Insert a clocked always block v1.2.0 now supports ANSI and non-ANSI module declarations. To use this plugin, select the module declaration (including parameter and I/O definitions below for non-ANSI) and click SHIFT-CTRL-C.
    Downloads: 1 This Week
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  • 5
    Pulse Programmer
    A programmable signal generator and RF synthesizer for scientific experiments, especially quantum computing and quantum information processing. It includes hardware, firmware, software, and documentation, all under an open source license.
    Downloads: 0 This Week
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  • 6

    FPGA starterkit essentials

    basic debug tools while using FPGA boards

    Module 1: durchblicker: embedded Logicanalyzer with direct output on VGA-monitor
    Downloads: 0 This Week
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  • 7
    openAut

    openAut

    Open Source Hardware For Industrial Automation

    ...This project will have a few sub-projects that will focus on individual hardware for various industrial purpose. Some of the sub-projects will be of type Field-IO Modules development, Analog-IO Module development etc.
    Downloads: 0 This Week
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  • 8

    pyCPU

    Python Hardware Processor

    The Python Hardware Processsor is a implementation of a Hardware CPU in Myhdl. The CPU can directly execute something very similar to python bytecode (but only a very restricted instruction set). The Programm code for the CPU can be written directly in python (very restricted parts of python). This code is then converted by a small python programm to this restricted python bytecode.
    Downloads: 0 This Week
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  • 9

    smPla

    SystemVerilog module to substitute Verilog PLA system tasks.

    SystemVerilog module that models the following PLA system tasks of Verilog: $a/sync$and$array $a/sync$nand$array $a/sync$or$array $a/sync$nor$array $a/sync$and$plane $a/sync$nand$plane $a/sync$or$plane $a/sync$nor$plane.
    Downloads: 0 This Week
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  • 10
    This project includes a set of tools and guidelines designed for rapid production of large-scale embedded systems projects. The tools enable quick generation of reusable, reconfigurable hardware, using a user-specified hardware description language.
    Downloads: 0 This Week
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  • 11
    This project's goal is to provide a simple but extendable SOC (System On Chip) that can be loaded into an FPGA in order to quickly test custom coprocessors and evaluate their robustness against SCA (Side Channel Attacks) or others physical attacks.
    Downloads: 0 This Week
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  • 12
    Synthesia is an open hardware/software platform intended for creating standalone audio devices such as synthesizers on embedded processors.
    Downloads: 0 This Week
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  • 13
    A VHDL - Verilog SAD256 module
    Downloads: 0 This Week
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  • 14
    System on Chip design generator.
    Downloads: 0 This Week
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  • 15

    Labcoat: Cleanroom Apps for SuperWikia

    Labcoat; the VHDL graphic emulator.

    Labcoat for SuperWikia Alpha fabrication manages new or revised fabrication processes. Its 'Cleanroom' applets allow codesmiths to access the lab environment, used to create semiconductors, substrate prototypes, chipset instruction blocks and other Labcoat projects. Our extensions in future releases will include UML support for C#/C++ conforming projects, import/export architecture schematics and refactoring sub-projects.
    Downloads: 0 This Week
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