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This is a collection of tools and a code library to assist engineers who are developing SystemVerilog based verification environments. Components include utility libraries, scoreboard and shutdown manager implementation, register tool, etc.
XJML 1.0 is a platform for Verification and Validation of Java classes
XJML 1.0 actually can reads one Java class and its contract (written in XML) and then executes the next verification techniques:
1. Runtime Assertion Checking (RAC). Using JML4c and JML4rt tools.
2. Extended Static Checking (ESC). Using ESC/Java2.
3. Full Static Program Verification (FSPV). Using the Why platform (tested with Why 2.30 and Why3 0.71)
The SAVE-IDE is an integrated development environment for architectural and component-based design of embedded systems. Including a tool chain for analysis, verification and code generation, with focus on safety and real-time.