Search Results for "input-leap"

SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing

otl is a text processor for generating markup from plain text. Much of both the input and output formats can be customized. otl supports structures such as nested ordered lists, headers and footers, and tables.

Collection of tools for input, reading, processing, and typesetting Taiwanese language. Includes SCIM and quail input methods, Firefox dictionary plugin, plus scripts for LaTeX and HTML generation.

tgen generates a Web site from a collection of input files of a variety of types, using a set of registered HTML autogenerators. Cvs-Brancher allows scheduling of web deployments. vwebedit provides web-based editing of cvs repositories.