linux desktop free download

5 projects for "linux desktop" with 2 filters applied:

Text Processing MinGW/MSYS2 Clear Filters & Widen Search

Ship Agents Faster
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Gemini Enterprise Agent Platform lets you rapidly build, scale, govern and optimize production-ready agents grounded in your organization's data. The platform enables developers to build custom or pre-built agents for virtually any use case. New customers get $300 in free credits.

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Build Securely on AWS with Proven Frameworks
Lay a foundation for success with Tested Reference Architectures developed by Fortinet’s experts. Learn more in this white paper.

Moving to the cloud brings new challenges. How can you manage a larger attack surface while ensuring great network performance? Turn to Fortinet’s Tested Reference Architectures, blueprints for designing and securing cloud environments built by cybersecurity experts. Learn more and explore use cases in this white paper.

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1

Ada Class Library

Ada Class Library - an object orientated library for Ada.

Text search and replace. Scripting (small tool programs). CGI scripts. Execution of external programs (incl. I/O redirection). Garbage Collection. Extendended Booch Components. CD-Recorder

Downloads: 106 This Week

Last Update: 2 days ago
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2

SciTECO

Advanced TECO dialect and interactive screen editor based on Scintilla

SciTECO is an interactive TECO dialect, similar to Video TECO. It also adds features from classic TECO-11, as well as unique new ideas. Project development takes place here: https://git.fmsbw.de/sciteco The download archive is mirrored at Sourceforge, but for nightly builds check out: https://sciteco.fmsbw.de/downloads/nightly/

1 Review

Downloads: 0 This Week

Last Update: 2026-04-20
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3

Ltxshell

Shell for calling LaTeX and accompanying tools (dvi-viewer, dvips, ps-file-viewer, pdf-file-viewer) on Linux and Windows-systems

Downloads: 0 This Week

Last Update: 2024-06-20
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4

SmGen

Verilog Finite State Machine (FSM) Code Generator

SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing

Downloads: 0 This Week

Last Update: 2019-04-25
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Veeam Data Platform v13.1
Move workloads across hypervisors and clouds with no vendor lock-in. Try VDP free today.

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5

Luna Editor

Write and edit your lua scripts in an easy way.

Write and edit your lua scripts in an easy way.

Downloads: 1 This Week

Last Update: 2022-01-14
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