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SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing
The "Lib45" string search library provides routines that generate fast string searching code at run-time. The library is written in Assembly language for Intel 32bit CPUs.
Temple provides a system for managing various kinds of templates from
the command line. Written in perl, it provides a flexible way of managing
defaults for various kinds of documents, such as C programs or HTML source,
while easily allowing parameter
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NE(a)LS is a multi-user, multi-host editing and layouting system to create small newspapers (like school-magazines). It is intended to be the glue between different exisiting projects like CVS, Text Editors, LaTeX etc. pp. The main code is written in perl