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An operating system written in RTL
Verilog Finite State Machine (FSM) Code Generator
A Development Framework for Coldfire
Demo of Simulink to C++ C or HDL FGA for HFT potential
cMIPS - an FPGA ready VHDL model for 5-stage pipeline, MIPS32r2 core
Framework for Adaptive Hardware Concurrent Systems with DPR-FPGAs
Simple AVR OS