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log4cplus is a simple to use C++ logging API providing thread-safe, flexible, and arbitrarily granular control over log management and configuration. It is modelled after the Java log4j API.
SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing
This is a custom network stack with a process-per-protocol, or more accurately, thread-per-protocol design, supporting a crude distributed database intended as demonstration or exercise for students studying the course of computer networking.
gapcmon is a gtk/glib desktop monitor program for the apcupsd package. apcupsd interfaces with UPS power systems on local or networked systems. gapcmon connects to apcupsd via the NIS api to collect and displays the current operational state of the U
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