Search Results for "phase"

...It also solves many vulnerabilities and security issues found in TrueCrypt. This enhanced security adds some delay ONLY to the opening of encrypted partitions without any performance impact to the application use phase. This is acceptable to the legitimate owner but it makes it much harder for an attacker to gain access to the encrypted data. All released files are PGP signed with key ID=0x680D16DE, available on key servers and downloadable at https://www.idrix.fr/VeraCrypt/VeraCrypt_PGP_public_key.asc VeraCrypt can mount TrueCrypt volumes. ...

.... ## 🧭 Objectives - Learn and master : - Low-level C language - x86/x86_64 assembler - Modern processor architecture - Fundamental principles of operating systems - Develop a microkernel : - Lightweight and modular - Able to handle hardware interrupts (keyboard, timer) - Support minimal user space - Evolve to a simple OS: - With a rudimentary shell - Isolated user processes - A basis for experimenting with system concepts ## ⚙️ Project status > 🚧 Project under development - Learning phase (year 1) Short-term planned features : - [ ] Multiboot-compatible GRUB bootloader - [ ] Text mode display (VGA) - [ ] Interrupt management (IRQ / keyboard) - [ ] First task manager loop

...LIXA is a Transaction Manager but it's not a Transaction Monitor: this is the distinguishing feature of the project. LIXA technology enables every application container, like a web server or a shell, to become a two phase commit application server. The client/server architecture of LIXA allows many application containers to share a single LIXA (state) server: this is ideal when horizontal scalability is a must and many identical application containers must refer to a single transactional environment. LIXA can be used with the C, C++, Java, Python and COBOL programming languages.

The Red Pitaya is a commercial, affordable FPGA board with fast analog inputs and outputs. This makes it useful for quantum optics experiments, in particular as a digital feedback controller for analog systems. Based on the open source software provided by the board manufacturer, PyRPL (Python RedPitaya Lockbox) implements many devices that are needed for optics experiments with the Red Pitaya. PyRPL implements various digital signal processing (DSP) modules (see features below). It allows...

...The decoded messages are stored in a database (MySQL) or forwarded by email using ssmtp. Besides just listening for messages openGalaxy can also be used to arm/disarm the panel and much more... This software is still in a testing (beta) phase but has been tested successfully with the following security control panels made by Microtech / Honeywell Security: - Galaxy 18 (Dutch firmware v1.25) with external RS232 box - Galaxy 60 (Dutch firmware v1.07) with external RS232 box - Galaxy G3-520 (Dutch firmware v5.50) (internal RS232)

...It is equipped with a large B/W screen, two buttons, accelerometer, magnitometer, current and voltage sensors, light sensor, internal temperature sensor, battery-backed real-time clock, a buzzer and has connection ports for external speed sensor (motor Hall, phase or reed switch), a Bluetooth SPP dongle, up to three temperature sensors (TMP36, LM35, KTY83 etc), cadence sensor, throttle handle, output to controller throttle input. The project includes: The hardware (schematics & drawings) The firmware (microcontroller program) The software (for mobile phones and PC) Project developement is being tracked (in Russian) here: http://electrotransport.ru/ussr/index.php?...

The aim of this project is to provide an easy to use fast prototyping platform for embedded systems. The hardware is targeted to be small, DIP package hybrid technology chip. In the current phase it runs on Microchip demo boards. http://www.microchip.com/dm320005-2 http://www.microchip.com/dm320006 and SunDisk Ultra 16Gb SDcard

A project to provide DECnet phase IV connectivity for Linux

AVOS is an advanced Real-Time 32-bit operating system that will work in any 80386 & above architecture pc's. AVOS employs a message passing scheme. The project has two main parts - The booting phase and kernel development. It is written in C and 8086 ASM.

serel is software that helps computers boot faster. serel adds synchronisation and integrity-checking to the operating system service startup phase, allowing a computer's services to start in parallel.

The Portable Highly Available Sensors (PHASE) project aims at creating an example application that demonstrates the usage of Application Interface Specification service interfaces of the Service Availability Forum.

Tracer utility and sdk for embeded development on uC platforms. The first goal of this sdk to download data streams from the target in debuging and testing phase. It is similar than microchip's RTDM and DMCI, but faster.