Search Results for "fsm"
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2 projects for "fsm" with 2 filters applied:
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Active Object real-time OS
AO RTOS is small real time OS based on Active Object concurrency model
AO-RTOS is a pure object-oriented small footprint real-time operating system for embedded devices. The project is using Active Object (or Actor) concurrency model and finite state machine (FSM) design template as implementation base. -
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SmGen
Verilog Finite State Machine (FSM) Code Generator
SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing
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