Showing 3 open source projects for "half"

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  • SKUDONET Open Source Load Balancer Icon
    SKUDONET Open Source Load Balancer

    Take advantage of Open Source Load Balancer to elevate your business security and IT infrastructure with a custom ADC Solution.

    SKUDONET ADC, operates at the application layer, efficiently distributing network load and application load across multiple servers. This not only enhances the performance of your application but also ensures that your web servers can handle more traffic seamlessly.
  • A CRM and Sales Data Management Platform for Multi-Line Sales Teams Icon
    A CRM and Sales Data Management Platform for Multi-Line Sales Teams

    The CRM, sales reporting, and commission tracking tool uniquely tailored to the needs of manufacturers, sales reps, and distributors.

    Repfabric is a customer relationship management (CRM) software designed specifically for multi-line sales teams (i.e. reps, distributors, wholesalers, dealers, and manufacturers). It streamlines and simplifies the sales process by providing deep integration with email, contacts, calendars, and deal tracking. The platform enables users to track commissions from CRM to sale, make updates directly from mobile devices, and document sales calls using voice-to-text features.
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    UniSIMD-assembler

    SIMD macro assembler unified for ARM, MIPS, PPC and x86

    UniSIMD assembler is a high-level C/C++ macro assembler framework unified across ARM, MIPS, POWER and x86 architectures. It establishes a subset of both BASE and SIMD instruction sets with clearly defined common API, so that application logic can be written and maintained in one place without code replication. The assembler itself isn't a separate tool, but rather a collection of C/C++ header files, which applications need to include directly in order to use. At present, Intel SSE/SSE2/SSE4...
    Downloads: 0 This Week
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  • 2
    cMIPS

    cMIPS

    cMIPS - an FPGA ready VHDL model for 5-stage pipeline, MIPS32r2 core

    This project was moved to https://gitlab.c3sl.ufpr.br/roberto/cmips The code here is no longer up to date. The VHDL model mimics the pipeline design described in Patterson & Hennessy's book (Computer Organisation and Design) and is an almost complete implementation of the MIPS32r2 instruction set. The TLB and assorted control registers will be included soon (as of fev 2015). The model was synthesized for an Altera EP4CE30F23. The model uses up 15% of combinational blocks and 5% logic registers.
    Downloads: 0 This Week
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  • 3
    Caracal Boot Loader (cboot) is a second stage boot loader which takes over from GRUB (or other multiboot compatible loader) and prepares the system for your higher-half kernel. It now also includes VESA mode setting support.
    Downloads: 0 This Week
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