Search Results for "coding line simulator" - Page 3

Dynagen is a utility for use with the dynamips Cisco router simulator. It allows you to quickly provision and manage virtual networks using an INI like configuration file.

Rt-Simulator is a library to simulate task behaviors on uni/multi-processors with different scheduling algorithms. It provides a run-time reference by fast-prototyping and it can also used for scheduling algorithm research simulation.

This project about providing run-time support for developing Decentralized Autonomic Computing systems (Eclipse Innovation Grand). Currently the project contains a automatic guided vehicle (AGV) simulator and an editor and visualisation as eclipse plugin

This project provides a tool-chain for compiling C code for the SPEAR2 processor. It comprises a C compiler (GCC), an assembler/linker, a macro assembler, a basic library and a simulator.

SIM-MPI is a trace-driven simulator which can be used for performance prediction of large scale parallel program based on MPI library. SIM-MPI is based on Lo2gGP model which can capture the software overhead in high level communication library.

IITK OSD Simulator Project at Indian Institute of Technolgy,Kanpur is an implementation of simulator for object based storage device(OSD). This package contains OSD-iSCSI module and T10 compliant OSD simulator. Support for Collections is provided.

QUENAS (QUeued Event Network Automatic Simulator) is a Network Simulator that enables to create a network of nodes and simulate communications between then. Currently, the Hypercube protocol is implemented at network layer.

Package for coding and decoding files with Matheos algorithm from commandline or console in Linux/Unix Environment. Based on Keys stored in files or as hardware locks (on devices). Fast and strong coding. Fast encoding.ONLY BINARY PACKAGES FOR NOW!

Traffic simulator generating DSCP marked traffic between two endpoints, to demonstrate DSCP and general QoS concepts.

NS-2 Trace Statistics is a tool for easy generation of summary statistics from Network Simulator trace files, such as: total and network delay, packets generated, sent, received and dropped, run length histograms and MRU stack depth.

Mupisim is a simulator for distributed, mobile systems. Its primary purpose is the study of mobile processes (e.g. mobile agents) and their communication mechanisms. It may also be used to evaluate the efficiency of a given process migration scheme.

DYMOUM is an implementation of the DYMO (Dynamic Manet On-demand) routing protocol both for Linux kernel and ns2 network simulator, written in C and C++.

The aim of this project is to have a current implementation of the experimental VFER protocol (http://vfer.sf.net) within the ns-2 network simulator. The design of VFER can then be tweaked using results from this simulation.

This project aims at porting IBM's Object Rexx Back to OS/2, based on based on the work of http://www.oorexx.org/, Open Object Rexx, (ooRexx). The main aim here is to work on the possibilities of such a port, make files as well as specific OS/2 coding.

A cross-platform simulator for embedded systems, with a plug-in architecture for adding microcontrollers and other devices. Written in C for maximum compatibilty and speed. Currently has support for AVR AT90S8515 and ATmega128.

Numerically estimate an efficiency of code construction algorithms. Randomly generate n binary words of length m with minimum Hamming distance d and create a prefix code (= retrieval tree) from them. Based on PhD work.

A java based network and firewall simulator that allows users to set and test the effectiveness of firewall rules using either a command line interface or graphical user interface.

Tesoro is an open source operating system project fully written in x86 Assembler language. The architecture is partially based on some QNX ideas and some fresh ideas. It combines low level assembler coding (e.g. microkernel with extremely fast task switch

A self paced Microprocessor course for those with no Microprocessor experience but who wish to learn about and build devices with them. Starting with a early Microprocessor, the Intel 8085 and providing a Java based 8085 simulator and a PDF handbook the student may work thru assembly/machine code examples to gain understanding. Other on-line book links are provided. Finishing with a modern Micro-controller, the ARM Cortex-M0 based STM32F051.

This project has adopted a parser for the output of SimIt-ARM's sema_count program. It is useful to get statistically relevant information from the output of a batch run of the simulator.

This is a research project to test GPU (OpenCL) usability for image compression. Jpeg format is chosen because it is relatively simple and I am familiar with it. 2013-01-22: For now only pixel conversion and DCT transform is done with OpenCL, entropy coding is done with CPU in one thread. Unfortunately this implementation is no match for even one threaded SSE2 jpeg encoder, too much data goes through PCIe. Look at "Debunking the 100X GPU vs. CPU Myth: An Evaluation of Throughput...

PHOBOS implements a high performance storage solution on various storage backends, including tape libraries. It is fully based on open-source standards, open data formats and protocols, which avoids vendor locking of your data.