Search Results for "coding line simulator"

...Its firmware is written in Arduino-style C++ and intentionally kept compact so learners can understand the complete flight-control stack. Communication uses MAVLink over Wi-Fi or ESP-NOW. The drone can be controlled with a USB gamepad, radio controller, or smartphone. A wireless command-line interface supports configuration and analysis without a wired connection. The project also includes a Gazebo simulator that runs the original flight code and a Python library for scripted or automatic flights. Hardware files, assembly instructions, troubleshooting guides, and flight-control documentation make it suitable for hands-on learning.

v21,06.018 IEC101 RTU Server Simulator, IEC101 Client Master Simulator, Static and Dynamic Libraries, Source Code Library. Driver for Windows, POSIX Linux, ARM , PowerPC, QNX & more * Make your RTU, protocol converter, Gateway, HMI, Data concentrator compatible with iec 101. * Download Free Evaluation Kit - IEC 60870-5-101 Development Bundle. * In the Bundle included IEC 101 Server & Client Simulator, Windows and Linux SDK, C# projects, Doxygen , Raspberry Pi, ...

A neuronal network simulator using NeuroML (as generated by neuroConstruct) for network description. Conductance- and rate-based Hodgkin-Huxley neuron models, and a number of other neurons & synapses. A 5-6-order RK method is used for integration.

The project page provides the source code of custom built simulators used in our publications whose URL are given as follow: http://dx.doi.org/10.1016/j.comcom.2013.09.006 http://dx.doi.org/10.1109/PIMRC.2009.5449983 The titles of the papers are: Online XOR packet coding: Efficient single-hop wireless multicasting with low decoding delay (COMCOM VERSION). An efficient network coding based retransmission algorithm for wireless multicast (PIMRC VERSION). Help (README) files...

fslurp is a program to pull the data from a Fronius inverter systems via a serial port connection. It supports both single and multiple inverter systems through the Interface Card Easy and the Fronius Interface Card/DataLogger Box. Fronius Sensor Card devices are also supported. It supports both human-readable and delimited (CSV-style) text output. Sample output can be seen by building project and exercising one of the test simulator targets (e.g. simIFCEasy). It is written in...

A disassembler and a simulator for the MSP430 CPU. Both programs only read TI-TXT files. Licensed under the Simple Public License (SimPL) 2.0. For full license information, please read license.txt. Compiled executables are available for Windows and Mac OS X. Linux users will have to compile their own binaries. Instructions for compilation are included in README.txt. A Qt-based GUI is available for sim430. Binaries only for OS X, for now. Source files can be found in src/qt folder.

MiXiM is a simulator for wireless and mobile networks using the OMNeT++ simulation engine.

UM-OLSR is an OLSR (Optimized Link State Routing protocol) implementation for the ns2 network simulator.

Pincpt is a tool for checkpointing architectural state of an x86 application. The checkpoints are human-readable and are intended to initialize a user-mode CPU performance simulator. Currently pincpt only works with 32-bit single-threaded applications.

CDNSimulator provides several libraries for ns2 simulator to extend it with content delivery networks (CDN).

This project is based on a personal effort for researches on dynamics of coevovling networks. As a physicist, I am trying to build a framework for discrete-time dynamics of general networks, and its software libraries with APIs.

Yans is a extensible, mixed-level, Monte-Carlo Method based, discrete event network simulator. Yans is divided into interacting layers, namely: core, topology, nodes, monitors; and is driven by a config-file that describes the setup of the network.

Operating System Framework for a MIPS Simulator. The project includes a multi-threaded MIPS Simulator and a naive Operating System and an Assembler for the simulated architecture, intended to be used for instructional and educational purpose.

Rt-Simulator is a library to simulate task behaviors on uni/multi-processors with different scheduling algorithms. It provides a run-time reference by fast-prototyping and it can also used for scheduling algorithm research simulation.

QUENAS (QUeued Event Network Automatic Simulator) is a Network Simulator that enables to create a network of nodes and simulate communications between then. Currently, the Hypercube protocol is implemented at network layer.

NS-2 Trace Statistics is a tool for easy generation of summary statistics from Network Simulator trace files, such as: total and network delay, packets generated, sent, received and dropped, run length histograms and MRU stack depth.

DYMOUM is an implementation of the DYMO (Dynamic Manet On-demand) routing protocol both for Linux kernel and ns2 network simulator, written in C and C++.

The aim of this project is to have a current implementation of the experimental VFER protocol (http://vfer.sf.net) within the ns-2 network simulator. The design of VFER can then be tweaked using results from this simulation.

Numerically estimate an efficiency of code construction algorithms. Randomly generate n binary words of length m with minimum Hamming distance d and create a prefix code (= retrieval tree) from them. Based on PhD work.