Search Results for "processor"

A library for in-process compilation of Kotlin and Java code, in the spirit of Google Compile Testing. For example, you can use this library to test your annotation processor or compiler plugin.

command line based tool to collect Perfmon Counting data from Hardware PMU C ounters on Intel x86 processors Supported Platforms <> Server - Intel 5th Gen Xeon Processor (Emerald Rapids) -> Core (Raptor Cove) - Intel 4th Gen Xeon Processor (Sapphire Rapids) -> Core (Golden Cove) -> CHA <> Client - Intel 14th Gen Client Processor (Meteorlake) -> P-CORE (Redwood Cove) -> E-CORE (Crestmont) - Intel 13th Gen Client Processor (Raptorlake) -> P-CORE (Raptor Cove) -> E-CORE (Gracemont) -> ARB - Intel 12th Gen Client Processor (Alderlake) -> P-CORE (Golden Cove) -> E-CORE (Gracemont) -> ARB

A simple tool which lets you spawn threads that do heavy work, thus hurting your CPU.

NOTE: This project is marked with 'Status: Abandoned' on SourceForge because not enough time can be dedicated to this project. However it may still get sporadic commits to the repository. eCxx is a library for AVR and NodeMCU tailored for micro LED displays and lighting effects. eCxx is utilizing Makefile build system. Java and Python based applications/tools are also included to ease the development and debugging process using the host PC. On one side, eCxx supports the original...

SCHEDuler SIMULAtor (originally sched_sim) is a simple C++ event driven simulator of scheduling policies (single processor). Currently supported scheduling policies are: FIFO, LIFO, EDF, LST, RM, DM.

Test your processor, the performence and the stability by overclocking with Process Benchmark Freatures: - Multithreading (12 Threads) - under 1 MB

Writing Testbenches for FPGA/ASIC design is always a very fastidious and boring task. This project helps any FPGA/ASIC designer by providing a full RTL test environment with C support.

Swing Java Application manages software requirements and associated functional tests, including results, showing requirements/tests traceability at all time. Requirements and tests are formatted as in text processor; print-ready documents are generated.

DSPemu emule a digital signal processor TMS320F243, with console interface showing the registers and memory. With DSPemu is possible test algorithms such as Filter, FFT/IFFT. This can be integrate and used with a circuit simulator.

xchecker is both a test framework for XML and XSLT, and a wrapper for an XML Schema processor that allows XML Schema documents to be augmented with xchecker. xchecker checks can be any combination of XML Schema, Relax NG, XPath 2.0, XSLT 2.0 and XQuery.