Search Results for "digital logic simulator"

Control logic Java package is a set of Java classes aimed at: - Implementation of a real-time PC-based control - Simulation of control systems Setting up a control system involves working with so-called triggers. See project Wiki for detailed information and examples.

...At its core is a “transpiler” that converts ordinary functions (typically written in a restricted subset of C++ or similar) into FHE circuits, plus backends that execute those circuits with different FHE libraries. The workflow usually mirrors normal software development: write and test a cleartext implementation, run a simulator to validate logic and performance characteristics, then compile to an encrypted form to run with real FHE parameters. The project includes benchmarking harnesses, examples, and tutorials that demystify parameter selection, gate costs, and latency/throughput trade-offs. Multiple runtimes and backends are supported so teams can choose Boolean or integer schemes depending on accuracy and speed needs.

A framework for building machine to machine applications. It handles device protocols, device management, storage and retrieval of data sent by devices, a web based IDE including a device simulator and scripts based custom business logic.

Real Time Electronic Circuit Simulator. Include PIC, AVR and Arduino simulation. Code Editor & Debugger for Arduino, GcBasic, PIC asm, AVR asm. Downloads: https://simulide.com/p/downloads/ WebSite: https://simulide.com Forum: https://simulide.com/p/forum/ Patreon: https://www.patreon.com/simulide AVR simulation provided by simavr: https://github.com/buserror/simavr PIC simulation provided by GpSim: http://gpsim.sourceforge.net/

Electronic circuit simulator. Simple environment to run and debug firmware for AVR 8-bit microprocessors. Able to run arduino firmware. Internally this program uses the open source Simavr AVR Processor Simulator (https://github.com/buserror/simavr) and wraps all its functions in a GUI shell. Setups for firmware debugging scenarios can be created dynamically. Able to run 16MHz MCU with decent set of external parts in real time. In particular this can be used for development of CNC firmware...

...The bot configuration is then intepreted by a script engine at run-time and executes against the bot developer's selected parameter inputs. Each command contains the definitions for the required inputs as well as the required logic at run-time.

Modbus TCP Server simulator and library for .NET and Java implementation. See Library and source code: www.easymodbustcp.net For Connection to Modbus-TCP, Modbus-UDP clients, and Modbus RTU Master. Server listens at port 502 (can be changed). Shows also Protocol informations. Allows Multiple connections Digital Inputs; Coils; Input Registers and Holding Registers can be viewed and changed in a table-view Version V2.5: - Upgrade Library with new functions Version V1.1: - Asynchronous Reading and Writing to Speed up Server Version V1.0: - Bugfixes Version V0.96: - Bugfix - Server Simulator available as Java-Version Version V0.95: - Modbus UDP supported Version V0.94: - Some Bugfixes Version V0.93: - Added Function code 16 (Write Multiple Registers) - Some measures to speed up Modbus-Server - DLL-Library for .NET implementations added Version V0.92: - Added Function code 15 (Write Multiple Coils)

...We have created an eclipse plugin version of the tool as well as a standalone command-line based version. Both function identically and output a netlist that can be imported into a pcb layout tool. VHDL revolutionized how FPGA designs and digital logic circuits have been designed and captured and overcame many of the difficulties associated with the use of schematic editing tools. We believe the use of an HDL is also the way of the future when it comes to PCB design. The PHDL compiler automatically supports the output of PADS and Eagle netlists, and through extending a simple java class, users can generate a netlist in practically any format required by their choice of a layout tool.

QMC Logic Minimizer is a versatile application for fast simplifying truth and reduce lines tables. This program offers a comfortable user interface for generating and minimizing of the combinational logic functions. It is unique for its possibility of minimizing several functions at the same time. This program is intended for practical digital devices constructors as well as formal scholars and academics.

DSPemu emule a digital signal processor TMS320F243, with console interface showing the registers and memory. With DSPemu is possible test algorithms such as Filter, FFT/IFFT. This can be integrate and used with a circuit simulator.