Showing 2 open source projects for "shutdown-timer"

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    This is a collection of tools and a code library to assist engineers who are developing SystemVerilog based verification environments. Components include utility libraries, scoreboard and shutdown manager implementation, register tool, etc.
    Downloads: 0 This Week
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  • 2
    AVRILOS

    AVRILOS

    Simple AVR OS

    A simple Embedded System Framework that allows rapid development of applications build for AVR family. System is based on a super-loop architecture with check and skip (no-wait) flag event driver system. Supports: UART, SysTick Timer, ADC, SPI, EEPROM, PWM. Also supports: Xilinx FPGA configuration, FPGA SSI interface, smart card reader etc. Tested partially (different modules in each case) on ATMega163/16/32/323/8. Awards CodeProject 2010, Third Prize, Hardware and Device Programming Check the Wiki Page for more details.
    Downloads: 2 This Week
    Last Update:
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