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Showing 3 open source projects for "sv"
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Verible
Verible is a suite of SystemVerilog developer tools
The Verible project's main mission is to parse SystemVerilog (IEEE 1800-2017) (as standardized in the SV-LRM) for a wide variety of applications, including developer tools. It was born out of a need to parse un-preprocessed source files, which is suitable for single-file applications like style-linting and formatting. In doing so, it can be adapted to parse preprocessed source files, which is what real compilers and toolchains require. -
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Sparx' EA - MDG for TRAK
MDG for Sparx' Enterprise Architect to Create TRAK arch. descriptions
Custom add-in (MDG technology) for Sparx Systems Enterprise Architect UML modelling tool (https://sparxsystems.com/products/ea/index.html) to create architecture descriptions using TRAK https://sf.net/projects/trak Provides: - the set of TRAK views that can be represented using UML and SysML . Each view display a custom toolbox palette with the objects and relationships that are needed for that TRAK view - relationships can be made directly from the objects on a view using the... -
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