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FastSim consists of:
- 'Facile' a highly flexible and expressive processor-architecture specification-language.
- A compiler for the specifications which produces high-performance, fast-forwarding simulators.
x86 Multi-Core Microprocessor and assembler simulator written in C++
Saksham: Customizable x86 Based Multi-Core Microprocessor Simulator.
A C++ Project aimed at creating a platform for simulating basic features (Register and Instruction Set) of a x86 Based Multi Core Microprocessor and assembler family.
This project is implementation of the concept presented in the paper: https://ieeexplore.ieee.org/document/5231896
Documentation: https://sourceforge.net/p/saksham/wiki/Home/
Electronic circuit simulator.
Simple environment to run and debug firmware for AVR 8-bit microprocessors.
Able to run arduino firmware.
Internally this program uses the open source Simavr AVR ProcessorSimulator (https://github.com/buserror/simavr) and wraps all its functions in a GUI shell. Setups for firmware debugging scenarios can be created dynamically.
PPface is vector processor emulator / simulator (SIMD array processor with 1-bit processing elements). VEPRAN language used to design parallel algorithms and operate data slices. The system allows to visualize algorithm work by viewing vector memory and registers, it supports debugging and animated program execution.
To run this app on 64-bit system please install Windows Virtual PC and Windows XP Mode.
RCL, a simulator for Texas Instrument calculators from the 70's.
Calculators became available in the early 70's, soon after the integrates circuits, and several companies were competing with each other for a share of this market.
Texas Instruments was one of the bigger companies producing calculators. With RCL it is possible to recreate the TI calculators, strating with the Ti59e, with 960 program steps and a persistant memory (a combination of the the Ti58C and the Ti59).
RCL offers any person interested in the ancient ones in calculators (more...
SkyEye is a very fast full system simulator which takes llvm as IR of dynmic compiled framework.. It can simulate series ARM, Coldfire,Mips, Powerpc, Sparc, x86, TI DSP and Blackfin DSP Processor. Also can simulate multicore system by the multicore of host.
The commercial support is provided by DigiProto Co. (http://www.digiproto.com)
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DSPemu emule a digital signal processor TMS320F243, with console interface showing the registers and memory. With DSPemu is possible test algorithms such as Filter, FFT/IFFT. This can be integrate and used with a circuit simulator.
This project provides a tool-chain for compiling C code for the SPEAR2 processor. It comprises a C compiler (GCC), an assembler/linker, a macro assembler, a basic library and a simulator.
This project is about the graphical simulation of pipelining mechanism in Central Processor Unit. It includes (1) INES Components package created in Delphi, which allows fast building of simple simulators; (2) INES - simulator created with this package.
A Java based simulator for the LC-3 16bit processor used in several CSS classes.
(specifically in the book "Introduction to Computing Systems: From Bits and Gates to C and Beyond" (2nd Ed)
Moved to GitHub