Search Results for "source testing unit testing"
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Showing 45 open source projects for "source testing unit testing"
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Digital-Logic-Sim
A minimalistic digital logic simulator
Digital-Logic-Sim is an interactive simulation tool designed to help users understand digital logic circuits through a visual and hands-on environment. It allows users to build circuits using basic logic gates such as AND, OR, and NOT, and observe how signals propagate through the system in real time. The project emphasizes education, making it easier for beginners to grasp concepts like binary logic, combinational circuits, and signal flow. It provides a visual interface where components... -
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PICSimLab - Prog. IC Simulator Lab.
PICSimLab is a realtime emulator for PIC, Arduino, STM32, ESP32, ...
PICSimLab is a realtime emulator of development boards with MPLABX/avr-gdb debugger integration. PICSimLab supports microcontrollers from picsim, simavr, uCsim, qemu-stm32, qemu-esp32, and gpsim. PICSimLab has integration with MPLABX/Arduino IDE for programming the microcontroller's boards. As the purpose of PICSimLab is to emulate real hardware it does not have any source code editing support. For code editing and debugging the same tools used for a real board should be used with PICSimLab,... -
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Common Image Generator Interface (CIGI)
Industry standard communication with compliant image generators.
Software libraries and tools designed for implementation and testing of the Common Image Generator Interface (CIGI), an interface for communication between an image generator (IG) and host device in simulations. -
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libCIGI
C++ Library for the Common Image Generator Interface
...Packet processing is kept simple and a couple of simple helper functions / classes are provided in CIGIGeneric.h and some other headers to support this. Helpers are provided for version interpretation and conversion of packet parameters to text. Testing is supported using the boost test framework to develop unit tests for each of the packets. Because the library is header-only it can easily support many platforms / compilers but this has not yet been tested. Note: Currently the use of bitfields in the library may cause erroneous use in some compilers. -
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DEVS-Suite Simulator
Component, CA, and CCA models; superdense time, DB repo, testing, etc.
Integrated component-based and cellular automata (CA) Parallel DEVS simulator: https://acims.asu.edu/devs-suite/ OFFERS: 1) synchronized execution & animation, 2) run-time linear/superdense I/O & state trajectories, 3) Action Level Real-Time modeling & simulation, 4) model checking, 5) ABM, 6) CA & composable CA playback, 7) KIB interaction modeling, 8) hierarchical model libraries, 9) Black-Box testing & debugging, 10) PostgreSQL repository, 11) FMU (OpenModelica), 12) OSATE (AADL)... -
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Statistics101 - Resampling Statistics
Use simulation to perform statistical analyses.
Statistics101 is an Integrated Development Environment (IDE) that uses a simple, powerful language called “Resampling Stats” to develop Monte Carlo programs to analyze and solve statistical problems. The original Resampling Stats language and computer program were developed by Dr. Julian Simon and Peter Bruce as a new way to teach Statistics to social science students. Of course, social science students aren't the only ones who can benefit. Anyone who wants to learn statistics will find that... -
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RenewNet Foundry
Building blocks for the renewable energy industry.
RenewNet Foundry is a repository for an integrated set of simulation components for system simulation of wind, wave and tidal energy systems. -
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ModbusPal - a Java MODBUS simulator
Modbus slave simulator
ModbusPal is a project to develop a PC-based Modbus simulator. Its goal is to reproduce a realistic environment, with many slaves and animated register values. Almost everything in ModbusPal can be customized and controlled by scripts. -
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Programmer's library for random numbers. Also random number generator testing code. Intended for simulation, games and "Monte-Carlo" algorithms.
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RSSceSim
RSSceSim - Reputation System Scenario Simulator
RSSceSim is a simple and easy to extend simulation tool for reputation models that can be used for testing, comparing and benchmarking reputation system metrics under specific scenarios. -
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gpsfeed+
A software gps simulator
A software gps simulator, providing TCP/IP, UDP, http and serial port connectivity in NMEA 0183, XML or user defined output format. Usable for testing all kinds of GPS applications. Can playback pre-recorded GPS files with NMEA output. -
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SystemC Network Simulation Library (SCNSL) is an extension of SystemC to allow modelling packet-based networks such as wireless networks, ethernet, fieldbus, etc. As done by basic SystemC for signals on the bus, SCNSL provides primitives to model packet trasmission, reception, contention on the channel and wireless path loss. The use of SCNSL allows the easy and complete modelling of distributed applications of networked embedded systems such as wireless sensor networks, routers, and...
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Dynamic Linkage
Dynamic Linkage Social Aggregation Model
This project will create a user-friendly modeling system for studying animal social aggregations. The model codifies the a new hypothesis that the animal's state, kinematics, and the group's emergent properties are dynamically linked together, with each one affecting the others. The model will be constructed using Object-Oriented MatLab. -
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JBioFramework
Growing suite of proteomics simulations for educational purposes
JBioFramework (JBF) is a set of two different chemical separations simulations (2D Electrophoresis and Mass Spectrometry) that are frequently used in chemistry, biochemistry and proteomics research. It is written in the Java programming language and will run on any and all systems that have the JVM installed. As we continue to develop the software over the coming months/years and attempt to quantify the success of our efforts with testing and reviews, user input is very important. Please... -
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Factory Hardware Emulator
Emulate MODBUS industrial network with devices.
FactoryController testing/verification tool. Simulate MODBUS-TCP industrial network with set of devices. Update 2017: Hardware Emulator project has been integrated to main FactoryController codebase and this repository is obsolete. -
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ThreadPoolTester
Performance Testing Tool For Thread Pool Systems
ThreadPoolTester is a performance testing and comparison tool for java based Thread Pools. -
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ControllerTester
An automated controller testing tool
Copyright 2014 Alvin Stanescu, Software Engineering Chair @ Technische Universitaet Munchen Licensed under the Apache License, Version 2.0. Please refer to https://github.com/AlvinStanescu/ControllerTester/blob/master/README.md for further details. -
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gametes
Generate complex SNP models and heterogeneous datasets
Genetic Architecture Model Emulator for Testing and Evaluating Software (GAMETES) is an algorithm for the generation of complex single nucleotide polymorphism (SNP) models for simulated association studies. GAMETES is designed to generate epistatic models which we refer to as pure and strict, that constitute the worst-case in terms of detecting disease associations, since such associations may only be observed if all n-loci are included in the disease model. User friendly GAMETES software... -
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MQ Dataset Generator
Dataset Generator
Evaluation of methods/software is considered as a very important procedure for any user who wants to know the actual performance of a scientific tool. For the implementation of such evaluation procedure several test cases - scenarios shall be run. Obtaining the necessary test data sets can be an obstacle due to both privacy issues and also the time and cost associated with collecting multiple instances of a diverse set of data sources. An efficient alternative is the design and use of... -
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VirtualVEX
VEX Robotics Competition Simulator
VirtualVEX is an open-source simulator platform for the VEX robotics design system. It features full competition simulation, with automatic scoring and timing and multiple robot designs to choose from. VirtualVEX is also programmable: users can write and upload code using the bundled VVDevelop IDE, which has one-click deployment and testing support. VirtualVEX also supports dual-pad joysticks similar to those used by the actual VEX platform, allowing users to get realistic driving practice. ... -
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Frc Robot Simulator
A library that allows programs for a NI CRIO to be run on a computer.
A simulator that allows programs written in Java for a National Instruments CRIO to be run on a local computer by overloading the libraries provided by WPI. Some things we've fixed since 0.1a: Kinect no longer throws an exception upon instantiation, the Watchdog is usable, array elements can now be edited in the gui, and lots of under the hood reimplementation to replace native methods. DISCLAIMER: this is not like the diamond bullet studios simulation, this only simulates how the... -
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Bitte neue Website des aktuellen sourceforge Projekts PF_HP beachten! Please see new Website of the current sourceforge project PF_HP! Selbst im vereinfachten zweidimensionalen HP-Modell (hydrophob/polar) ist die Proteinfaltung bereits NP-vollständig. Hier implementieren wir einen brute-force Algorithmus zur Lösung kurzer Eingabesequenzen (0-1-Bitstrings) für die Proteinfaltung. Spende einen Cappuccino: Bitcoin: 1HqrdnfQgi9B4LW8UEvLAwh7X5gXPCoQ5B Litecoin:...
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With this application you can train your arithmetic! Addition, subtraction, multiplication and division! Try this application!
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Global Epidemic Simulator
A platform for modelling influenza-like epidemics and containment
The Global Epidemic Simulator is a platform for modelling directly transmissible human diseases such as influenza, and testing intervention policies that may reduce the duration or severity of an outbreak of such a disease. Building on previous work, this model is spatial and individual-based, using various geographical and demographic data sources to place households at absolute locations, populated with individuals of specific ages who each attend schools or workplaces situated in their... -
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CEDAR LS is an interactive digital logic simulator to be used for teaching of logic design or testing simple digital designs. It features both low-level logic gates as well as high-level components, including registers and a Z80 microprocessor emulat
