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Laboratory Circuit Simulator is transient simulator whiht analog and digital components support for laboratory classes.
This support spice netlist files, DSP Tms320f243 DSPemu integration and has high customizable device modules development in c.
libLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logic gates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files.
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Visually build and simulate boolean logic circuits
Visually build boolean logic circuits and then simulate their operation. Create custom components from user-designed circuits. Written in Java for cross-platform functionality.
NOTE: This project has moved to Bitbucket at http://bitbucket.org/kwellwood/circuitsandbox
ESys.NET is a new system-level modeling and simulation environment. It takes advantages of .NET capabilities such as introspection, multi lingual model definition,... It allows more easily the creation of external tools (ex: verification, debugger, ...)
Digital circuit simulator with an own IC-scripting-language, programmed in Visual C++ 2003.net, currently only available for Windows. Major technical goals: Creation of a bugfree interface and effective signal simulation. All config-files in txt-format.
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A cross-platform simulator for embedded systems, with a plug-in architecture for adding microcontrollers and other devices. Written in C for maximum compatibilty and speed. Currently has support for AVR AT90S8515 and ATmega128.
NecJGui is an antennas design tool, interface for Numerical Electromagnetic Code. It allows easily making NEC input files, and viewing them in 3D. It also contains a version of the simulator, so it's complete IDE for full-wave EM simulation.