Showing 8 open source projects for "eda tool"

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    Paessler: Easy to Use With Enterprise Power. Free Trial

    A low-code dashboard makes monitoring intuitive for any admin, while scripting and custom sensors give experts full control.

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    Custom VMs From 1 to 96 vCPUs With 99.95% Uptime

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  • 1
    Digital Logic Design

    Digital Logic Design

    Digital Circuits Design and Simulation

    DLD V 2.0 Released Digital Logic Design is a Software tool for designing and simulating digital circuits. It provides digital parts ranging from simple gates to Arithmetic Logic Unit. You may start your circuit from simple gates and flipflops and keep on converting them into ICs. These ICs, later on, may be incorporated into other circuits to built more complex circuits like CPU. You may even use SOP expressions to generate digital circuits in IC form. You can use this software to...
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    Downloads: 32 This Week
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  • 2
    FSMDesigner
    FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.
    Downloads: 1 This Week
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  • 3

    PLLSim

    Simulation Tool for Phase-Locked Loops

    A simulation tool for Phase-Locked Loops with charge pump phase detectors. The tool simulates phase and frequency steps with continous reference and random bit stream reference for data clock recovery.
    Downloads: 0 This Week
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  • 4
    IMEP-Spice interface
    The developed graphical interface is based on the SKILL language which is a Lisp dialect used as a scripting language and PCell (Parameterized Cells) description language used in many EDA software suites by Cadence Design Systems.
    Downloads: 0 This Week
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    MongoDB Atlas runs apps anywhere

    Deploy in 115+ regions with the modern database for every enterprise.

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  • 5
    This is a tool developed by 2nd yr CSE B.Techs at IIT Guwahati.We have designed a software in C++ language which,given some design specifications of an analog amplifier generates a netlist file in the current folder which can be opened in LTSpice.
    Downloads: 0 This Week
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  • 6
    Tool-independent Makefile generator for VHDL models.
    Downloads: 0 This Week
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  • 7
    Magnetostatic finite differences simulation tool based on GNU Octave and a Perl/Tk user interface.
    Downloads: 0 This Week
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  • 8
    NecJGui is an antennas design tool, interface for Numerical Electromagnetic Code. It allows easily making NEC input files, and viewing them in 3D. It also contains a version of the simulator, so it's complete IDE for full-wave EM simulation.
    Downloads: 0 This Week
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