Search Results for "blocks"
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Showing 14 open source projects for "blocks"
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dxf2gcode
DXF2GCODE: converting 2D dxf drawings to CNC machine compatible G-Code
DXF2GCODE is a tool for converting 2D (dxf, pdf, ps) drawings to CNC machine compatible GCode. Windows, Linux, and Mac support by using python scripting language. -
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IP-XACT 2009/2014 Platform
Smart GUI/Commandline tools to create IP-XACT( 2009/2014) files
...One can create IP-XACT Component, Design or Registers by importing Ip in System Verilog/Verilog-95/VHDL, instantiate Bus Interfaces with proper port maps and attributes as needed. Smart GUI to create IP-XACT Registers, Memory Maps, Address Blocks for IP- has feature to import XLS or Verilog . It has Tcl/Python API support. ipxact2verilog - Generate Verilog module from IP-XACT definition ipxact2vhdlentity - Generate VHDL entity from IP-XACT Component definition verilog2ipxact - Generates IP-XACT definition from Verilog modules vhdl2ipxact - Generates IP-XACT definition from VHDL source ipxactcoherencycheckerverilog / ipxactcoherencycheckervhdl - Validates IP-XACT Component definition with RTL validateipxact - IP-XACT Linting tool -
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pyNETVARS
Python module for network variables for CoDeSys PLCs
CoDeSys v2.3 supports so called network variables. Blocks of (global) variables, that propagates over networks like TCP, UDP or UDP Multicast aso. This python module supports parsing, receiving and sending those blocks (with UDP Multicast only). With this you can add for example a Raspberry Pi Sensor to your automation network without special Network clients on your PLC. -
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dxf2pcb
Convert DXF drawings of circuit boards to gEDA-PCB files.
This Python script reads in a DXF (ascii) file and generates a PCB output compatible with PCB Designer, part of the gEDA suite. It is designed for two purposes: One is to generate a PCB snippet from a mechanical drawing (such as a board outline), the other is to produce element files from CAD drawings. PCB snippets are easily imported into an existing gEDA-PCB project using File -> Load Layout to Buffer. Generated element files are ready to use (except for special cases like no-paste... -
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EducationalLCS
eLCS - Educational Learning Classifier System
...This way users can start by examining the simplest version of the code and progress forward. This code is intended to be used as an educational tool, or as algorithmic code building blocks. -
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Please participate in the SURVEY on rgedit's future: https://www.surveymonkey.com/s/VNMMJMJ your answers are much appreciated! Gedit (Gnome editor, www.gedit.org) plug-in allowing it to become an easy-to-use and yet light-weight IDE for the statistical programming environment, R (www.r-project.org).
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hrefinder
Detection of homologous recombination events from SNP data
This software detects homologous recombination events (HREs) from SNP data. Based on SNP alleles calls and locations, it breaks the genomes into locally colinear blocks, and looks for cases where SNPs do not agree with the vertical pattern of inheritance in a phylogeny. It applies a dynamic programming algorithm to model whether changes within a block are likely a result of mutations, sequencing errors, or HRE. We use information from the nearby SNPs, so that if 1-2 alleles in a series of SNPs differs from the ancestral allele, it may be better explained as a mutation or sequencing error. ... -
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Open Exchange (OpEx)
The open source Algorithmic Trading System
OpEx is an application suite that includes the main building blocks of commercial electronic trading systems. All OpEx applications run on distributed system architectures. -
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Flexible Alarms Creator
Create Wincc Flexible alarms from Data Blocks of Simatic Manager
This is an application for creating alarms and PLC tags for Wincc Flexible (Siemens HMI Software) from one or several Data Blocks (DB) of the Simatic Manager. The application creates two files that can be imported in Wincc Flexible. -
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A Python environment for large and sparse linear and nonlinear optimization using intuitive interfaces to linear algebra tools and subproblem solvers written in low-level languages. It provides building blocks to experiment with new ideas and algorithms.
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Functions to convert to and from decimal to Canonical Signed Digit representation. Handles fractional numbers. Useful for multiplierless hardware blocks on ASICs, FPGAs etc.
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This project implements an algorithm for segmenting protein sequences into smaller meaningful blocks. The method is based on the pure statistical approach and it uses an analogy between proteins and natural language.
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openPC is an integrated toolkit to enable a cluster machine accessible by public over web, and dividing it into blocks consisting of several nodes which each of them is fully controlled by the owners independently.
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Labcoat: Cleanroom Apps for SuperWikia
Labcoat; the VHDL graphic emulator.
Labcoat for SuperWikia Alpha fabrication manages new or revised fabrication processes. Its 'Cleanroom' applets allow codesmiths to access the lab environment, used to create semiconductors, substrate prototypes, chipset instruction blocks and other Labcoat projects. Our extensions in future releases will include UML support for C#/C++ conforming projects, import/export architecture schematics and refactoring sub-projects.
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