Search Results for "intel cpu simulator"
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Showing 25 open source projects for "intel cpu simulator"
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Quantum++
Modern C++ quantum computing library
Quantum++ is a modern C++ general-purpose quantum computing library, composed solely of template header files. Quantum++ is written in standard C++17 and has very low external dependencies, using only the Eigen 3 linear algebra header-only template library and, if available, the OpenMP multiprocessing library. Quantum++ is not restricted to qubit systems or specific quantum information processing tasks, being capable of simulating arbitrary quantum processes. The main design factors taken in... -
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Yet Another BACnet Explorer
Graphical explorer for BACnet and Free BACnet library in C#
...Supports BACnet MS/TP, Ethernet, IPv4, IPv6, SecureConnect Basic functions for read, write, read multiple, write multiple, iam, whois, subscribeCOV, notify, WriteFile, ReadFile etc. Includes three demo server applications : a generic server, a wall mounted room controller simulator, a weather server (gets data from an Internet webservice). Includes a lot of samples C# source code. Raspberry Pi server sample code, also tested on Beaglebone & Intel Edison. Bacnet/Mstp capture tool (only Wireshark and an Rs485 adaptor are required) BACnet/SC Hub sample application. See Readme.txt for more information. ... -
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PI-Based Image Encoder / Converter
Python code able to convert / compress image to PI (3.14, π) Indexes
...ZIP also include 16 MB file with 16,7 mil numbers of PI Benchmark(Single-Thread): Hardware & Environment Apple Silicon: Apple M2 (Mac mini/MacBook) x86_64 Platform: Intel Core Ultra 5 225F (Arrow Lake, 10 Cores) OS 1: Fedora 43 (GNOME) OS 2: Windows 11 Pro (23H2/24H2) Software: Python 3.14.3 + Numba JIT (latest) Results (Lower is better) Platform / OS CPU Time (Seconds) macOS (Native) Apple M2 52.151311 s (in default setup) Fedora Linux Intel Core Ultra 5 225F 58.536457 s (in default Power Management: Balanced) Windows 11 Intel Core Ultra 5 225F 59.681427 s (important! ... -
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Python Power Electronics
Circuit simulator for power electronics
An open source circuit simulator for power electronics applications. The objective is to provide a platform that will enable an advanced user to simulate large systems with several converters without being an excessive burden on the CPU. -
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EasyModbusTCP/UDP/RTU .NET
Modbus TCP, UDP and Modbus RTU client/server library
Modbus TCP, Modbus UDP and Modbus RTU client/server library for .NET Supports Function Codes: - Read Coils (FC1) - Read Discrete Inputs (FC2) - Read Holding Registers (FC3) - Read Input Registers (FC4) - Write Single Coil (FC5) - Write Single Register (FC6) - Write Multiple Coils (FC15) - Write Multiple Registers (FC16) V5.6: Upload lates version - This will probably the last version for .NET Framework 4.0 - The next Version will be based on new .NET5 and redesigned V5.5: Bugfixes and MQTT Bridge removed V5.0: Major Bugfixes and Event Handlers changed V4.4 HF1: Bugfix excessive CPU-Load Modbus TCP Server V4.4: Bugfix Modbus RTU and MQTT V4.3: Bugfixes Modbus RTU Webview for Modbus Server Simulator and MQTT functionality for Server -
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ECEbuntu
ECEbuntu - a customized operating system designed for ECE
ECEbuntu is a customized operating system designed for electrical and computer engineering (ECE) students. ECEbuntu is targeted to universities and students as it represents an environment that contains more than 30 pre-installed software and packages all catering to undergraduate course-work in ECE. ECEbuntu supports a range of tools including programming tools, tools for circuit analysis and pcb design, mathematical and numerical analysis tools, network analysis and tools for microwave and... -
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viewpix
A Landsat 8 scene viewer
...It should work with most current Linux distributions. Viewpix runs efficiently on computers with modest CPU's such as low power mini-ITX boards. It is known to work nicely on Intel NUC, AMD A6 SOC , and NVIDIA TX2. A multiple core cpu, 8 GB ram, and a large capacity hard drive are suggested. -
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GNUSim8085 is a simulator and assembler for the Intel 8085 Microprocessor. For downloading latest release please head to the website - https://gnusim8085.github.io/ For source code - https://github.com/GNUSim8085/GNUSim8085
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Pulse capture
Extract PPG signal from video image of the face
The application was designed for the real time contactless photoplethysmography of the human face by means of an ordinary webcam in ambient light environment System requirements: - AMD or Intel CPU with 2 cores and 2.6 GHz clock speed (or higher); - 512 Mb of RAM (or higher); - OS Microsoft Windows 10/8/7/XP, booth 32 and 64 bit versions; - A RGB webcam (Logitech B910 is the best choice). -
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The software simulates the motion of the solar system by different numerical methods. On start, the software expects the input file planeten.txt in the same folder. This file should contain the desired initial conditions. The separator may be adjusted via the file settings.ini.
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Accelerated Feature Extraction Tool
A fast GPU accelerated feature extraction software for speech analysis
...The tool is a specially designed to process very large audio data sets. It uses GPU acceleration if compatible GPU available (CUDA as weel as OpenCL, NVIDIA, AMD, and Intel GPUs are supported). CPU SSE intrinsic instruction set is used in cases where no compatible GPU present. The output files are stored in HTK format. The software is developed at Department of Cybernetics at University of West Bohemia in Pilsen. -
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steam-sim
An accurate, scalable, and energy-aware simulator for WSNs
...Network behavior in terms of wireless channel models are provided by the PAWiS and the MiXiM framework. STEAM-Sim is an extension to the PAWiS and MiXiM framework. The underlying simulator is OMNeT++. Please see the corresponding documentation. I also ported the Contiki v2.6 operating system to STEAM-Sim, thus it is possible to run Contiki-based code in the simulation. -
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MICA-aligner
Next-generation sequencing short reads aligner based on Intel® MIC
Latest Code in GitHub: https://github.com/aquaskyline/MICA-aligner To better utilize MIC-enabled computers for NGS data analysis, we developed a new short-read aligner MICA that is optimized in view of MIC’s limitation and the extra parallelism inside each MIC core. Experiments on aligning 150bp paired-end reads show that MICA using one MIC board is ~4.85 times faster than the CPU-(multi-core)-based BWA-MEM and about the same speed as the GPU-based SOAP3-dp. Furthermore, MICA’s... -
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VisualCPU
Graphical out-of-order CPU simulator
Java Swing application that simulated an out-of-order CPU. Support already exists for renaming, out-of-order issue, out-of-order completion, in-order retirement, handling of branch misprediction, and integer instructions (single-cycle, multiply, divide, load, store). -
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MXLib is a C++ wrapper around the Intel® Integrated Performance Primitives (IPP) library and NVidia NPP CUDA library. You can use either IPP code (or a subset of functions that do not require IPP) on the CPU side, or use NPP/CUDA on the GPU side, or use both together. The function syntax is similar to that found in MatLab and the library is designed to make it easy to port your code from MatLab to C++.
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x86 Emulation System
x86 Emulation System with CPU, Memory and integrated debugger
This project emulates an x86 system with an Intel like CPU and memory capable of loading and execute disassembled files. The integrated debugger allows to inspect the CPU, memory and stack contents. The objective is to use this system to discovery vulnerabilities in software. The code to be loaded and executed by this system is produced by ObjDump software utility. Other objectives of the system include visualization over the complexity of the executed code. ... -
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ppc_sim_booke
e500v2 simulator
An experimental ISS for freescale's e500v2 core. It is meant to simulate only cpu and memory subsystem and is purely intended for academic/learning purposes only. -
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BP (Bilinear Pairing)
library for Bilinear Pairing
A library encapsulating bilinear pairing computation and group computation in the cyclic groups G_1, G_2, G_T. The bilinear pairing is a bilinear, non-degenerate map between G_1 and G_2 to an element in G_T. The users can build complex pairing-based software by the Pairing library without much knowledge of elliptic curves or pairing or number theory. The library is smaller than 57 Kbytes, suitable for hand held devices. The size is only 3.7% of the size of the BPC... -
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Customizable Instruction Set Simulator
Customizable simulator of virtual CPU with multitasking.
Project implementing simulator of virtual CPU with additional tools. Application written in C# 4, .Net Framework 4.0 , Visual Studio 2010 Features: - IDE- like environment with MDI interface - Customizable (plug- ins) architecture: instruction sets, directives, registers, additional MDI windows - Own assembler using Intel syntax producing binary programs - Simulation of i386- like CPU operating on multi- level cache and RAM - Simulation of debugger and memory view - Features of simple OS: scheduling, multi- tasking by context switching, memory management Currently available version considered "initial". ... -
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Pike
A wrapper tool for Cotson simulator
A wrapper for Cotson simulator, to automate the installation and simulations of multicore-multinode CPU model -
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JSim8086 is platform-independent Assembly Language Simulator of the Intel 8086 CPU. It was designed to be a learning tool (CAL) for first year Computing students who are learning Computer Systems Organisation and Assembly Programming.
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JCPUSim is a CPU (Central Processing Unit) simulator written in Java. It is intended to aid in teaching how the fetch-decode-execute cycle, CPU, registers, memory and assembly programming language work in a computer system.
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A project to develop in C a command line based assembler/simulator for 8 bit microprocessors used in bare embedded projects. Currently, the motorola 6502 and intel 8051 are supported. Support for other microprocessors may be added.
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sim85 - the 8085 simulator. Project to implement a full development enviornment for the intel 8085 processor.
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YDLX is a generic CPU instruction simulator. It is designed to make it easy to add support for new CPUs and hardware devices in an object-oriented, "plug and play" fashion.
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