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Showing 15 open source projects for "xeon"
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Intel PCM
Intel® Performance Counter Monitor (Intel® PCM)
Intel® Performance Counter Monitor (Intel® PCM) is an application programming interface (API) and a set of tools based on the API to monitor performance and energy metrics of Intel® Core™, Xeon®, Atom™ and Xeon Phi™ processors. PCM works on Linux, Windows, Mac OS X, FreeBSD, DragonFlyBSD and ChromeOS operating systems. -
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SAGECAL
GPU/MIC accelerated radio interferometric calibration program
...It can handle all source models including points, Gaussians and Shapelets. It can calibrate along hundreds of directions without running out of memory in almost real time. Intel Xeon Phi acceleration is also available. Distributed calibration using MPI and consensus optimization is enabled. Also tools to build/restore sky models are included. -
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miniperf
Perfmon PMU Collecting tool
command line based tool to collect Perfmon Counting data from Hardware PMU C ounters on Intel x86 processors Supported Platforms <> Server - Intel 5th Gen Xeon Processor (Emerald Rapids) -> Core (Raptor Cove) - Intel 4th Gen Xeon Processor (Sapphire Rapids) -> Core (Golden Cove) -> CHA <> Client - Intel 14th Gen Client Processor (Meteorlake) -> P-CORE (Redwood Cove) -> E-CORE (Crestmont) - Intel 13th Gen Client Processor (Raptorlake) -> P-CORE (Raptor Cove) -> E-CORE (Gracemont) -> ARB - Intel 12th Gen Client Processor (Alderlake) -> P-CORE (Golden Cove) -> E-CORE (Gracemont) -> ARB -
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exchange-core
Ultra-fast matching engine written in Java based on LMAX Disruptor
...Designed for high scalability and pauseless 24/7 operation under high-load conditions and providing low-latency responses. Single order book configuration is capable to process 5M operations per second on 10-years old hardware (Intel® Xeon® X5690) with moderate latency degradation. HFT optimized. Priority is a limit-order-move operation mean latency (currently ~0.5µs). Cancel operation takes ~0.7µs, placing new order ~1.0µs. Disk journaling and journal replay support, state snapshots (serialization) and restore operations, LZ4 compression. Lock-free and contention-free order matching and risk control algorithms. ... -
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Intel neon
Intel® Nervana™ reference deep learning framework
...The gpu backend is selected by default, so the above command is equivalent to if a compatible GPU resource is found on the system. The Intel Math Kernel Library takes advantages of the parallelization and vectorization capabilities of Intel Xeon and Xeon Phi systems. When hyperthreading is enabled on the system, we recommend the following KMP_AFFINITY setting to make sure parallel threads are 1:1 mapped to the available physical cores. -
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LightPCC
Parallel pairwise correlation computation on Intel Xeon Phi clusters
The first parallel and distributed library for pairwise correlation/dependence computation on Intel Xeon Phi clusters. This library is written in C++ template classes and achieves high speed by exploring the SIMD-instruction-level and thread-level parallelism within Xeon Phis as well as accelerator-level parallelism among multiple Xeon Phis. To facilitate balanced workload distribution, we have proposed a general framework for symmetric all-pairs computation by building provable bijective functions between job identifier and coordinate space for the first time. -
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SWAPHI-LS: Alignment on Xeon Phi Cluster
Smith-Waterman long DNA sequence alignment on Xeon Phi clusters
The first parallel Smith-Waterman algorithm exploiting Intel Xeon Phi clusters to accelerate the alignment of long DNA sequences. This algorithm is written in C++ (with a set of SIMD intrinsic extensions), OpenMP and MPI. The performance evaluation revealed that our algorithm achieves very stable performance, and yields a performance of up to 30.1 GCUPS on a single Xeon Phi and up to 111.4 GCUPS on four Xeon Phis sharing a host. -
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SWAPHI: Smith-Waterman on Intel Xeon Phi
The first protein sequence database search on shared-host Xeon Phis
The first parallel algorithm to accelerate the Smith-Waterman protein database search on shared-host multiple Intel Xeon Phi coprocessors. By searching against the UniProtKB/TrEMBL database, SWAPHI achieves a performance of up to 58.8 billion cell updates per second (GCUPS) on a single Xeon Phi and up to 228.4 GCUPS on four Xeon Phis. -
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Intel(R) CnC
Parallelism without the Pain
CnC makes it easy to write C++ programs which take full advantage of the available parallelism. Whether run on multicore systems, Xeon Phi™ or clusters CnC will seamlessly exploit the performance potential of your hardware. Through its portabilty and composability (with itself and other tools) it provides future-proof scalability. Intel© Concurrent Collections for C++ is a C++ template library for letting C++ programmers implement CnC applications which run in parallel on shared and distributed memory. -
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mpss-vt
mpss port to linux-3.2.14
Xeon Phi mpss porting to linux-3.2.14. It includes linux kernel 3.2.14 for Xeon Phi (not for Xeon!) and modules (for Xeon and Xeon Phi). -
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This is public download page for our Xenon&Oatmeal. The media here is under the Lesser GPL v2 License.
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XLB is a high performance HTTP load balancer. connection management, caching, ssl, scripting. 300 mbit/sec / 4000 reqs/sec takes 30% cpu on a 2GhZ Xeon. connection pooling to backend servers reduces memory and cpu usage on backends.
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The phpBB Xeon is a phpBB fully modded, where some modifications are installed in the phpBB and redistributed
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This program parallelizes the BZIP2 compression process to achieve a near-linear performance increase on SMP machines. On a two-processor Xeon machine, the speedup is around 180%. The tool's main purpose is to aid performing heavy-duty server backup
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