Search Results for "eda" - Page 2
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Showing 545 open source projects for "eda"
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QuForge-Industrial-Studio
Professional 10-qubit Quantum EDA platform for hardware-aware circuit
QuForge Industrial Studio is a comprehensive Quantum Electronic Design Automation (EDA) suite designed to bridge the gap between theoretical quantum algorithms and physical hardware constraints. While most simulators focus on pure mathematical states, QuForge introduces Hardware-Aware Design, allowing users to simulate their logic on a virtual 10-qubit processor ring.The tool provides a high-fidelity environment where users can account for real-world physical limitations such as $T_1$ relaxation times, $T_2$ dephasing, and Electromagnetic Interference (EMI). ... -
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PEDA is electronic design automation software for schematic and PCB design with unique tools selection stack for manual routing and unified PCB and schematic database developed in Qt5 library.
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LM317 Calculator
Calculates LM317 Linear Regulator for Debian/Linux
Calculates LM317 Linear Regulator for Debian/Linux My other programs: https://sourceforge.net/u/shampuan/profile My Github: https://github.com/shampuan There's something even better here: https://sourceforge.net/projects/qtronics-toolset/ -
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jCLS
The Component Library Sorcerer
WARNING: This project is under hard development and not intended for productive use yet but only for discussion. jCLS helps to create and maintain fine detailed component libraries for EDA tools like Altium Designer. It provides tools for data generation for masses of single parts from only the most necessary informations. Having good maintained and rich described and voluptuous detailed component libraries needs normally masses of time, work and discipline. jCLS comes here to save you from the molesting parts of this job. ... -
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VTracer is a Verilog Testbench developer aid. Contains well documented Verilog-Perl co-simulation environment (TCP sockets based), structural Verilog parser, demo Testbenches.
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StockLab
Electronic Component Inventory for Linux and Windows Systems
This program is a lightweight inventory software that allows you to track the number of components in small electronics labs and create order lists for missing or unavailable parts. It is written in Python and runs on PyQt6. Knowing your inventory status before starting a project helps prevent unpleasant surprises. Github: https://github.com/shampuan/StockLab -
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EDAUtils Converters
Free converters across IP-XACT Verilog VHDL Liberty SystemC
verilog2vhdl : Tool to convert Verilog into VHDL by keeping the same structure and function for ease of correlation. vhdl2verilog : Tool to convert VHDL into Verilog by keeping the same structure and function for ease of correlation verilog2ipxact :Tool to create IP-XACT Component or Design from a Verilog Module. ipxact2verilog : Tool to convert IP-XACT into Verilog module ipxactinterface2svinterface : Converts IP-XACT Bus Definition / BusInterface into System Verilog... -
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Digital Logic Design
Digital Circuits Design and Simulation
DLD V 2.0 Released Digital Logic Design is a Software tool for designing and simulating digital circuits. It provides digital parts ranging from simple gates to Arithmetic Logic Unit. You may start your circuit from simple gates and flipflops and keep on converting them into ICs. These ICs, later on, may be incorporated into other circuits to built more complex circuits like CPU. You may even use SOP expressions to generate digital circuits in IC form. You can use this software to... -
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CircuiTikZ Generator
This software is a tool for designing electronic circuits using LaTeX.
This software is a tool for designing electronic circuits using LaTeX. With an intuitive graphical interface, you can create complex circuits quickly and easily, while the LaTeX code generator translates your designs into code compatible with the LaTeX circuitikz library. -
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System Verilog Parser IEEE 1800 LRM
IEEE LRM compliant System Verilog Parser in Java with Python, Tcl API
This parser has been developed to help users to implement their Verilog tool/utility on the top this library. It reads RTL and populates its internal data structures. There are APIs to extract the design information from the database, there are APIs to elaborate every element of the design along with basic expression evaluation capabilities. It has been bundled as an executable JAR file along with a sample application which reads a RTL file(s), elaborates and dumps it back to show the... -
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IP-XACT 2009/2014 Platform
Smart GUI/Commandline tools to create IP-XACT( 2009/2014) files
Smart GUI to create or update IP-XACT often needed for the IP packaging. It has capability create Bus Definitions from scratch to populate BusDef library. One can create IP-XACT Component, Design or Registers by importing Ip in System Verilog/Verilog-95/VHDL, instantiate Bus Interfaces with proper port maps and attributes as needed. Smart GUI to create IP-XACT Registers, Memory Maps, Address Blocks for IP- has feature to import XLS or Verilog . It has Tcl/Python API... -
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1. flattenverilog : Flattens the specified verilog module by removing the hierarchies. It works both for RTL and netlist. 2. preprocessverilog : Verilog Preprocessor to resolve macros like nested `ifdef , `define 3. createhierarchy : Verilog Hierarchy Creation Tool to group a list of instances in RTL or enlist. This creates a new wrapper by encapsulating the instance 4. flatteninstances : Flattens the given list of hierarchical instances- this removes hierarchy by pulling the...
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Free VHDL Parser with Java, Python and T
IEEE VHDL-93 LRM supported parser implemented in Java, APIs Python/Tcl
This parser has been developed for those who wants to develop his/her own tool around VHDL RTL. Only synthesizable subset of VHDL is supported and it may not work for machine/tool generated VHDL files. This parser has been developed in Java in order to make it platform independent. It reads RTL and populates its internal object model. There are APIs to extract the design information from the database, APIs to elaborate the design along with expression evaluation capabilities. This tool has... -
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QResistorCalculator
This is a reistor color calculator for debian/linux systems.
For now, I've only created a resistor color code calculator. But more will follow, and all modules will be integrated into a single platform. My Github: https://github.com/shampuan/QTronics-Toolset All my apps: https://sourceforge.net/u/shampuan/profile There's something even better here: https://sourceforge.net/projects/qtronics-toolset/ -
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LaSolv
Solves symbolic electrical AC circuit equations
In electrical engineering, AC circuits are often used in the design process. However, deriving the gain, input impedance or what have you is tedious and error prone. LaSolv takes a SPICE like description of your circuit and solves for whatever parameter you specify- voltage gain, trans-impedance, input impedance, etc. -
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QTronics ToolSet
Includes tools for performing electronic calculations.
This program contains many tools for you to perform detailed electronic calculations. Ohms, Kirchhoff, Parralel Res., Voltage Divider, Wheatstone, Reistor Color, Zener diode, LED resistor, capacitor, inductor, transformer, capacitive reactance, Transformerless adaptor, R-C Time calculator, Flip-Flop, NE555 calculator, TL431 calculator, 78XX, LM317, Current Limiter, Transistor Regulator, Current Mirror, Battery charge calculations, transistor calculator, mosfet, pass filters, opamp,... -
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A portable loudspeaker design system supporting measurement, modeling, simulation and optimization of boxes, filters and systems.
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wxArt2D gives wxWindows applications sophisticated vector drawing functionality. It is based on a framework supporting multiple views within a hierarchical document. Supports drawing & (Graph) editing. In-output in SVG, GDSII, XML, easy to extend.
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Baya - SoC Integration Platform
Best in class SoC Integration Platform, IP-XACT, Verilog VHDL, UPF
1. Comes with 200+ high level Tcl commands around SoC platform assembly 2. Easy to start - use the verilog2baya tool to convert existing SoC/SS into Baya 3. Adhoc and Interface based connections 4. Autoconnections 5. Rule based connections between component ports 6. A variety of SoC integration Methodologies 6.a. XLS/CSV Based connections 6.b. Port-to-Port Adhoc connections 6.c. IP-XACT and System Verilog Interface based connections 6.d. ... 7. Maintains a connectivity... -
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IEC 60870-5 104 Protocol download
IEC 104 RTU Server Client Simulator Source Code Library Win Linux
v21.06.018 Complete implementation of iec 104 protocol standard including File transfer. Make your RTU, protocol converter, Gateway, HMI, Data concentrator compatible with iec 104. *Industry Proved * Worldwide Customers Download Evaluation Kit - IEC 104 Development Bundle In the Development Bundle, We included IEC 104 Server & Client Simulator, Windows & Linux... -
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Proximus for Ryzen AI
Runtime extension of Proximus enabling Deployment on AMD Ryzen™ AI
This project extends the Proximus development environment to support deployment of AI workloads on next-generation AMD Ryzen™ AI processors, such as the Ryzen™ AI 7 PRO 7840U featured in the Lenovo ThinkPad T14s Gen 4 ,one of the first true AI PCs with an onboard Neural Processing Unit (NPU) capable of 16 TOPS (trillion operations per second). Originally designed for use with Windows 11 Pro, this runtime was further enhanced to work under Linux environments, allowing developers and... -
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JQM Java Quine McCluskey
JQM - Java Quine McCluskey for minimization of Boolean functions.
Java Quine McCluskey (JQM) implements the Quine-McCluskey algorithm with Petrick’s Method for minimizing Boolean functions. Designed for both education and industrial application, it handles up to 16 variables and functions. Uniquely, JQM bridges the gap between theory and practice: it visualizes the solution process with generated Karnaugh Maps for students, while supporting PLC engineers by exporting results to Structured Text (ST) and Ladder Diagram (LD). The software includes a GUI for... -
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TimingEditor
TimingEditor is a tool to graphically draw and edit timing diagrams.
TimingEditor is a tool to graphically draw and edit timing diagrams. -
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dashAI
dashAI: an interactive platform for training, evaluating and deploying
dashAI is an open-source, No-code workbench for Exploratory Data Analysis and classical ML. Visual data preparation, multi-model experiments, XAI explainability, and a plugin-based extensible catalog. The platform guides users through a complete, traceable workflow — data ingestion → visual exploration → preprocessing → model training → evaluation → explainability — without writing a single line of code. Each step is explicit and reversible, keeping the user in control rather than...
