Search Results for "qgis-osgeo4w-2.6.1-1-setup"

Platform for advanced open source IP-Core development, i. e. dynamic memory controllers for FPGAs.

Sharp MZ800 univerzalni karta periferii 1 ----------------------------------------- Contains peripherals: emulator of FDC WD279x, RTC, single channel SIO, repository manager, LAN10Mbit Chips on the card: STM32F101, XC9356, ENC28J60, FT232RL, MAX3232

This project provide a reconfigurable asynchronous SDM router which can be configured into a basic wormhole router or an SDM router with multiple virtual circuits in every direction. Features: * 5-port router for mesh network (0 south, 1 west, 2 north, 3 east, 4 local) * The dimension order routing (XY routing) * Available flow control methods: wormhole, SDM, VC * Reconfigurable number of virtual circuits, buffer size, data width * Fully synthesizable router implementation * SystemC...

Devellopement d'un controlleur d'affichage (VIC) du commodore 64 embarqué dans un FPGA avec controlleur d'animation integré.

This project aims at creating an open-source SoC that will support the Google TV platform.

Attempt to implement DEC PDP-11 minicomputer in Xilinx FPGA

The HDL Complexity Tool parses large complex hardware projects' source code to produce useful complexity results. GOALS: 1)Practical, effective and simple 2) Integrates with existing design flows 3) Used on real projects 4) Based on existing research

CRC Generator is a command-line application that generates Verilog or VHDL code for CRC of any data width between 1 and 1024 and polynomial width between 1 and 1024. The code is written in C for Win32, bus easily portable for other platforms

the goal of this project is to build a stack for Lonworks Protocol and device working on this protocol

The OS561 operating system based around FORTH/Java. The OS is to run on a VHDL chip OpenHardware design called the Minon, but could become available for other platforms. The unique point of the design is a revolutionary data compression technology.

Picode is the ultimate VHDL picode 16 to 32 bits controller. It is described in only one entity and is implementable in standard FPGAs. It has it own compiler. Picode is designed to take only one or two clock cycle duration per instruction.

Inane's not a NES emulator. It is a reimplementation of the original NES hardware in VHDL with the goal of making it fully synthesize in hardware.

A hardware project to interface a microcontroller (currently PIC family) to a LED driver consisting of a CPLD to drive an LED array with 35 LEDs... The source codes (c/vhdl) and schematics are going to be freely available

This project contains the material discussed in my PhD dissertation, entitled "Hardware/Software Design of Dynamic Real-Time Schedulers for Embedded Multiprocessor Systems." The source code is available in the SVN repository: https://sourceforge.net/p/xrt/code/6/tree/trunk/ and consists in two folders: 1) /X-RT : A portable multiprocessor scheduling framework supporting scheduling periodic real-time tasks according to the G-EDF (Global Earliest Deadline First) scheduling platform...