Search Results for "parrot-security-4"

SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing

This project is about a light controlling system with a 4 RGB-LED channels to run different modes: • autonomously w/o PC performing HSI2RGB transformations and running through the color hues (with dimmable brightness) • remote operated by PC or embedded user software using the provided C++ Software library (based on Boost libraries) • ideal platform for color experiments with your RaspberryPi The system consists of 4 layers: • PCB with Atmel ATmega16 and FT232RL USB interface (Eagle forat) • Firmware for applying PWM, UART communication and integrated colorspace transformations (AVR-ASM) • C++-Software for providing a HTTP-Server, a Dreambox picture grabber and basic light sequence player • HTML5/JavaScript application for remote controlling and configuring the system via Webbrowser Please use the SVN browser for accessing the whole development snapshot and getting an current tarball!

...id=5555 2) 100% charge shown as 99%, because there is two digit positions. 3) Status icon updates every 30 seconds. There is no way to change this interval other than re-compile source code. 4) Tested on Windows XP SP3. Works perfectly. If you have any troubles using this software, please contact me via e-mail immediately.