Search Results for "zebra design 3"

VTracer is a Verilog Testbench developer aid. Contains well documented Verilog-Perl co-simulation environment (TCP sockets based), structural Verilog parser, demo Testbenches.

A 3-channel fully automated Dew Controller (DIY project) based on Arduino Nano for telescopes. For $48 or less. (c) Copyright Robert Brown 2014-2025. All Rights Reserved. Permission is granted for personal and Academic use only. Code or portions of code may not be copied or used without appropriate credit given to author. A very popular project with over 48,000 downloads. There is a new ESP32 WiFi version at https://sourceforge.net/projects/esp32-dew-controller/ The older...

A cryptoprocessor is a processor that does not do or use any encryption or decryption (thus escapes US export controls), but which works natively on encrypted data and code. Almost any encryption is possible, including "none at all". The trick is that a computer famously and happily takes garbage in and puts garbage out, just as happily as it does "2+2=4", so all we have to do is change our OWN idea of what is garbage and what is sense and the computer will remain happy but we then have a...

The “lpACLib” library contains the VHDL description of accurate and approximate versions of several arithmetic modules (like adders and multiplier of different bit-widths) and accelerators. Moreover, it also provides the corresponding software behavioral models/implementations developed in C and MATLAB to enable quality characterization. Besides our novel designs, it also contains implementations for several state-of-the-art arithmetic modules and their approximate versions. This open-source...

JNode is a Java New Operating system Design Effort. JNode is a simple to use and install Java operating system for personal use on modern devices. Any java application runs on it, fast and safe. See our homepage for additional information.

We provide MATLAB and Verilog Models of GeAr, and previously proposed adders (ACA-I, ETAII, ACA-II and GDA) at http://sourceforge.net/projects/approxadderlib/ GeAr is a low latency Generic Accuracy Configurable Adder that provides a higher number of potential configurations compared to state-of-the-art approximate adders, thus enabling a high degree of flexibility and trade-off between performance and output quality. These MATALB and Verilog models can allow software programmer as well as...

This program is a cross-platform replacement for the widely known in close circles Parameter Design tool (also known as Keywin e-Bike Lab), used to set the parameters of a e-bike controller based on the Infineon XC846 microcontroller (and various clones).

This project provide a reconfigurable asynchronous SDM router which can be configured into a basic wormhole router or an SDM router with multiple virtual circuits in every direction. Features: * 5-port router for mesh network (0 south, 1 west, 2 north, 3 east, 4 local) * The dimension order routing (XY routing) * Available flow control methods: wormhole, SDM, VC * Reconfigurable number of virtual circuits, buffer size, data width * Fully synthesizable router implementation * SystemC testbench provided Languages: * Routers are written in synthesizable SystemVerilog * Test benches are provided by SystemC Software requirements: * The open source Nangate 45nm cell library * Synopsys Design Compiler (Synthesis) * Cadence IUS -- NC Simulator (for SystemC/Verilog co-simulation)

Java library that interfaces with "The USB INSTEON PowerLinc Controller" built by Smartlabs Design. This library is built on top of the javax.usb linux reference implementation, but should work under Windows as well.

The HDL Complexity Tool parses large complex hardware projects' source code to produce useful complexity results. GOALS: 1)Practical, effective and simple 2) Integrates with existing design flows 3) Used on real projects 4) Based on existing research

OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver source code.

The purpose of the Programmable Chip EEG BCI project is to create a EEG that is modernized with some of the latest hardware. The Design uses lower amplification and higher bit analog to digital converters to remove the need for filtering and amplifying.

unPIC is a Perl script that disassembles Microchip microcontroller's HEX files. This is a powerful tool for all reverse engeneers that creates a well understandable assembly source from a binary file. Creates xrefs, labels, subroutines and much more...

The MP4Free project provides a simulation, analysis and exploration platform for multi-processor system-on-chip applications at variable level of abstraction, providing also a comprehensive component library.

Power acpid is an acpi (Advanced Configuration and Power Interface) daemon designed to be more functional and improve on the design of the current acpid. Power acpid is very loosely based on work from acpid.sourceforge.net.

A modular mouse driver. Meant for Linux, but may be ported. It\'s modular design allows new mice and new functionality to be added easily.

CONECT is a software to design, setup, commission and test home and building-automation systems. It will support various bus systems such as EIB.

The goal of this project is to build a centralized domotic system. This project contents three parts: - An electronic part; - An embedded software part (PIC Microship controller); - A PC software part (Dotnet/Mono)