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Showing 5 open source projects for "good"
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Context for your AI agentsBuild data pipelines that feed your AI models and agents without managing infrastructure. Crawl any website, transform content, and push directly to your preferred vector store. Use 10,000+ tools for RAG applications, AI assistants, and real-time knowledge bases. Monitor site changes, trigger workflows on new data, and keep your AIs fed with fresh, structured information. Cloud-native, API-first, and free to start until you need to scale.
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Arduino Nano Dew Controller Pro (DIY)
Dew Controller Feature Rich
A 3-channel fully automated Dew Controller (DIY project) based on Arduino Nano for telescopes. For $48 or less. (c) Copyright Robert Brown 2014-2025. All Rights Reserved. Permission is granted for personal and Academic use only. Code or portions of code may not be copied or used without appropriate credit given to author. A very popular project with over 48,000 downloads. There is a new ESP32 WiFi version at https://sourceforge.net/projects/esp32-dew-controller/ The older... -
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DRT
Dataflow Run Time
...The Dataflow Run Time (DRT) provides the runtime support for that The first benefit of this software is to allow a rapid development of such programs in the context of the TERAFLUX project http://teraflux.eu The runtime API has been designed in such way to allow for a future development of a good compiler that targets such interface on one side, and to allow for a good architectural support of such API too: ideally each function could map to a Thread-Level-Parallelism Instruction Set Extension (TLP ISE). -
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prll
A utility for parallelizing the execution of shell functions.
PRLL HAS MOVED TO GITHUB https://github.com/exzombie/prll A utility for parallelizing the execution of shell functions. Focuses on convenience in interactive use, but is just as usable in shell scripts. Put your multicore to good use, or combine prll with ssh to create an instant cluster. -
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SmGen
Verilog Finite State Machine (FSM) Code Generator
...The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing -
Grafana: The open and composable observability platformGrafana is the open source analytics & monitoring solution for every database.
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Simple GTK2 application allowing users to manually toggle devices attached to a parallel port device on or off (through the D0->D8 data lines), or run an automatic sequence based on a simple language contained in this program. Good for driving relays, etc
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