Showing 5 open source projects for ".net code generator"

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    Open Source Cartridge Reader

    Open Source Cartridge Reader

    A shield for the Arduino Mega that can back up video game cartridges

    ...Supported cartridge types so far, LoRom, HiRom, ExHiRom, DSP, SuperFX, SuperFX2, SDD1, CX4, SPC7110, SA1 (last two chips need Adafruit Clock Generator). Reads and writes SNES Satellaview 8M Memory packs (BS-X cartridge and Adafruit Clock Generator needed). Reads and writes Nintendo Power Super Famicom Memory Flash Cartridges (needs Adafruit Clock Generator for best result).
    Downloads: 6 This Week
    Last Update:
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  • 2

    COBOL copybook to XML converter

    Converts cobol copybooks to Xml/Java objects

    CB2XML (CopyBook to XML) is a COBOL CopyBook to XML converter written in Java and based on the SableCC parser generator. This project includes utilities to convert an XML instance file into its COBOL copybook equivalent string buffer and vice versa. Source is now available in GitHub: https://github.com/bmTas/cb2xml
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    Downloads: 11 This Week
    Last Update:
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  • 3
    DarkLight Cover/Calibrator

    DarkLight Cover/Calibrator

    DIY project to build a cover, flat panel or combo flip-flat panel

    The DarkLight Cover/Calibrator (DLC) is a DIY project to build a motorized telescope cover, flat panel, or a combination flip-flat system. Its modular design supports various setups: a 12V light panel without a servo for a wall-mounted calibration panel, a servo-only cover for sky flats, or both integrated into a flip-flat mechanism. The DLC also includes optional dew heating to reduce extra equipment and cabling. With available drivers, it works with ASCOM or INDI. We’re excited to...
    Downloads: 9 This Week
    Last Update:
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  • 4

    SmGen

    Verilog Finite State Machine (FSM) Code Generator

    SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing
    Downloads: 0 This Week
    Last Update:
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  • 5
    Help port the tulip driver from free/net/openbsd to Darwin OS. So far the driver is written to the ADMtek 985 clone chipset and the PNIC 82c169 chipset. Due to IOKit's object-oriented design, the code can be easily subclassed to support new chipsets.
    Downloads: 1 This Week
    Last Update:
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