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cMIPS - an FPGA ready VHDL model for 5-stage pipeline, MIPS32r2 core
This project was moved to https://gitlab.c3sl.ufpr.br/roberto/cmips
The code here is no longer up to date.
The VHDL model mimics the pipeline design described in Patterson & Hennessy's book (Computer Organisation and Design) and is an almost complete implementation of the MIPS32r2 instruction set. The TLB and assorted control registers will be included soon (as of fev 2015). The model was synthesized for an Altera EP4CE30F23. The model uses up 15% of combinational blocks and 5%...
ztex is a Firmware Kit with a corresponding Driver API for EZ-USB based hardware. The Firmware is written in C and assembled using a powerful macro processor. The Driver API allows the development of platform-independent device drivers.
Framework for Adaptive Hardware Concurrent Systems with DPR-FPGAs
This project introduces new FPGA architectural tools and Linux OS modifications that aid in supporting Dynamic Partial Reconfiguration (DPR) on FPGAs for concurrent control. It shows that control systems benefit from hardware concurrency, meaning that by moving the control intelligence into hardware, the negative effects inherent to threads and their scheduler are minimized.
...System is based on a super-loop architecture with check and skip (no-wait) flag event driver system.
Supports:
UART, SysTick Timer, ADC, SPI, EEPROM, PWM.
Also supports: Xilinx FPGA configuration, FPGA SSI interface, smart card reader etc.
Tested partially (different modules in each case) on ATMega163/16/32/323/8.
Awards
CodeProject 2010, Third Prize, Hardware and Device Programming
Check the Wiki Page for more details.
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Este proyecto presenta GraphUIS, una implementación de un periférico de video en un FPGA como un diseño modular caracterizado por no tener memoria dedicada. Se desarrolló como un proyecto académico en la Universidad Industrial de Santander.
Software system for FlowScreen Router, with SempGate FPGA firmware and Intel EP80579 based board, it implements a high performance (1.5M pps network traffic) router system with open architecture for 3-rd party network application development.
Software which runs on a gunstix overo, to contron stepper motors, and servos in such a way that they play the piano. The actual stepper motor and servo driver are done on an FPGA board from knjn.com (pluto-3).