A powerful, innovative and intuitive EDA suite for everyone
IEEE VHDL-93 LRM supported parser implemented in Java, APIs Python/Tcl
Free Liberty, UPF, SDC and VCD Parsers with Python, Java and Tcl APIs
Digital Circuits Design and Simulation
Integrated Development Environment (IDE) for learning HDL
Free converters across IP-XACT Verilog VHDL Liberty SystemC
Exploiting Mox Software "Bipolar Transistors" database
RxCalc is a calculator for the analysis of multi-stage receiver.
FFT co-processor in Verilog based on the KISS FFT
A graphical Finite State Machine (FSM) designer.
dark themed version of free Audacity sound editor