• Train ML Models With SQL You Already Know Icon
    Train ML Models With SQL You Already Know

    BigQuery automates data prep, analysis, and predictions with built-in AI assistance.

    Build and deploy ML models using familiar SQL. Automate data prep with built-in Gemini. Query 1 TB and store 10 GB free monthly.
    Try Free
  • Go from Code to Production URL in Seconds Icon
    Go from Code to Production URL in Seconds

    Cloud Run deploys apps in any language instantly. Scales to zero. Pay only when code runs.

    Skip the Kubernetes configs. Cloud Run handles HTTPS, scaling, and infrastructure automatically. Two million requests free per month.
    Try it free
  • 1

    SimFPGA

    VHDL Verification and Simulation Tool

    SimFPGA is a graphical user interface (GUI) tool designed to facilitate the simulation of VHDL projects. It enables users to select VHDL source files and testbenches, configure library and standard settings, and run simulations using GHDL. Additionally, it allows visualization of waveforms through GTKWave. SimFPGA elaborates the project files using GHDL and builds the VHDL project before simulating it. This ensures code verification without the need for additional compilation tools. If...
    Downloads: 10 This Week
    Last Update:
    See Project
  • 2
    PyAMS

    PyAMS

    PyAMS (Python for Analog and Mixed Signals) CAD approach

    PyAMS (Python for Analog and Mixed Signals) is used to simplify modeling analog elements and simulate electronic circuit The objectives of PyAMS is: - Drawing circuit by schematic (CAD approach); - Simulating the circuit; - Creating new symbols for models; - Creating new models of electrical elements by using Python language with pyams_lib; - Presenting simulation results in waveform or in probe; - PyAMS is developed with Python 3+, ElectronJS and NodeJs - Licensed under:...
    Downloads: 4 This Week
    Last Update:
    See Project
  • 3
    IP-XACT 2009/2014  Platform

    IP-XACT 2009/2014 Platform

    Smart GUI/Commandline tools to create IP-XACT( 2009/2014) files

    Smart GUI to create or update IP-XACT often needed for the IP packaging. It has capability create Bus Definitions from scratch to populate BusDef library. One can create IP-XACT Component, Design or Registers by importing Ip in System Verilog/Verilog-95/VHDL, instantiate Bus Interfaces with proper port maps and attributes as needed. Smart GUI to create IP-XACT Registers, Memory Maps, Address Blocks for IP- has feature to import XLS or Verilog . It has Tcl/Python API...
    Downloads: 4 This Week
    Last Update:
    See Project
  • 4

    LaSolv

    Solves symbolic electrical AC circuit equations

    In electrical engineering, AC circuits are often used in the design process. However, deriving the gain, input impedance or what have you is tedious and error prone. LaSolv takes a SPICE like description of your circuit and solves for whatever parameter you specify- voltage gain, trans-impedance, input impedance, etc.
    Downloads: 3 This Week
    Last Update:
    See Project
  • Fully Managed MySQL, PostgreSQL, and SQL Server Icon
    Fully Managed MySQL, PostgreSQL, and SQL Server

    Automatic backups, patching, replication, and failover. Focus on your app, not your database.

    Cloud SQL handles your database ops end to end, so you can focus on your app.
    Try Free
  • 5
    CircuiTikZ Generator

    CircuiTikZ Generator

    This software is a tool for designing electronic circuits using LaTeX.

    This software is a tool for designing electronic circuits using LaTeX. With an intuitive graphical interface, you can create complex circuits quickly and easily, while the LaTeX code generator translates your designs into code compatible with the LaTeX circuitikz library.
    Downloads: 2 This Week
    Last Update:
    See Project
  • 6
    eavref

    eavref

    A tool for low-power CMOS voltage reference designs

    EAVREF is a computer-aided tool for robustly designing ultra-low-power CMOS voltage references. The tool is compatible with the powerful Ngspice simulator, enabling open-source microelectronics design flow with SkyWater 130nm Technology.
    Downloads: 4 This Week
    Last Update:
    See Project
  • 7
    Baya - SoC Integration Platform

    Baya - SoC Integration Platform

    Best in class SoC Integration Platform, IP-XACT, Verilog VHDL, UPF

    1. Comes with 200+ high level Tcl commands around SoC platform assembly 2. Easy to start - use the verilog2baya tool to convert existing SoC/SS into Baya 3. Adhoc and Interface based connections 4. Autoconnections 5. Rule based connections between component ports 6. A variety of SoC integration Methodologies 6.a. XLS/CSV Based connections 6.b. Port-to-Port Adhoc connections 6.c. IP-XACT and System Verilog Interface based connections 6.d. ... 7. Maintains a connectivity...
    Downloads: 0 This Week
    Last Update:
    See Project
  • 8
    FreeCAD-PCB

    FreeCAD-PCB

    Import your PCB boards to FreeCAD

    [ENG] Mod FreeCAD-PCB allow you to import PCB boards to FreeCAD. Scope of mod: - support for many different layers, - possible to choose colours, transparency and names for each layer, - mod allows you to import IGES models with colours, - possible to show holes/vias independent. [PL] Moduł FreeCAD-PCB pozwala na importowanie płytek PCB do programu FreeCAD. Możliwości modułu: - wsparcie dla wielu różnych warstw, - wyświetlanie otworów, przelotek niezależnie od siebie, -...
    Leader badge
    Downloads: 5 This Week
    Last Update:
    See Project
  • 9

    pyGerber2Gcode

    Python Gerber to G-code converter

    pyGerber2Gcode is a Pyhon based simple Gerber to G-code converter.
    Downloads: 5 This Week
    Last Update:
    See Project
  • Full-stack observability with actually useful AI | Grafana Cloud Icon
    Full-stack observability with actually useful AI | Grafana Cloud

    Our generous forever free tier includes the full platform, including the AI Assistant, for 3 users with 10k metrics, 50GB logs, and 50GB traces.

    Built on open standards like Prometheus and OpenTelemetry, Grafana Cloud includes Kubernetes Monitoring, Application Observability, Incident Response, plus the AI-powered Grafana Assistant. Get started with our generous free tier today.
    Create free account
  • 10

    dxf2pcb

    Convert DXF drawings of circuit boards to gEDA-PCB files.

    This Python script reads in a DXF (ascii) file and generates a PCB output compatible with PCB Designer, part of the gEDA suite. It is designed for two purposes: One is to generate a PCB snippet from a mechanical drawing (such as a board outline), the other is to produce element files from CAD drawings. PCB snippets are easily imported into an existing gEDA-PCB project using File -> Load Layout to Buffer. Generated element files are ready to use (except for special cases like no-paste...
    Downloads: 0 This Week
    Last Update:
    See Project
  • 11
    MyHDL is a Python package for using Python as a hardware description and verification language.
    Downloads: 1 This Week
    Last Update:
    See Project
  • 12
    This (Python) tool allows you to easily create FPGA bitfiles for your embedded system, from several Open Source IPs (compatibles with the OpenCores Wishbone bus) . It will also generates the corresponding drivers (currently only Linux ones).
    Downloads: 0 This Week
    Last Update:
    See Project
  • 13
    Python Champollion Electronic utilities
    Downloads: 0 This Week
    Last Update:
    See Project
  • 14
    An active filter design assistant. Electrical engineers can use it to design and simulate analog active filters.
    Downloads: 2 This Week
    Last Update:
    See Project
  • 15
    sigrok
    The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source signal analysis software suite that supports various device types, such as logic analyzers, MSOs, oscilloscopes, multimeters, LCR meters, sound level meters, thermometers, anemometers, light meters, dataloggers, function generators, power supplies, GPIB interfaces, and more.
    Downloads: 3 This Week
    Last Update:
    See Project
  • 16
    RS485 C#/Python library

    RS485 C#/Python library

    RS485 library for C# and Python

    This library consists in a shared library that can be compiled on Linux and Windows. Plus, it has a C# wrapper for Windows and Python Wrapper for Linux.
    Downloads: 2 This Week
    Last Update:
    See Project
  • 17
    This project has moved to http://sourceforge.net/projects/ngspice-ext.
    Downloads: 0 This Week
    Last Update:
    See Project
  • 18
    pyLego
    Differential-algebraic simulator in python. Process and control systems are modelled w/ bloc diagrams. It allows algebraic loops, has an automatic steady-state computation, detects singular systems, and uses variable time-step transient integration.
    Downloads: 0 This Week
    Last Update:
    See Project
  • 19
    Modelio-Open is a project hosting a set of open source extensions (SoaML, SysML and UML Testing Profile) for a previous version (1.2) of the Modelio Free tool . Currently, the lastest version (2.x) of Modelio modeling and generation tool is available at http://modelio.org/downloads/download-modelio.html. All extensions are downloadable at http://forge.modelio.org/projects.
    Downloads: 1 This Week
    Last Update:
    See Project
  • 20
    A Step Closer to a Fully Gui ATLAS .log Converter A Gui .in Editor to be Used by ATLAS .log awk converter
    Downloads: 0 This Week
    Last Update:
    See Project
  • 21
    naga EDA devotes to provide useful electronic design tools in C++ and, especially, Python. The current release contains naga.Verilog, a Verilog parser. Please visit project homepage http://naga-eda.org for more information
    Leader badge
    Downloads: 7 This Week
    Last Update:
    See Project
  • 22
    Gaphor is a UML modeling environment written in Python. Gaphor is small and very extensible. The repository is located at http://github.com/gaphor/gaphor.
    Downloads: 0 This Week
    Last Update:
    See Project
  • 23
    SPChart is free software to plot S-paramters from touchstone format(SNP)
    Downloads: 0 This Week
    Last Update:
    See Project
  • 24
    a transmission line impedance calculator
    Downloads: 0 This Week
    Last Update:
    See Project
  • 25
    Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.
    Downloads: 1 This Week
    Last Update:
    See Project
  • Previous
  • You're on page 1
  • 2
  • Next
MongoDB Logo MongoDB