Showing 6 open source projects for "using class net.sourceforge.jtds.jdbc.driver"

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  • 1

    SimFPGA

    VHDL Verification and Simulation Tool

    SimFPGA is a graphical user interface (GUI) tool designed to facilitate the simulation of VHDL projects. It enables users to select VHDL source files and testbenches, configure library and standard settings, and run simulations using GHDL. Additionally, it allows visualization of waveforms through GTKWave. SimFPGA elaborates the project files using GHDL and builds the VHDL project before simulating it. This ensures code verification without the need for additional compilation tools...
    Downloads: 0 This Week
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  • 2

    dxf2pcb

    Convert DXF drawings of circuit boards to gEDA-PCB files.

    This Python script reads in a DXF (ascii) file and generates a PCB output compatible with PCB Designer, part of the gEDA suite. It is designed for two purposes: One is to generate a PCB snippet from a mechanical drawing (such as a board outline), the other is to produce element files from CAD drawings. PCB snippets are easily imported into an existing gEDA-PCB project using File -> Load Layout to Buffer. Generated element files are ready to use (except for special cases like no-paste flags...
    Downloads: 3 This Week
    Last Update:
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  • 3
    O.N.O.S

    O.N.O.S

    Open Network Object System

    Open Network Object System A Internet of things Content management system. Would you like to automate and controll remotely your home appliances from internet or lan using your phone /pc ? This program is for you! Internet of things made easy for everyone. Open source , simple to use , no need to know any programming language , you can add your programs easy , it runs bash command!every linux system will run it , portable . No installation required! just copy the folder where you...
    Downloads: 0 This Week
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  • 4
    MyHDL is a Python package for using Python as a hardware description and verification language.
    Downloads: 4 This Week
    Last Update:
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  • 5
    Processes boolean functions which can be provided either as a list of 0s and 1s or which can be provided as a formula in first-order logic (using disjunctive or conjunctive normal forms). Internally the Quine McCluskey algorithm is used.
    Downloads: 0 This Week
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  • 6
    SVATS [Safety Verification Analysis added To Spice] is a Pyhton written EDA tool used for adding repetitive analysis capabilities to perform FMEAs on analog and mixed analog-digital electronic circuits using Berkeley Spice-like simulation SW
    Downloads: 0 This Week
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