Search Results for "rule-file"

...Dump out the C Model for the entire design 11. Glue-Logic insertion 12. Spare port insertion across hierarchies 13. Automatic creation of the top module and it's ports based upon specified rule 14. Creates stub module

This tool generates timing diagrams for documenting hardware design. It reads the description from a text file with a simple syntax. It generates vector graphic (EPS, SVG or EMF format). It can be used in command line mode or with a GUI. It is written in Python and works on any platform.

This Python script reads in a DXF (ascii) file and generates a PCB output compatible with PCB Designer, part of the gEDA suite. It is designed for two purposes: One is to generate a PCB snippet from a mechanical drawing (such as a board outline), the other is to produce element files from CAD drawings. PCB snippets are easily imported into an existing gEDA-PCB project using File -> Load Layout to Buffer.

A Step Closer to a Fully Gui ATLAS .log Converter A Gui .in Editor to be Used by ATLAS .log awk converter

GerbTool is a set of tools for modifying gerber and excellon drill files. GerbTool can be used to tile multiple gerber files as a single job, and can be run interactively or in batch mode.

Banyan is an enterprise class, web based, information management system that helps people work collaboratively to solve complex problems. Banyan increases project performance and reduces risk through the power of collaborative clear thinking.