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  • 1

    System Verilog Parser IEEE 1800 LRM

    IEEE LRM compliant System Verilog Parser in Java with Python, Tcl API

    This parser has been developed to help users to implement their Verilog tool/utility on the top this library. It reads RTL and populates its internal data structures. There are APIs to extract the design information from the database, there are APIs to elaborate every element of the design along with basic expression evaluation capabilities. It has been bundled as an executable JAR file along with a sample application which reads a RTL file(s), elaborates and dumps it back to show the...
    Downloads: 0 This Week
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  • 2
    UMHDL

    UMHDL

    Integrated Development Environment (IDE) for learning HDL

    UMHDL is an educational Integrated Development Environment (IDE) intended for learning digital designing with programmable logic devices using Hardware Description Languages (HDL) through simulation. It is an open-source application created at the Miguel Hernández University (UMH). The aim for the UMHDL development was to have a graphical application that allows learning the VHDL language without licensing restrictions (using some existing open-source tools) and requiring few resources. So,...
    Downloads: 9 This Week
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  • 3
    myNetPCB

    myNetPCB

    Community driven PCB Layout and Schematic capture software

    PCB Layout and Schematic capture tool for Win/Linux/Mac. Source code at https://github.com/sergei-iliev/myNetPCB
    Downloads: 0 This Week
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  • 4
    XOR Tree Generator
    Program for creating Verilog synthesizable XOR trees for high performance designs. Supports creation of Hamming Code (ECC) generators, checkers, and GF2 Multipliers.
    Downloads: 0 This Week
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  • 5
    JSDAI is a toolkit for STEP (ISO 10303), the STandard for the Exchange of Product Model data, that enables linking of CAD, CAM, PDM, PLM, CAx systems. JSDAI supports the development of Express data models (ISO 10303-11) and their implementation in Java.
    Downloads: 0 This Week
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  • 6
    dvkit

    dvkit

    Eclipse-based IDE for design verification tasks

    DVKit provides an Eclipse-based integrated development environment (IDE) for common design-verification tasks, such as developing SystemVerilog, C++, TCL, Python, and shell code
    Downloads: 2 This Week
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  • 7
    Eclipse Verilog editor is a plugin for the Eclipse IDE. It provides Verilog(IEEE-1364) and VHDL language specific code viewer, contents outline, code assist etc. It helps coding and debugging in hardware development based on Verilog or VHDL.
    Downloads: 2 This Week
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  • 8
    bel_fft

    bel_fft

    FFT co-processor in Verilog based on the KISS FFT

    ...AMBA AHB). It comes with a Java wizard to configure the co-processor and to generate all required files (e.g. twiddle ROMs). It comes with integration into Xilinx Vivado, EDK, and Altera QSYS and includes example designs for Xilinx Zynq and with PCI-Express core (including Linux driver and application). bel_fft is distributed under the GNU Lesser Public License 2.1.
    Downloads: 0 This Week
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  • 9
    Qfsm

    Qfsm

    A graphical Finite State Machine (FSM) designer.

    A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation.
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    Downloads: 20 This Week
    Last Update:
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  • 10
    vMAGIC
    vMAGIC is a Java-API which helps creating VHDL generators and analyzers. vMAGIC comprises three parts: 1st a VHDL'93 compliant parser, 2nd a programming model to easily create and modify VHDL constructs, and 3rd a VHDL Writer to generate code.
    Downloads: 0 This Week
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  • 11
    Downloads: 0 This Week
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  • 12
    This program converts assembly code to verilog implementation
    Downloads: 0 This Week
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  • 13
    NecJGui is an antennas design tool, interface for Numerical Electromagnetic Code. It allows easily making NEC input files, and viewing them in 3D. It also contains a version of the simulator, so it's complete IDE for full-wave EM simulation.
    Downloads: 0 This Week
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