Showing 10 open source projects for "developers console"

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  • 1
    A portable loudspeaker design system supporting measurement, modeling, simulation and optimization of boxes, filters and systems.
    Downloads: 3 This Week
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  • 2
    UrJTAG aims to create an enhanced, modern tool for communicating over JTAG with flash chips, CPUs, and many more. It is a descendant of the popular openwince JTAG tools with a lot of additional features and enhancements.
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    Downloads: 82 This Week
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  • 3
    Multidimensional optimization problems
    NEW OPTIMIZATION TECHNOLOGY & PLANNING EXPERIMENT. Technology is designed for multidimensional optimization practical problems with continuous object functions. Technology higher efficiency than traditional optimization methods.
    Downloads: 0 This Week
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  • 4
    An API for manipulating EDIF netlists in Java. We use this API to analyze netlists as a part of our FPGA reliability project. We intend to keep the API as general as possible to support other netlist analysis and manipulation activities. This material is based upon work supported by the National Science Foundation under Grant No. 0801876. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the...
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    Downloads: 1 This Week
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  • 5
    This project aims to develop an opensource software with an attractive and efficient GUI which allows to design linear electronic circuits and to characterize existing ones.
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    Downloads: 14 This Week
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  • 6
    Framework for the Analysis and Modification of EDIF netlists (FAME) is a C++ framework, developed at Politecnico di Torino, aimed at automating the analysis and modification of complex circuit netlists described in the standard EDIF 2.0.0 language.
    Downloads: 0 This Week
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  • 7
    Program Avr Linux Manager, to prosty interfejs dla programów avr-gcc oraz avrdude. Umożliwia łatwą kompilację i programowanie mikrokontrolerów.
    Downloads: 0 This Week
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  • 8
    VSYML is an automated symbolic simulator for VHDL designs.
    Downloads: 0 This Week
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  • 9
    F- is an ANSish Forth that uses a VM generator to compile Forth into C-based VM suitable for living in a C-based (or assembly or HDL) microcontroller project. The VM supplies 32-bit math, I/O, multitasking and debugger in a ROM footprint as small as 4kB.
    Downloads: 0 This Week
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  • 10
    Extensions to the circuit simulator Ngspice. One extension is the integration of the next generation build system SCons.
    Downloads: 0 This Week
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