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wxArt2D gives wxWindows applications sophisticated vector drawing functionality.
It is based on a framework supporting multiple views within a hierarchical document. Supports drawing & (Graph) editing. In-output in SVG, GDSII, XML, easy to extend.
vrq is verilog parser that supports plugin tools to process verilog. Current plugins include tools to perform x-propagation and to auto build hiearchy.
OpenDSE is a design space exploration framework for embedded systems, written in Java. It follows the Y-chart approach where an application consisting of data-dependent tasks is mapped to an architecture consisting of resources.
QSapecNG is a Qt-based symbolic analysis program for linear analog circuits. In fact, it consists of two indipendently parts: the SapecNG framework engine, and the application gui QSapecNG.
Framework for the Analysis and Modification of EDIF netlists (FAME) is a C++ framework, developed at Politecnico di Torino, aimed at automating the analysis and modification of complex circuit netlists described in the standard EDIF 2.0.0 language.
Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. NO tool is providing a global framework to develop algorithms.
Silicis is a new formal framework for designing [verification] algorithms.
ESOMA is a component orientated framework for simulation and evaluation
of arbitrary microprocessor and DSP architectures. Simulators using
ESOMA are runtime configurable. Architectural changes do not need
recompiling. Programming language is C++ (Linu
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CBOLD is a C++ framework for schematicless capture of board-level electronic designs. CBOLD replaces schematic capture EDA software in the traditional PCB design flow.
PCB-Tools is a system independent, a Java programmed Eclipse-RCP application for developing circuit diagrams and printed circuit boards. It uses Eclipse Graphical Editor Framework (GEF) to draw diagrams and layouts.