Search Results for "interface"
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Showing 62 open source projects for "interface"
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LibrePCB
A powerful, innovative and intuitive EDA suite for everyone
...LibrePCB is developed with portability in mind to make it run on virtually any computer – including Windows, Linux, and macOS. It’s available in 22 different languages, and it doesn’t cost any money. Simple, intuitive, well-known user-interface concepts help to get started with LibrePCB very quickly. No need to study the documentation for days – just start working on it. A LibrePCB library is more than just a collection of stupid graphics for symbols and footprints – they are organized in a meaningful, semantic manner. This makes library management more fun and eliminates many problems known from other EDA tools. -
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Quite Universal Circuit Simulator
A circuit simulator with graphical user interface (GUI)
Qucs is a circuit simulator with graphical user interface. The software aims to support all kinds of circuit simulation types, e.g. DC, AC, S-parameter, Transient, Noise and Harmonic Balance analysis. Pure digital simulations are also supported. -
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Baya - SoC Integration Platform
Best in class SoC Integration Platform, IP-XACT, Verilog VHDL, UPF
...Comes with 200+ high level Tcl commands around SoC platform assembly 2. Easy to start - use the verilog2baya tool to convert existing SoC/SS into Baya 3. Adhoc and Interface based connections 4. Autoconnections 5. Rule based connections between component ports 6. A variety of SoC integration Methodologies 6.a. XLS/CSV Based connections 6.b. Port-to-Port Adhoc connections 6.c. IP-XACT and System Verilog Interface based connections 6.d. ... 7. Maintains a connectivity database with advance queries 8. ... -
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CircuiTikZ Generator
This software is a tool for designing electronic circuits using LaTeX.
This software is a tool for designing electronic circuits using LaTeX. With an intuitive graphical interface, you can create complex circuits quickly and easily, while the LaTeX code generator translates your designs into code compatible with the LaTeX circuitikz library. -
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EDAUtils Converters
Free converters across IP-XACT Verilog VHDL Liberty SystemC
...vhdl2verilog : Tool to convert VHDL into Verilog by keeping the same structure and function for ease of correlation verilog2ipxact :Tool to create IP-XACT Component or Design from a Verilog Module. ipxact2verilog : Tool to convert IP-XACT into Verilog module ipxactinterface2svinterface : Converts IP-XACT Bus Definition / BusInterface into System Verilog Interface verilog2lib : Create Liberty .lib library from verilog module lib2verilog : Converts Liberty .lib Cells into empty verilog modules verilog2systemc : Tool to convert Verilog into SystemC keeping the original structure as much as possible. ipxactreg2xlsreg : Converts IP-XACT Address Block file into XLSX for review and documentation purpose xls2ipxact : Creates IP-XACT Address Block file from the legacy XLS/CSV based Register Management system. -
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JQM Java Quine McCluskey
JQM - Java Quine McCluskey for minimization of Boolean functions.
Java Quine McCluskey (JQM) implements the Quine-McCluskey algorithm with Petrick’s Method for minimizing Boolean functions. Designed for both education and industrial application, it handles up to 16 variables and functions. Uniquely, JQM bridges the gap between theory and practice: it visualizes the solution process with generated Karnaugh Maps for students, while supporting PLC engineers by exporting results to Structured Text (ST) and Ladder Diagram (LD). The software includes a GUI for... -
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...The designs are useful for both solid state designs as well as vacuum tube/valve circuits. In the newest version, the filter design functionality has been split off and will appear as a separate app. This makes for a cleaner user interface, The latest version was made from the FOX toolkit, and it is included in the package. This is the latest stable version of FOX.
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UMHDL
Integrated Development Environment (IDE) for learning HDL
...The aim for the UMHDL development was to have a graphical application that allows learning the VHDL language without licensing restrictions (using some existing open-source tools) and requiring few resources. So, the interface developed acts as a front-end that allows writing code (with syntax highlighting), invokes an external VHDL compiler and simulator (such as GHDL), and displays the result of the simulation graphically as waveforms (invoking to GTKWave). -
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UrJTAG aims to create an enhanced, modern tool for communicating over JTAG with flash chips, CPUs, and many more. It is a descendant of the popular openwince JTAG tools with a lot of additional features and enhancements.
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GLogic
A logic gate simulator for linux developed with Gtk and python.
GLogic is a logic gate simulator for linux and an adaptation of the gLogic package.... -
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FidoCadJ
Simple and intuitive 2D vector drawing for electronics and not only.
A multiplatform vector drawing program with a complete library of electronic symbols. Schematics and drawings are stored in a very compact text format. There is no netlist concept behind the drawings (so no simulation, and this is a choice) but this allows a great graphical flexibility and ease of use, making FidoCadJ the perfect tool for exchange sketches in forum and newsgroup discussions with a few clicks. Drawings can be exported in several graphic formats, such as pdf. Follow the... -
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yad2xx
Yet Another JNI-D2XX Interface Project
A Java Native Interface (JNI) library suitable for communicating with a range of USB interface chips from FTDI via the D2XX driver. It currently supports OS X 10.10+ and Windows 7/8 x64. On OS X, the 64 bit JVM is supported. On Windows, support is limited to the 64 bit JVM (Java 1.8 is now 64 bit). Version 1.0 --------------------------------- - Java 8 - SPI support and sample (via MPSSE) -
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Analog Insydes is a Mathematica toolbox for symbolic analysis of analog electronic circuits. This project provides a set of free add-ons to Analog Insydes, including a Java front-end and a native netlister for Cadence's Analog Design Environment (ADE).
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bel_fft
FFT co-processor in Verilog based on the KISS FFT
bel_fft is a FFT co-processor that can calculate FFTs with arbitrary radix. It is a hardware implementation of the free software Kiss FFT ("Keep it simple, Stupid!"). The target was to allow a simple replacement of the software code with the hardware implementation. Therefore bel_fft comes with a software driver that is compatible with the Kiss FFT routines. bel_fft also has a modular architecture and allows interfacing different bus architectures. So far AMBA AXI, Altera's Avalon bus and... -
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DEVSIM
TCAD Device Simulator
TCAD Device Simulator. DEVSIM is a semiconductor device simulation software, using the finite volume method. This software solves partial differential equations on a mesh. The Python interface allows the user to specify their own equations. -
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JMCAD is an program for the modeling and simulation of complex dynamic systems. This includes the ability to construct and simulate block diagrams. The visual block diagram interface offers a simple method for constructing, modifying and maintaining complex system models. The simulation engine provides fast and accurate solutions for linear, nonlinear, continuous time, discrete time, time varying and hybrid system designs. With JMCAD, users can quickly develop software or "virtual" prototypes of systems or processes to demonstrate their behavior prior to building physical prototypes. ...
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This is a collection of (hopefully) useful productivity enhancements of Mentor Graphics IC-Station tools
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Virtual instrumentation software, currently designed for modifying automobile engines. Intended as a modular framework to communicate with devices on an IO port (serial, parallel etc.) and allow a visual representation of the instrument.
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A Binary Decision Diagram library, with : many highly efficient vectorized BDD operations, dynamic variable reordering, automated garbage collection, a C++ interface with automatic reference counting, and much more.
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The developed graphical interface is based on the SKILL language which is a Lisp dialect used as a scripting language and PCell (Parameterized Cells) description language used in many EDA software suites by Cadence Design Systems.
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CAD2Board
is a Qt program to generate SMD chip shooter code
...Inconsistencies are highlighted to solve them by new assignements and unused feeders can be cleaned up with a single push. Finally a machine program is generated in Heeb HE50 format and downloaded to the machine interface. -
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HSOC
Heterogeneous System-on-Chip Platform
HSoC is a open source, SystemC-based, cycle-accurate virtual platform for heterogeneous shared memory-based multicore SoCs. Each HSoC component has a clean interface, implements a separate class, and includes regression tests. Large-scale models can be instantiated, by connecting objects from all HSoC libraries. Each object may collect data by invoking a monitoring library. The target users are CS/EE professionals. Some experience with SoC design methodology and SystemC (e.g. reading the SystemC user manual and/or running the examples) is required. ... -
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* Model-checking/simulation-checking library for real-time system with dense-time models in C with CRD (Clock-Restriction Diagrams) technology. * Parametric analysis library for linear-hybrid systems in C with HRD (Hybrid-Restriction Diagram) technol
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QConsole is a custom Qt widget implementing a standard console to be inherited to support a specific scripting language or shell, and then embedded in any Qt application. As example, a Tcl console (QtclConsole) is provided for use in EDA applications
