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Showing 25 open source projects for "convert python to c"
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Baya - SoC Integration Platform
Best in class SoC Integration Platform, IP-XACT, Verilog VHDL, UPF
1. Comes with 200+ high level Tcl commands around SoC platform assembly 2. Easy to start - use the verilog2baya tool to convert existing SoC/SS into Baya 3. Adhoc and Interface based connections 4. Autoconnections 5. Rule based connections between component ports 6. A variety of SoC integration Methodologies 6.a. XLS/CSV Based connections 6.b. Port-to-Port Adhoc connections 6.c. IP-XACT and System Verilog Interface based connections 6.d. ... 7. Maintains a connectivity database... -
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Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.
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dvkit
Eclipse-based IDE for design verification tasks
DVKit provides an Eclipse-based integrated development environment (IDE) for common design-verification tasks, such as developing SystemVerilog, C++, TCL, Python, and shell code -
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qucs2EQ
Convert Qucs Prv1 data to Audacity EQ curve xml
Convert from Qucs Pr1.v dataset to Audacity equalization curve xml. Tested with Qucs Dataset 0.0.18 and Audacity 2.0.3 -
Picsart Enterprise Background Removal API for Stunning eCommerce VisualsWith our Remove Background API tool, you can access the transformative capabilities of automation , which will allow you to turn any photo asset into compelling product imagery. With elevated visuals quality on your digital platforms, you can captivate your audience, and therefore achieve higher engagement and sales.
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dxf2pcb
Convert DXF drawings of circuit boards to gEDA-PCB files.
This Python script reads in a DXF (ascii) file and generates a PCB output compatible with PCB Designer, part of the gEDA suite. It is designed for two purposes: One is to generate a PCB snippet from a mechanical drawing (such as a board outline), the other is to produce element files from CAD drawings. PCB snippets are easily imported into an existing gEDA-PCB project using File -> Load Layout to Buffer. Generated element files are ready to use (except for special cases like no-paste flags... -
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DEVSIM
TCAD Device Simulator
TCAD Device Simulator. DEVSIM is a semiconductor device simulation software, using the finite volume method. This software solves partial differential equations on a mesh. The Python interface allows the user to specify their own equations. -
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Qfsm
A graphical Finite State Machine (FSM) designer.
A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation. -
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This (Python) tool allows you to easily create FPGA bitfiles for your embedded system, from several Open Source IPs (compatibles with the OpenCores Wishbone bus) . It will also generates the corresponding drivers (currently only Linux ones).
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Libraries, documentation, examples & drivers for Eagle Technology South Africa's Data Acquisition products. These include ISA, PCI, PCI Express, USB, Serial & Ethernet. Supported languages will be C/C++, JAVA, Perl, Python.
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A IC/MEMS layout editor. Features: all angle, font generator, macros, boolean operations, design rule checker, supported formats:Calma GDSII, OASIS (Open Artwork System Interchange Standard), OpenAccess, DXF, CIF (Caltech Intermediate Form), ...
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CAPLET
GDS visualization and parallelized capacitance extraction
Project CAPLET is a capacitance extraction toolkit that extract capacitance at field-solver accuracy. CAPLET can directly handle GDS2 layout files into capacitance matrices in both GUI and command line interfaces. The internal extraction algorithm is specialized for VLSI interconnect structures but not exclusively, as long as the structure is of Manhattan geometry and embedded in a uniform dielectric material. -
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RS485 C#/Python library
RS485 library for C# and Python
This library consists in a shared library that can be compiled on Linux and Windows. Plus, it has a C# wrapper for Windows and Python Wrapper for Linux. -
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The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source signal analysis software suite that supports various device types, such as logic analyzers, MSOs, oscilloscopes, multimeters, LCR meters, sound level meters, thermometers, anemometers, light meters, dataloggers, function generators, power supplies, GPIB interfaces, and more.
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naga EDA devotes to provide useful electronic design tools in C++ and, especially, Python. The current release contains naga.Verilog, a Verilog parser. Please visit project homepage http://naga-eda.org for more information
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Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.
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A program that analyzes info about an automotive engine, and wanted power increase in horsepower and the program helps give the user a possible turbocharger that satisfies the requirements.
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tango2pcb is a console program that convert Tango PCB files and libraries to pcb program for linux (http://pcb.sourceforge.net).
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Extensions to the circuit simulator Ngspice. One extension is the integration of the next generation build system SCons.
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The MP4Free project provides a simulation, analysis and exploration platform for multi-processor system-on-chip applications at variable level of abstraction, providing also a comprehensive component library.
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Production (3 level) Programmer for Microchip PIC on Win9X,DOS,NT,Win2K. Flash and Eprom, 14 and 12 bit devices. Printer Port programmers and the BEL In-circuit Dual PRODUCTION Pic Programmer board.
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This is a Computer Aided Electronic Design tool. It features schematic capture, simulation and PCB layout for both analog and numerical componants with the help of Gnome.
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Blitzer is a simple tool for driving the SX-Blitz microcontroller programmer from Parallax. There is now a version for PalmOS devices.
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Labcoat: Cleanroom Apps for SuperWikia
Labcoat; the VHDL graphic emulator.
Labcoat for SuperWikia Alpha fabrication manages new or revised fabrication processes. Its 'Cleanroom' applets allow codesmiths to access the lab environment, used to create semiconductors, substrate prototypes, chipset instruction blocks and other Labcoat projects. Our extensions in future releases will include UML support for C#/C++ conforming projects, import/export architecture schematics and refactoring sub-projects.
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